m_generate.map.eqn

m序列产生编码

--A1L11Q is Q~reg0
--operation mode is normal

A1L11Q_lut_out = c[4];
A1L11Q = DFFEAS(A1L11Q_lut_out, clk, VCC, , A1L21, , , , );


--c[4] is c[4]
--operation mode is normal

c[4]_lut_out = c[3] & D1_safe_q[3] # !A1L9;
c[4] = DFFEAS(c[4]_lut_out, clk, VCC, , A1L21, , , , );


--C1_safe_q[3] is lpm_counter:j_rtl_1|cntr_2c7:auto_generated|safe_q[3]
--operation mode is normal

C1_safe_q[3]_carry_eqn = C1L6;
C1_safe_q[3]_lut_out = C1_safe_q[3] $ (C1_safe_q[3]_carry_eqn);
C1_safe_q[3] = DFFEAS(C1_safe_q[3]_lut_out, clk, VCC, , , , , A1L21, );


--C1_safe_q[0] is lpm_counter:j_rtl_1|cntr_2c7:auto_generated|safe_q[0]
--operation mode is arithmetic

C1_safe_q[0]_lut_out = !C1_safe_q[0];
C1_safe_q[0] = DFFEAS(C1_safe_q[0]_lut_out, clk, VCC, , , , , A1L21, );

--C1L2 is lpm_counter:j_rtl_1|cntr_2c7:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

C1L2 = CARRY(C1_safe_q[0]);


--C1_safe_q[1] is lpm_counter:j_rtl_1|cntr_2c7:auto_generated|safe_q[1]
--operation mode is arithmetic

C1_safe_q[1]_carry_eqn = C1L2;
C1_safe_q[1]_lut_out = C1_safe_q[1] $ (C1_safe_q[1]_carry_eqn);
C1_safe_q[1] = DFFEAS(C1_safe_q[1]_lut_out, clk, VCC, , , , , A1L21, );

--C1L4 is lpm_counter:j_rtl_1|cntr_2c7:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

C1L4 = CARRY(!C1L2 # !C1_safe_q[1]);


--C1_safe_q[2] is lpm_counter:j_rtl_1|cntr_2c7:auto_generated|safe_q[2]
--operation mode is arithmetic

C1_safe_q[2]_carry_eqn = C1L4;
C1_safe_q[2]_lut_out = C1_safe_q[2] $ (!C1_safe_q[2]_carry_eqn);
C1_safe_q[2] = DFFEAS(C1_safe_q[2]_lut_out, clk, VCC, , , , , A1L21, );

--C1L6 is lpm_counter:j_rtl_1|cntr_2c7:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

C1L6 = CARRY(C1_safe_q[2] & !C1L4);


--A1L31 is rtl~68
--operation mode is normal

A1L31 = C1_safe_q[3] & C1_safe_q[0] # C1_safe_q[1] # C1_safe_q[2];


--D1_safe_q[0] is lpm_counter:p_rtl_0|cntr_h68:auto_generated|safe_q[0]
--operation mode is arithmetic

D1_safe_q[0]_lut_out = D1_safe_q[0] $ !D1_safe_q[3];
D1_safe_q[0] = DFFEAS(D1_safe_q[0]_lut_out, clk, VCC, , A1L9, , , , );

--D1L2 is lpm_counter:p_rtl_0|cntr_h68:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

D1L2 = CARRY(D1_safe_q[0]);


--D1_safe_q[1] is lpm_counter:p_rtl_0|cntr_h68:auto_generated|safe_q[1]
--operation mode is arithmetic

D1_safe_q[1]_carry_eqn = D1L2;
D1_safe_q[1]_lut_out = D1_safe_q[1] $ (!D1_safe_q[3] & D1_safe_q[1]_carry_eqn);
D1_safe_q[1] = DFFEAS(D1_safe_q[1]_lut_out, clk, VCC, , A1L9, , , , );

--D1L4 is lpm_counter:p_rtl_0|cntr_h68:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

D1L4 = CARRY(!D1L2 # !D1_safe_q[1]);


--D1_safe_q[2] is lpm_counter:p_rtl_0|cntr_h68:auto_generated|safe_q[2]
--operation mode is arithmetic

D1_safe_q[2]_carry_eqn = D1L4;
D1_safe_q[2]_lut_out = D1_safe_q[2] $ (!D1_safe_q[3] & !D1_safe_q[2]_carry_eqn);
D1_safe_q[2] = DFFEAS(D1_safe_q[2]_lut_out, clk, VCC, , A1L9, , , , );

--D1L6 is lpm_counter:p_rtl_0|cntr_h68:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

D1L6 = CARRY(D1_safe_q[2] & !D1L4);


--A1L9 is LessThan~121
--operation mode is normal

A1L9 = !D1_safe_q[2] & !D1_safe_q[1] # !D1_safe_q[0];


--D1_safe_q[3] is lpm_counter:p_rtl_0|cntr_h68:auto_generated|safe_q[3]
--operation mode is normal

D1_safe_q[3]_carry_eqn = D1L6;
D1_safe_q[3]_lut_out = D1_safe_q[3] # D1_safe_q[3]_carry_eqn;
D1_safe_q[3] = DFFEAS(D1_safe_q[3]_lut_out, clk, VCC, , A1L9, , , , );


--A1L21 is rtl~1
--operation mode is normal

A1L21 = A1L31 # A1L9 & !D1_safe_q[3];


--c[3] is c[3]
--operation mode is normal

c[3]_lut_out = c[2] & D1_safe_q[3] # !A1L9;
c[3] = DFFEAS(c[3]_lut_out, clk, VCC, , A1L21, , , , );


--c[2] is c[2]
--operation mode is normal

c[2]_lut_out = c[1] & D1_safe_q[3] # !A1L9;
c[2] = DFFEAS(c[2]_lut_out, clk, VCC, , A1L21, , , , );


--c[1] is c[1]
--operation mode is normal

c[1]_lut_out = c[0] & D1_safe_q[3] # !A1L9;
c[1] = DFFEAS(c[1]_lut_out, clk, VCC, , A1L21, , , , );


--c[0] is c[0]
--operation mode is normal

c[0]_lut_out = A1L8 # A1L31 & c[4] $ c[1];
c[0] = DFFEAS(c[0]_lut_out, clk, VCC, , , , , , );


--A1L8 is c~283
--operation mode is normal

A1L8 = A1L9 & c[0] & !A1L31 # !D1_safe_q[3] # !A1L9 & c[0] & !A1L31;


--clk is clk
--operation mode is input

clk = INPUT();


--Q is Q
--operation mode is output

Q = OUTPUT(A1L11Q);