📄 pie_code.map.rpt
字号:
; auk_dspip_avalon_streaming_controller.vhd ; yes ; Encrypted User VHDL File ; F:/program files/altera/61/qdesigns/my_work/pie_code/auk_dspip_avalon_streaming_controller.vhd ;
; fff_st.v ; yes ; User Verilog HDL File ; F:/program files/altera/61/qdesigns/my_work/pie_code/fff_st.v ;
; fff_new.vhd ; yes ; User VHDL File ; F:/program files/altera/61/qdesigns/my_work/pie_code/fff_new.vhd ;
; fff.vhd ; yes ; User VHDL File ; F:/program files/altera/61/qdesigns/my_work/pie_code/fff.vhd ;
; scfifo.tdf ; yes ; Megafunction ; f:/program files/altera/61/quartus/libraries/megafunctions/scfifo.tdf ;
; a_regfifo.inc ; yes ; Megafunction ; f:/program files/altera/61/quartus/libraries/megafunctions/a_regfifo.inc ;
; a_dpfifo.inc ; yes ; Megafunction ; f:/program files/altera/61/quartus/libraries/megafunctions/a_dpfifo.inc ;
; a_i2fifo.inc ; yes ; Megafunction ; f:/program files/altera/61/quartus/libraries/megafunctions/a_i2fifo.inc ;
; a_fffifo.inc ; yes ; Megafunction ; f:/program files/altera/61/quartus/libraries/megafunctions/a_fffifo.inc ;
; a_f2fifo.inc ; yes ; Megafunction ; f:/program files/altera/61/quartus/libraries/megafunctions/a_f2fifo.inc ;
; aglobal61.inc ; yes ; Megafunction ; f:/program files/altera/61/quartus/libraries/megafunctions/aglobal61.inc ;
; db/scfifo_ded1.tdf ; yes ; Auto-Generated Megafunction ; F:/program files/altera/61/qdesigns/my_work/pie_code/db/scfifo_ded1.tdf ;
; db/a_dpfifo_i551.tdf ; yes ; Auto-Generated Megafunction ; F:/program files/altera/61/qdesigns/my_work/pie_code/db/a_dpfifo_i551.tdf ;
; db/altsyncram_2lf1.tdf ; yes ; Auto-Generated Megafunction ; F:/program files/altera/61/qdesigns/my_work/pie_code/db/altsyncram_2lf1.tdf ;
; db/cntr_bjb.tdf ; yes ; Auto-Generated Megafunction ; F:/program files/altera/61/qdesigns/my_work/pie_code/db/cntr_bjb.tdf ;
; db/cntr_oj7.tdf ; yes ; Auto-Generated Megafunction ; F:/program files/altera/61/qdesigns/my_work/pie_code/db/cntr_oj7.tdf ;
; db/cntr_cjb.tdf ; yes ; Auto-Generated Megafunction ; F:/program files/altera/61/qdesigns/my_work/pie_code/db/cntr_cjb.tdf ;
; tdl_da_lc.v ; yes ; Encrypted File ; F:/program files/altera/61/ip/fir_compiler/lib/tdl_da_lc.v ;
; uadd_cen.v ; yes ; Encrypted File ; F:/program files/altera/61/ip/fir_compiler/lib/uadd_cen.v ;
; rom_lut_r_cen.v ; yes ; Encrypted File ; F:/program files/altera/61/ip/fir_compiler/lib/rom_lut_r_cen.v ;
; sadd_lpm_cen.v ; yes ; Encrypted File ; F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v ;
; mac_tl.v ; yes ; Encrypted File ; F:/program files/altera/61/ip/fir_compiler/lib/mac_tl.v ;
; par_ctrl.v ; yes ; Encrypted File ; F:/program files/altera/61/ip/fir_compiler/lib/par_ctrl.v ;
+-------------------------------------------+-----------------+------------------------------------+------------------------------------------------------------------------------------------------+
+-----------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------------------+-------+
; Resource ; Usage ;
+---------------------------------------------+-------+
; Estimated Total logic elements ; 366 ;
; ; ;
; Total combinational functions ; 249 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 53 ;
; -- 3 input functions ; 128 ;
; -- <=2 input functions ; 68 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 157 ;
; -- arithmetic mode ; 92 ;
; ; ;
; Total registers ; 366 ;
; -- Dedicated logic registers ; 366 ;
; -- I/O registers ; 0 ;
; ; ;
; I/O pins ; 0 ;
; Total memory bits ; 8 ;
; Maximum fan-out node ; clock ;
; Maximum fan-out ; 367 ;
; Total fan-out ; 1835 ;
; Average fan-out ; 2.87 ;
+---------------------------------------------+-------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ;
+------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; |pie_code ; 249 (1) ; 366 (0) ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code ;
; |fff:inst1| ; 248 (0) ; 366 (0) ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1 ;
; |fff_new:fff_new_inst| ; 248 (0) ; 366 (0) ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst ;
; |auk_dspip_avalon_streaming_controller:intf_ctrl| ; 1 (1) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_controller:intf_ctrl ;
; |auk_dspip_avalon_streaming_sink:sink| ; 25 (4) ; 20 (4) ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink ;
; |scfifo:\normal_fifo:in_fifo| ; 21 (0) ; 16 (0) ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo ;
; |scfifo_ded1:auto_generated| ; 21 (2) ; 16 (1) ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated ;
; |a_dpfifo_i551:dpfifo| ; 19 (11) ; 15 (7) ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo ;
; |altsyncram_2lf1:FIFOram| ; 0 (0) ; 0 (0) ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo|altsyncram_2lf1:FIFOram ;
; |cntr_bjb:rd_ptr_msb| ; 2 (2) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo|cntr_bjb:rd_ptr_msb ;
; |cntr_cjb:wr_ptr| ; 3 (3) ; 3 (3) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo|cntr_cjb:wr_ptr ;
; |cntr_oj7:usedw_counter| ; 3 (3) ; 3 (3) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo|cntr_oj7:usedw_counter ;
; |auk_dspip_avalon_streaming_source:source| ; 3 (3) ; 37 (37) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_source:source ;
; |fff_st:fir_core| ; 219 (0) ; 308 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core ;
; |par_ctrl:Uctrl| ; 3 (3) ; 4 (4) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|par_ctrl:Uctrl ;
; |rom_lut_r_cen:Ur0_n_0_pp| ; 4 (4) ; 4 (4) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur0_n_0_pp ;
; |rom_lut_r_cen:Ur0_n_1_pp| ; 4 (4) ; 4 (4) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur0_n_1_pp ;
; |rom_lut_r_cen:Ur1_n_0_pp| ; 5 (5) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur1_n_0_pp ;
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