pie_code.hif

pie edcode编码 程序设计

Version 6.1 Build 201 11/27/2006 SJ Full Version
11
869
OFF
OFF
OFF
OFF
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
..|..|..|ip|fir_compiler|lib|
..|..|..|ip|fft-v2.1.1|lib|
..|..|..|MegaCore|nco-v2.2.1|lib|
..|..|..|MegaCore|fir_compiler-v3.1.0|lib|
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
auk_dspip_avalon_streaming_sink
# storage
db|pie_code.(3).cnf
db|pie_code.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
auk_dspip_avalon_streaming_sink.vhd
fda3bacc6665638eead6e3a32796ce1
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
width_g
1
PARAMETER_SIGNED_DEC
USR
packet_size_g
1
PARAMETER_SIGNED_DEC
USR
fifo_depth_g
5
PARAMETER_SIGNED_DEC
USR
min_data_count_g
2
PARAMETER_SIGNED_DEC
USR
pfc_mode_g
false
PARAMETER_ENUM
USR
sop_eop_calc_g
false
PARAMETER_ENUM
USR
family_g
Cyclone II
PARAMETER_STRING
USR
mem_type_g
Auto
PARAMETER_STRING
USR
 constraint(data)
0 downto 0
PARAMETER_STRING
USR
 constraint(at_sink_data)
0 downto 0
PARAMETER_STRING
USR
 constraint(at_sink_error)
1 downto 0
PARAMETER_STRING
USR
}
# include_file {
auk_dspip_math_pkg.vhd
25746ad2295926525aa5743d99f3d3d
auk_dspip_lib_pkg.vhd
1434b72bd12b55dbe7d63e12f6e7d
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink
}
# end
# entity
scfifo
# storage
db|pie_code.(4).cnf
db|pie_code.(4).cnf
# case_insensitive
# source_file
..|..|..|quartus|libraries|megafunctions|scfifo.tdf
35622eb715ad7962dc948ede2925d2b
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
lpm_width
3
PARAMETER_SIGNED_DEC
USR
LPM_NUMWORDS
5
PARAMETER_SIGNED_DEC
USR
LPM_WIDTHU
3
PARAMETER_SIGNED_DEC
USR
LPM_SHOWAHEAD
OFF
PARAMETER_UNKNOWN
USR
UNDERFLOW_CHECKING
OFF
PARAMETER_UNKNOWN
USR
OVERFLOW_CHECKING
OFF
PARAMETER_UNKNOWN
USR
ALLOW_RWCYCLE_WHEN_FULL
OFF
PARAMETER_UNKNOWN
USR
ADD_RAM_OUTPUT_REGISTER
ON
PARAMETER_UNKNOWN
USR
ALMOST_FULL_VALUE
3
PARAMETER_SIGNED_DEC
USR
ALMOST_EMPTY_VALUE
1
PARAMETER_SIGNED_DEC
USR
USE_EAB
ON
PARAMETER_UNKNOWN
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
scfifo_ded1
PARAMETER_UNKNOWN
USR
}
# used_port {
wrreq
-1
3
usedw0
-1
3
sclr
-1
3
rdreq
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
empty
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
almost_full
-1
3
aclr
-1
3
}
# include_file {
..|..|..|quartus|libraries|megafunctions|a_dpfifo.inc
748303753a041187a5d4113b5f62acf
..|..|..|quartus|libraries|megafunctions|a_regfifo.inc
afe6bfc54c15224ce61beaea9e71dc
..|..|..|quartus|libraries|megafunctions|a_i2fifo.inc
ca5bb76c5a51df22b24c8b01cbcc918
..|..|..|quartus|libraries|megafunctions|a_fffifo.inc
ebf62e69b8fb10b5db33a57861298d55
..|..|..|quartus|libraries|megafunctions|a_f2fifo.inc
9bc132bd4e9e2ef1fb9633f6a742f
..|..|..|quartus|libraries|megafunctions|aglobal61.inc
b513fb574ceb8f5886cd4ba429e82ec
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo
}
# end
# entity
scfifo_ded1
# storage
db|pie_code.(5).cnf
db|pie_code.(5).cnf
# case_insensitive
# source_file
db|scfifo_ded1.tdf
4e29acb2c157285b2398afaa8d7d268f
6
# used_port {
wrreq
-1
3
usedw2
-1
3
usedw1
-1
3
usedw0
-1
3
sclr
-1
3
rdreq
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
empty
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
almost_full
-1
3
aclr
-1
3
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated
}
# end
# entity
a_dpfifo_i551
# storage
db|pie_code.(6).cnf
db|pie_code.(6).cnf
# case_insensitive
# source_file
db|a_dpfifo_i551.tdf
d634cbb076de607a7df640a0fd9b5e5
6
# used_port {
wreq
-1
3
usedw2
-1
3
usedw1
-1
3
usedw0
-1
3
sclr
-1
3
rreq
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
empty
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo
}
# end
# entity
altsyncram_2lf1
# storage
db|pie_code.(7).cnf
db|pie_code.(7).cnf
# case_insensitive
# source_file
db|altsyncram_2lf1.tdf
e0dacd365b911c362462c3b68793276
6
# user_parameter {
PORT_A_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
wren_a
-1
3
q_b2
-1
3
q_b1
-1
3
q_b0
-1
3
data_a2
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo|altsyncram_2lf1:FIFOram
}
# end
# entity
cntr_bjb
# storage
db|pie_code.(8).cnf
db|pie_code.(8).cnf
# case_insensitive
# source_file
db|cntr_bjb.tdf
cb51e8ee392df495f1a6ea83e4350
6
# used_port {
sclr
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo|cntr_bjb:rd_ptr_msb
}
# end
# entity
cntr_oj7
# storage
db|pie_code.(9).cnf
db|pie_code.(9).cnf
# case_insensitive
# source_file
db|cntr_oj7.tdf
19eefaf8c3eec94e645cb5cfa3887ae6
6
# used_port {
updown
-1
3
sclr
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo|cntr_oj7:usedw_counter
}
# end
# entity
cntr_cjb
# storage
db|pie_code.(10).cnf
db|pie_code.(10).cnf
# case_insensitive
# source_file
db|cntr_cjb.tdf
16c59830e6eee855a3d8b7efedd6b25d
6
# used_port {
sclr
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_sink:sink|scfifo:\normal_fifo:in_fifo|scfifo_ded1:auto_generated|a_dpfifo_i551:dpfifo|cntr_cjb:wr_ptr
}
# end
# entity
auk_dspip_avalon_streaming_source
# storage
db|pie_code.(11).cnf
db|pie_code.(11).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
auk_dspip_avalon_streaming_source.vhd
a21f158f6c9ae54d6afa6f9d1adb577
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
width_g
17
PARAMETER_SIGNED_DEC
USR
packet_size_g
1
PARAMETER_SIGNED_DEC
USR
have_counter_g
false
PARAMETER_ENUM
USR
counter_limit_g
4
PARAMETER_SIGNED_DEC
USR
multi_channel_g
true
PARAMETER_ENUM
USR
 constraint(data)
16 downto 0
PARAMETER_STRING
USR
 constraint(data_count)
0 downto 0
PARAMETER_STRING
USR
 constraint(packet_error)
1 downto 0
PARAMETER_STRING
USR
 constraint(at_source_data)
16 downto 0
PARAMETER_STRING
USR
 constraint(at_source_channel)
0 downto 0
PARAMETER_STRING
USR
 constraint(at_source_error)
1 downto 0
PARAMETER_STRING
USR
}
# include_file {
auk_dspip_math_pkg.vhd
25746ad2295926525aa5743d99f3d3d
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_source:source
}
# end
# entity
auk_dspip_avalon_streaming_controller
# storage
db|pie_code.(12).cnf
db|pie_code.(12).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
auk_dspip_avalon_streaming_controller.vhd
281a4ffb76238a5caa5bc2a7256d61ae
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
 constraint(sink_packet_error)
1 downto 0
PARAMETER_STRING
USR
 constraint(source_packet_error)
1 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|auk_dspip_avalon_streaming_controller:intf_ctrl
}
# end
# entity
tdl_da_lc
# storage
db|pie_code.(14).cnf
db|pie_code.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|..|..|ip|fir_compiler|lib|tdl_da_lc.v
308971e2fd5045b5e49bdf3185df66a
7
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
WIDTH
1
PARAMETER_SIGNED_DEC
USR
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc0n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc1n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc2n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc3n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc4n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc5n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc6n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc7n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc8n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc9n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc10n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc11n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc12n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc13n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc14n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc15n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc16n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc17n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc18n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc19n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc20n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc21n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc22n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc23n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc24n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc25n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc26n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc27n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc28n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc29n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc30n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc31n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc32n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc33n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc34n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc35n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc36n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc37n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc38n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc39n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc40n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc41n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc42n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc43n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc44n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc45n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc46n
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc47n
}
# end
# entity
uadd_cen
# storage
db|pie_code.(15).cnf
db|pie_code.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|..|..|ip|fir_compiler|lib|uadd_cen.v
c01b4d85a8b0db81053145d73657c8e
7
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
IN_WIDTH
1
PARAMETER_SIGNED_DEC
USR
PIPE_DEPTH
1
PARAMETER_SIGNED_DEC
USR
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_0_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_1_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_2_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_3_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_4_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_5_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_6_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_7_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_8_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_9_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_10_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_11_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_12_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_13_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_14_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_15_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_16_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_17_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_18_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_19_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_20_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_21_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_22_sym_add
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_23_sym_add
}
# end
# entity
rom_lut_r_cen
# storage
db|pie_code.(16).cnf
db|pie_code.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|..|..|ip|fir_compiler|lib|rom_lut_r_cen.v
bd2d9246d887c02de8932667ab03f
7
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
C0
0
PARAMETER_SIGNED_DEC
USR
C1
3
PARAMETER_SIGNED_DEC
USR
C2
12
PARAMETER_SIGNED_DEC
USR
C3
15
PARAMETER_SIGNED_DEC
USR
C4
13
PARAMETER_SIGNED_DEC
USR
C5
0
PARAMETER_SIGNED_DEC
USR
C6
9
PARAMETER_SIGNED_DEC
USR
C7
12
PARAMETER_SIGNED_DEC
USR
C8
3
PARAMETER_SIGNED_DEC
USR
C9
6
PARAMETER_SIGNED_DEC
USR
CA
15
PARAMETER_SIGNED_DEC
USR
CB
2
PARAMETER_SIGNED_DEC
USR
CC
0
PARAMETER_SIGNED_DEC
USR
CD
3
PARAMETER_SIGNED_DEC
USR
CE
12
PARAMETER_SIGNED_DEC
USR
CF
15
PARAMETER_SIGNED_DEC
USR
DATA_WIDTH
4
PARAMETER_SIGNED_DEC
USR
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur0_n_0_pp
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur0_n_1_pp
}
# end
# entity
rom_lut_r_cen
# storage
db|pie_code.(17).cnf
db|pie_code.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|..|..|ip|fir_compiler|lib|rom_lut_r_cen.v
bd2d9246d887c02de8932667ab03f
7
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
C0
0
PARAMETER_SIGNED_DEC
USR
C1
6
PARAMETER_SIGNED_DEC
USR
C2
55
PARAMETER_SIGNED_DEC
USR
C3
61
PARAMETER_SIGNED_DEC
USR
C4
57
PARAMETER_SIGNED_DEC
USR
C5
63
PARAMETER_SIGNED_DEC
USR
C6
48
PARAMETER_SIGNED_DEC
USR
C7
54
PARAMETER_SIGNED_DEC
USR
C8
7
PARAMETER_SIGNED_DEC
USR
C9
13
PARAMETER_SIGNED_DEC
USR
CA
62
PARAMETER_SIGNED_DEC
USR
CB
4
PARAMETER_SIGNED_DEC
USR
CC
0
PARAMETER_SIGNED_DEC
USR
CD
6
PARAMETER_SIGNED_DEC
USR
CE
55
PARAMETER_SIGNED_DEC
USR
CF
61
PARAMETER_SIGNED_DEC
USR
DATA_WIDTH
6
PARAMETER_SIGNED_DEC
USR
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur1_n_0_pp
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur1_n_1_pp
}
# end
# entity
rom_lut_r_cen
# storage
db|pie_code.(18).cnf
db|pie_code.(18).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|..|..|ip|fir_compiler|lib|rom_lut_r_cen.v
bd2d9246d887c02de8932667ab03f
7
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
C0
0
PARAMETER_SIGNED_DEC
USR
C1
16
PARAMETER_SIGNED_DEC
USR
C2
101
PARAMETER_SIGNED_DEC
USR
C3
117
PARAMETER_SIGNED_DEC
USR
C4
105
PARAMETER_SIGNED_DEC
USR
C5
121
PARAMETER_SIGNED_DEC
USR
C6
78
PARAMETER_SIGNED_DEC
USR
C7
94
PARAMETER_SIGNED_DEC
USR
C8
29
PARAMETER_SIGNED_DEC
USR
C9
45
PARAMETER_SIGNED_DEC
USR
CA
2
PARAMETER_SIGNED_DEC
USR
CB
18
PARAMETER_SIGNED_DEC
USR
CC
6
PARAMETER_SIGNED_DEC
USR
CD
22
PARAMETER_SIGNED_DEC
USR
CE
107
PARAMETER_SIGNED_DEC
USR
CF
123
PARAMETER_SIGNED_DEC
USR
DATA_WIDTH
7
PARAMETER_SIGNED_DEC
USR
}
# hierarchies {
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur2_n_0_pp
fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|rom_lut_r_cen:Ur2_n_1_pp
}
# end
# entity
rom_lut_r_cen
# storage
db|pie_code.(19).cnf
db|pie_code.(19).cnf
# logic_option {