pie_code.map.qmsg

pie edcode编码 程序设计

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "par_ctrl fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl " "Info: Elaborating entity \"par_ctrl\" for hierarchy \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\"" {  } { { "fff_st.v" "Uctrl" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/fff_st.v" 694 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|rom_lut_r_cen:Ur4_n_1_pp\|data_out\[15\] data_in GND " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|rom_lut_r_cen:Ur4_n_1_pp\|data_out\[15\]\" with stuck data_in port to stuck value GND" {  } { { "../../../ip/fir_compiler/lib/rom_lut_r_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/rom_lut_r_cen.v" 72 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|rom_lut_r_cen:Ur4_n_0_pp\|data_out\[15\] data_in GND " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|rom_lut_r_cen:Ur4_n_0_pp\|data_out\[15\]\" with stuck data_in port to stuck value GND" {  } { { "../../../ip/fir_compiler/lib/rom_lut_r_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/rom_lut_r_cen.v" 72 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|rom_lut_r_cen:Ur3_n_1_pp\|data_out\[0\] data_in GND " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|rom_lut_r_cen:Ur3_n_1_pp\|data_out\[0\]\" with stuck data_in port to stuck value GND" {  } { { "../../../ip/fir_compiler/lib/rom_lut_r_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/rom_lut_r_cen.v" 72 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|rom_lut_r_cen:Ur3_n_0_pp\|data_out\[0\] data_in GND " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|rom_lut_r_cen:Ur3_n_0_pp\|data_out\[0\]\" with stuck data_in port to stuck value GND" {  } { { "../../../ip/fir_compiler/lib/rom_lut_r_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/rom_lut_r_cen.v" 72 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_controller:intf_ctrl\|res data_in GND " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_controller:intf_ctrl\|res\" with stuck data_in port to stuck value GND" {  } { { "auk_dspip_avalon_streaming_controller.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/auk_dspip_avalon_streaming_controller.vhd" 88 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_source:source\|at_source_error\[1\] data_in GND " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_source:source\|at_source_error\[1\]\" with stuck data_in port to stuck value GND" {  } { { "auk_dspip_avalon_streaming_source.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/auk_dspip_avalon_streaming_source.vhd" 398 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|sink_start High " "Info: Power-up level of register \"fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|sink_start\" is not specified -- using power-up level of High to minimize register" {  } { { "auk_dspip_avalon_streaming_sink.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/auk_dspip_avalon_streaming_sink.vhd" 149 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|sink_start data_in VCC " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|sink_start\" with stuck data_in port to stuck value VCC" {  } { { "auk_dspip_avalon_streaming_sink.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/auk_dspip_avalon_streaming_sink.vhd" 149 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|packet_error_s\[1\] data_in GND " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|packet_error_s\[1\]\" with stuck data_in port to stuck value GND" {  } { { "auk_dspip_avalon_streaming_sink.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/auk_dspip_avalon_streaming_sink.vhd" 446 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_HDR" "" "Warning: Synthesized away the following node(s):" { { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_SUB_HDR" "RAM " "Warning: Synthesized away the following RAM node(s):" { { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_NODE" "fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|scfifo:\\normal_fifo:in_fifo\|scfifo_ded1:auto_generated\|a_dpfifo_i551:dpfifo\|altsyncram_2lf1:FIFOram\|q_b\[1\] " "Warning: Synthesized away node \"fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|scfifo:\\normal_fifo:in_fifo\|scfifo_ded1:auto_generated\|a_dpfifo_i551:dpfifo\|altsyncram_2lf1:FIFOram\|q_b\[1\]\"" {  } { { "db/altsyncram_2lf1.tdf" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/db/altsyncram_2lf1.tdf" 77 2 0 } } { "db/a_dpfifo_i551.tdf" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/db/a_dpfifo_i551.tdf" 43 2 0 } } { "db/scfifo_ded1.tdf" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/db/scfifo_ded1.tdf" 38 2 0 } } { "scfifo.tdf" "" { Text "f:/program files/altera/61/quartus/libraries/megafunctions/scfifo.tdf" 296 3 0 } } { "auk_dspip_avalon_streaming_sink.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/auk_dspip_avalon_streaming_sink.vhd" 587 0 0 } } { "fff_new.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/fff_new.vhd" 84 0 0 } } { "fff.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/fff.vhd" 75 0 0 } } { "pie_code.bdf" "" { Schematic "F:/program files/altera/61/qdesigns/my_work/pie_code/pie_code.bdf" { { 192 160 424 352 "inst1" "" } } } }  } 0 0 "Synthesized away node \"%1!s!\"" 0 0} { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_NODE" "fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|scfifo:\\normal_fifo:in_fifo\|scfifo_ded1:auto_generated\|a_dpfifo_i551:dpfifo\|altsyncram_2lf1:FIFOram\|q_b\[2\] " "Warning: Synthesized away node \"fff:inst1\|fff_new:fff_new_inst\|auk_dspip_avalon_streaming_sink:sink\|scfifo:\\normal_fifo:in_fifo\|scfifo_ded1:auto_generated\|a_dpfifo_i551:dpfifo\|altsyncram_2lf1:FIFOram\|q_b\[2\]\"" {  } { { "db/altsyncram_2lf1.tdf" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/db/altsyncram_2lf1.tdf" 106 2 0 } } { "db/a_dpfifo_i551.tdf" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/db/a_dpfifo_i551.tdf" 43 2 0 } } { "db/scfifo_ded1.tdf" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/db/scfifo_ded1.tdf" 38 2 0 } } { "scfifo.tdf" "" { Text "f:/program files/altera/61/quartus/libraries/megafunctions/scfifo.tdf" 296 3 0 } } { "auk_dspip_avalon_streaming_sink.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/auk_dspip_avalon_streaming_sink.vhd" 587 0 0 } } { "fff_new.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/fff_new.vhd" 84 0 0 } } { "fff.vhd" "" { Text "F:/program files/altera/61/qdesigns/my_work/pie_code/fff.vhd" 75 0 0 } } { "pie_code.bdf" "" { Schematic "F:/program files/altera/61/qdesigns/my_work/pie_code/pie_code.bdf" { { 192 160 424 352 "inst1" "" } } } }  } 0 0 "Synthesized away node \"%1!s!\"" 0 0}  } {  } 0 0 "Synthesized away the following %1!s! node(s):" 0 0}  } {  } 0 0 "Synthesized away the following node(s):" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\|rdy_to_ld High " "Info: Power-up level of register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\|rdy_to_ld\" is not specified -- using power-up level of High to minimize register" {  } { { "../../../ip/fir_compiler/lib/par_ctrl.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/par_ctrl.v" 35 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\|rdy_to_ld data_in VCC " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\|rdy_to_ld\" with stuck data_in port to stuck value VCC" {  } { { "../../../ip/fir_compiler/lib/par_ctrl.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/par_ctrl.v" 35 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\|rdy_int High " "Info: Power-up level of register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\|rdy_int\" is not specified -- using power-up level of High to minimize register" {  } { { "../../../ip/fir_compiler/lib/par_ctrl.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/par_ctrl.v" 35 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\|rdy_int data_in VCC " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|par_ctrl:Uctrl\|rdy_int\" with stuck data_in port to stuck value VCC" {  } { { "../../../ip/fir_compiler/lib/par_ctrl.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/par_ctrl.v" 35 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[0\] data_in GND " "Warning: Reduced register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[0\]\" with stuck data_in port to stuck value GND" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[11\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[11\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[12\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[12\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[13\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[13\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[14\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[14\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[15\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[15\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_3_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[8\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[8\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[9\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[9\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[10\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[10\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[11\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[11\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[12\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[12\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[13\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[13\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[14\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[14\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[15\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[15\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_2_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[7\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[7\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[8\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[8\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[9\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[9\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[16\]\"" {  } { { "../../../ip/fir_compiler/lib/sadd_lpm_cen.v" "" { Text "F:/program files/altera/61/ip/fir_compiler/lib/sadd_lpm_cen.v" 46 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[10\] fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[16\] " "Info: Duplicate register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core\|sadd_lpm_cen:Uadd_1_lut_l_0_n_0_n\|pipe\[0\]\[10\]\" merged to single register \"fff:inst1\|fff_new:fff_new_inst\|fff_st:fir_core