📄 pie_code.hier_info
字号:
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc26n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc27n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc28n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc29n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc30n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc31n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc32n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc33n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc34n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc35n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc36n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc37n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc38n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc39n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc40n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc41n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc42n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc43n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc44n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc45n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc46n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|tdl_da_lc:Utdldalc47n
clk => data_out[0]~reg0.CLK
rst => data_out~1.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
data_in[0] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_0_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_1_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_2_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_3_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_4_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_5_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_6_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_7_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_8_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_9_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_10_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_11_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_12_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_13_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_14_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_15_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_16_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
res[1] <= res[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
|pie_code|fff:inst1|fff_new:fff_new_inst|fff_st:fir_core|uadd_cen:U_17_sym_add
clk => res[0]~reg0.CLK
clk => res[1]~reg0.CLK
gclk_en => res[0]~reg0.ENA
gclk_en => res[1]~reg0.ENA
ain[0] => Add0.IN1
bin[0] => Add0.IN2
res[0] <= res[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -