📄 fff.vhd
字号:
-- megafunction wizard: %FIR Compiler v6.1%
-- GENERATION: XML
-- ============================================================
-- Megafunction Name(s):
-- fff_new
-- ============================================================
-- Generated by FIR Compiler 6.1 [Altera, IP Toolbench v1.3.0 build70]
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
-- ************************************************************
-- Copyright (C) 1991-2007 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
library IEEE;
use IEEE.std_logic_1164.all;
ENTITY fff IS
PORT (
clk : IN STD_LOGIC;
reset_n : IN STD_LOGIC;
ast_sink_data : IN STD_LOGIC;
ast_sink_valid : IN STD_LOGIC;
ast_source_ready : IN STD_LOGIC;
ast_sink_error : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
ast_source_data : OUT STD_LOGIC_VECTOR (16 DOWNTO 0);
ast_sink_ready : OUT STD_LOGIC;
ast_source_valid : OUT STD_LOGIC;
ast_source_error : OUT STD_LOGIC_VECTOR (1 DOWNTO 0)
);
END fff;
ARCHITECTURE SYN OF fff IS
attribute altera_attribute : string;
attribute altera_attribute of SYN: ARCHITECTURE is "suppress_da_rule_internal=z100";
COMPONENT fff_new
PORT (
clk : IN STD_LOGIC;
reset_n : IN STD_LOGIC;
ast_sink_data : IN STD_LOGIC;
ast_sink_valid : IN STD_LOGIC;
ast_source_ready : IN STD_LOGIC;
ast_sink_error : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
ast_source_data : OUT STD_LOGIC_VECTOR (16 DOWNTO 0);
ast_sink_ready : OUT STD_LOGIC;
ast_source_valid : OUT STD_LOGIC;
ast_source_error : OUT STD_LOGIC_VECTOR (1 DOWNTO 0)
);
END COMPONENT;
BEGIN
fff_new_inst : fff_new
PORT MAP (
clk => clk,
reset_n => reset_n,
ast_sink_data => ast_sink_data,
ast_source_data => ast_source_data,
ast_sink_valid => ast_sink_valid,
ast_sink_ready => ast_sink_ready,
ast_source_valid => ast_source_valid,
ast_source_ready => ast_source_ready,
ast_sink_error => ast_sink_error,
ast_source_error => ast_source_error
);
END SYN;
-- =========================================================
-- FIR Compiler Wizard Data
-- ===============================
-- DO NOT EDIT FOLLOWING DATA
-- @Altera, IP Toolbench@
-- Warning: If you modify this section, FIR Compiler Wizard may not be able to reproduce your chosen configuration.
--
-- Retrieval info: <?xml version="1.0"?>
-- Retrieval info: <MEGACORE title="FIR Compiler" version="6.1" build="201" iptb_version="v1.3.0 build70" format_version="120" >
-- Retrieval info: <NETLIST_SECTION class="altera.ipbu.flowbase.netlist.model.FIRModelClass" active_core="fff_new" >
-- Retrieval info: <STATIC_SECTION>
-- Retrieval info: <PRIVATES>
-- Retrieval info: <NAMESPACE name = "parameterization">
-- Retrieval info: <PRIVATE name = "use_mem" value="1" type="BOOLEAN" enable="1" />
-- Retrieval info: <PRIVATE name = "mem_type" value="M512" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "filter_rate" value="Single Rate" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "filter_factor" value="2" type="INTEGER" enable="0" />
-- Retrieval info: <PRIVATE name = "coefficient_scaling_type" value="Auto" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "coefficient_scaling_factor" value="41983.5993296845" type="STRING" enable="0" />
-- Retrieval info: <PRIVATE name = "coefficient_bit_width" value="14" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "coefficient_binary_point_position" value="0" type="INTEGER" enable="0" />
-- Retrieval info: <PRIVATE name = "number_of_input_channels" value="1" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "input_number_system" value="Unsigned Binary" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "input_bit_width" value="1" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "input_binary_point_position" value="0" type="INTEGER" enable="0" />
-- Retrieval info: <PRIVATE name = "output_bit_width_method" value="Actual Coefficients" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "output_number_system" value="Full Resolution" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "output_bit_width" value="17" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "output_bits_right_of_binary_point" value="13" type="INTEGER" enable="0" />
-- Retrieval info: <PRIVATE name = "output_bits_removed_from_lsb" value="0" type="INTEGER" enable="0" />
-- Retrieval info: <PRIVATE name = "output_lsb_remove_type" value="Truncate" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "output_msb_remove_type" value="Truncate" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "flow_control" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "flow_control_input" value="Slave Sink" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "flow_control_output" value="Master Source" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "device_family" value="Cyclone II" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "structure" value="Distributed Arithmetic : Fully Parallel Filter" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "pipeline_level" value="1" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "clocks_to_compute" value="1" type="INTEGER" enable="0" />
-- Retrieval info: <PRIVATE name = "number_of_serial_units" value="2" type="INTEGER" enable="0" />
-- Retrieval info: <PRIVATE name = "data_storage" value="Logic Cells" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "coefficient_storage" value="Logic Cells" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "multiplier_storage" value="Logic Cells" type="STRING" enable="0" />
-- Retrieval info: <PRIVATE name = "force_non_symmetric_structure" value="0" type="BOOLEAN" enable="0" />
-- Retrieval info: <PRIVATE name = "coefficients_reload" value="0" type="BOOLEAN" enable="0" />
-- Retrieval info: <PRIVATE name = "coefficients_reload_sgl_clock" value="0" type="BOOLEAN" enable="1" />
-- Retrieval info: <PRIVATE name = "max_clocks_to_compute" value="4" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "set_1" value="Low Pass Set, Floating, Raised Cosine, Rectangular, 48, 800000.0, 80000.0, 3750000.0, 100, 7.22489E-5, 0.0, -9.7935E-5, -7.47454E-5, 7.32718E-5, 1.49379E-4, 0.0, -2.18446E-4, -1.72029E-4, 1.84449E-4, 3.92136E-4, 0.0, -6.59547E-4, -5.60422E-4, 6.99439E-4, 0.00166856, 0.0, -0.0040658, -0.00453741, 0.00907214, 0.0448148, 0.0998693, 0.15773, 0.1951, 0.1951, 0.15773, 0.0998693, 0.0448148, 0.00907214, -0.00453741, -0.0040658, 0.0, 0.00166856, 6.99439E-4, -5.60422E-4, -6.59547E-4, 0.0, 3.92136E-4, 1.84449E-4, -1.72029E-4, -2.18446E-4, 0.0, 1.49379E-4, 7.32718E-5, -7.47454E-5, -9.7935E-5, 0.0, 7.22489E-5" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "number_of_sets" value="1" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "coefficient_reload_bit_width" value="14" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "output_full_bit_width" value="17" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "output_full_bits_right_of_binary_point" value="13" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "logic_cell" value="300" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "m512" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "m4k" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "m144k" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "m9k" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "mlab" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "megaram" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "dsp_block" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "input_clock_period" value="1" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "output_clock_period" value="1" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "throughput" value="1" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "memory_units" value="0" type="INTEGER" enable="1" />
-- Retrieval info: </NAMESPACE>
-- Retrieval info: <NAMESPACE name = "simgen_enable">
-- Retrieval info: <PRIVATE name = "matlab_enable" value="1" type="BOOLEAN" enable="1" />
-- Retrieval info: <PRIVATE name = "testbench_enable" value="1" type="BOOLEAN" enable="1" />
-- Retrieval info: <PRIVATE name = "testbench_simulation_clock_period" value="10.0" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "language" value="VHDL" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "enabled" value="0" type="BOOLEAN" enable="1" />
-- Retrieval info: </NAMESPACE>
-- Retrieval info: <NAMESPACE name = "simgen">
-- Retrieval info: <PRIVATE name = "filename" value="fff.vho" type="STRING" enable="1" />
-- Retrieval info: </NAMESPACE>
-- Retrieval info: <NAMESPACE name = "quartus_settings">
-- Retrieval info: <PRIVATE name = "DEVICE" value="EP2C35F672C7" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "FAMILY" value="Cyclone II" type="STRING" enable="1" />
-- Retrieval info: </NAMESPACE>
-- Retrieval info: <NAMESPACE name = "serializer"/>
-- Retrieval info: </PRIVATES>
-- Retrieval info: <FILES/>
-- Retrieval info: <PORTS/>
-- Retrieval info: <LIBRARIES/>
-- Retrieval info: </STATIC_SECTION>
-- Retrieval info: </NETLIST_SECTION>
-- Retrieval info: </MEGACORE>
-- =========================================================
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -