mips.h

GCC编译器源代码

#define TARGET_SINGLE_FLOAT	(target_flags & MASK_SINGLE_FLOAT)
#define TARGET_DOUBLE_FLOAT	(! TARGET_SINGLE_FLOAT)

#define TARGET_MAD		(target_flags & MASK_MAD)

#define TARGET_4300_MUL_FIX     (target_flags & MASK_4300_MUL_FIX)

/* This is true if we must enable the assembly language file switching
   code.  */

#define TARGET_FILE_SWITCHING	(TARGET_GP_OPT && ! TARGET_GAS)

/* We must disable the function end stabs when doing the file switching trick,
   because the Lscope stabs end up in the wrong place, making it impossible
   to debug the resulting code.  */
#define NO_DBX_FUNCTION_END TARGET_FILE_SWITCHING

/* Macro to define tables used to set the flags.
   This is a list in braces of pairs in braces,
   each pair being { "NAME", VALUE }
   where VALUE is the bits to set or minus the bits to clear.
   An empty string NAME is used to identify the default VALUE.  */

#define TARGET_SWITCHES							\
{									\
  {"int64",		  MASK_INT64 | MASK_LONG64},			\
  {"long64",		  MASK_LONG64},					\
  {"split-addresses",	  MASK_SPLIT_ADDR},				\
  {"no-split-addresses", -MASK_SPLIT_ADDR},				\
  {"mips-as",		 -MASK_GAS},					\
  {"gas",		  MASK_GAS},					\
  {"rnames",		  MASK_NAME_REGS},				\
  {"no-rnames",		 -MASK_NAME_REGS},				\
  {"gpOPT",		  MASK_GPOPT},					\
  {"gpopt",		  MASK_GPOPT},					\
  {"no-gpOPT",		 -MASK_GPOPT},					\
  {"no-gpopt",		 -MASK_GPOPT},					\
  {"stats",		  MASK_STATS},					\
  {"no-stats",		 -MASK_STATS},					\
  {"memcpy",		  MASK_MEMCPY},					\
  {"no-memcpy",		 -MASK_MEMCPY},					\
  {"mips-tfile",	  MASK_MIPS_TFILE},				\
  {"no-mips-tfile",	 -MASK_MIPS_TFILE},				\
  {"soft-float",	  MASK_SOFT_FLOAT},				\
  {"hard-float",	 -MASK_SOFT_FLOAT},				\
  {"fp64",		  MASK_FLOAT64},				\
  {"fp32",		 -MASK_FLOAT64},				\
  {"gp64",		  MASK_64BIT},					\
  {"gp32",		 -MASK_64BIT},					\
  {"abicalls",		  MASK_ABICALLS},				\
  {"no-abicalls",	 -MASK_ABICALLS},				\
  {"half-pic",		  MASK_HALF_PIC},				\
  {"no-half-pic",	 -MASK_HALF_PIC},				\
  {"long-calls",	  MASK_LONG_CALLS},				\
  {"no-long-calls",	 -MASK_LONG_CALLS},				\
  {"embedded-pic",	  MASK_EMBEDDED_PIC},				\
  {"no-embedded-pic",	 -MASK_EMBEDDED_PIC},				\
  {"embedded-data",	  MASK_EMBEDDED_DATA},				\
  {"no-embedded-data",	 -MASK_EMBEDDED_DATA},				\
  {"eb",		  MASK_BIG_ENDIAN},				\
  {"el",		 -MASK_BIG_ENDIAN},				\
  {"single-float",	  MASK_SINGLE_FLOAT},				\
  {"double-float",	 -MASK_SINGLE_FLOAT},				\
  {"mad",		  MASK_MAD},					\
  {"no-mad",		 -MASK_MAD},					\
  {"fix4300",             MASK_4300_MUL_FIX},				\
  {"no-fix4300",         -MASK_4300_MUL_FIX},				\
  {"4650",		  MASK_MAD | MASK_SINGLE_FLOAT},		\
  {"3900",		  MASK_MIPS3900},                               \
  {"debug",		  MASK_DEBUG},					\
  {"debuga",		  MASK_DEBUG_A},				\
  {"debugb",		  MASK_DEBUG_B},				\
  {"debugc",		  MASK_DEBUG_C},				\
  {"debugd",		  MASK_DEBUG_D},				\
  {"debuge",		  MASK_DEBUG_E},				\
  {"debugf",		  MASK_DEBUG_F},				\
  {"debugg",		  MASK_DEBUG_G},				\
  {"debugh",		  MASK_DEBUG_H},				\
  {"debugi",		  MASK_DEBUG_I},				\
  {"",			  (TARGET_DEFAULT				\
			   | TARGET_CPU_DEFAULT				\
			   | TARGET_ENDIAN_DEFAULT)}			\
}

/* Default target_flags if no switches are specified  */

#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT 0
#endif

#ifndef TARGET_CPU_DEFAULT
#define TARGET_CPU_DEFAULT 0
#endif

#ifndef TARGET_ENDIAN_DEFAULT
#ifndef DECSTATION
#define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN
#else
#define TARGET_ENDIAN_DEFAULT 0
#endif
#endif

#ifndef MULTILIB_DEFAULTS
#if TARGET_ENDIAN_DEFAULT == 0
#define MULTILIB_DEFAULTS { "EL", "mips1" }
#else
#define MULTILIB_DEFAULTS { "EB", "mips1" }
#endif
#endif

/* We must pass -EL to the linker by default for little endian embedded
   targets using linker scripts with a OUTPUT_FORMAT line.  Otherwise, the
   linker will default to using big-endian output files.  The OUTPUT_FORMAT
   line must be in the linker script, otherwise -EB/-EL will not work.  */

#ifndef LINKER_ENDIAN_SPEC
#if TARGET_ENDIAN_DEFAULT == 0
#define LINKER_ENDIAN_SPEC "%{!EB:%{!meb:-EL}}"
#else
#define LINKER_ENDIAN_SPEC ""
#endif
#endif

/* This macro is similar to `TARGET_SWITCHES' but defines names of
   command options that have values.  Its definition is an
   initializer with a subgrouping for each command option.

   Each subgrouping contains a string constant, that defines the
   fixed part of the option name, and the address of a variable. 
   The variable, type `char *', is set to the variable part of the
   given option if the fixed part matches.  The actual option name
   is made by appending `-m' to the specified name.

   Here is an example which defines `-mshort-data-NUMBER'.  If the
   given option is `-mshort-data-512', the variable `m88k_short_data'
   will be set to the string `"512"'.

	extern char *m88k_short_data;
	#define TARGET_OPTIONS { { "short-data-", &m88k_short_data } }  */

#define TARGET_OPTIONS							\
{									\
  SUBTARGET_TARGET_OPTIONS						\
  { "cpu=",	&mips_cpu_string	},				\
  { "ips",	&mips_isa_string	}				\
}

/* This is meant to be redefined in the host dependent files.  */
#define SUBTARGET_TARGET_OPTIONS

#define GENERATE_BRANCHLIKELY  (TARGET_MIPS3900 || (mips_isa >= 2))
#define GENERATE_MULT3         (TARGET_MIPS3900)
#define GENERATE_MADD          (TARGET_MIPS3900)



/* Macros to decide whether certain features are available or not,
   depending on the instruction set architecture level.  */

#define BRANCH_LIKELY_P()	GENERATE_BRANCHLIKELY
#define HAVE_SQRT_P()		(mips_isa >= 2)

/* CC1_SPEC causes -mips3 and -mips4 to set -mfp64 and -mgp64; -mips1 or
   -mips2 sets -mfp32 and -mgp32.  This can be overridden by an explicit
   -mfp32, -mfp64, -mgp32 or -mgp64.  -mfp64 sets MASK_FLOAT64 in
   target_flags, and -mgp64 sets MASK_64BIT.

   Setting MASK_64BIT in target_flags will cause gcc to assume that
   registers are 64 bits wide.  int, long and void * will be 32 bit;
   this may be changed with -mint64 or -mlong64.

   The gen* programs link code that refers to MASK_64BIT.  They don't
   actually use the information in target_flags; they just refer to
   it.  */

/* Switch  Recognition by gcc.c.  Add -G xx support */

#ifdef SWITCH_TAKES_ARG
#undef SWITCH_TAKES_ARG
#endif

#define SWITCH_TAKES_ARG(CHAR)						\
  (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')

/* Sometimes certain combinations of command options do not make sense
   on a particular target machine.  You can define a macro
   `OVERRIDE_OPTIONS' to take account of this.  This macro, if
   defined, is executed once just after all the command options have
   been parsed.

   On the MIPS, it is used to handle -G.  We also use it to set up all
   of the tables referenced in the other macros.  */

#define OVERRIDE_OPTIONS override_options ()

/* Zero or more C statements that may conditionally modify two
   variables `fixed_regs' and `call_used_regs' (both of type `char
   []') after they have been initialized from the two preceding
   macros.

   This is necessary in case the fixed or call-clobbered registers
   depend on target flags.

   You need not define this macro if it has no work to do.

   If the usage of an entire class of registers depends on the target
   flags, you may indicate this to GCC by using this macro to modify
   `fixed_regs' and `call_used_regs' to 1 for each of the registers in
   the classes which should not be used by GCC.  Also define the macro
   `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
   letter for a class that shouldn't be used.

   (However, if this class is not included in `GENERAL_REGS' and all
   of the insn patterns whose constraints permit this class are
   controlled by target switches, then GCC will automatically avoid
   using these registers when the target switches are opposed to
   them.)  */

#define CONDITIONAL_REGISTER_USAGE					\
do									\
  {									\
    if (!TARGET_HARD_FLOAT)						\
      {									\
	int regno;							\
									\
	for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++)	\
	  fixed_regs[regno] = call_used_regs[regno] = 1;		\
	for (regno = ST_REG_FIRST; regno <= ST_REG_LAST; regno++)	\
	  fixed_regs[regno] = call_used_regs[regno] = 1;		\
      }									\
    else if (mips_isa < 4)						\
      {									\
	int regno;							\
									\
	/* We only have a single condition code register.  We		\
           implement this by hiding all the condition code registers,	\
           and generating RTL that refers directly to ST_REG_FIRST.  */	\
	for (regno = ST_REG_FIRST; regno <= ST_REG_LAST; regno++)	\
	  fixed_regs[regno] = call_used_regs[regno] = 1;		\
      }									\
    SUBTARGET_CONDITIONAL_REGISTER_USAGE				\
  }									\
while (0)

/* This is meant to be redefined in the host dependent files.  */
#define SUBTARGET_CONDITIONAL_REGISTER_USAGE

/* Show we can debug even without a frame pointer.  */
#define CAN_DEBUG_WITHOUT_FP

/* Complain about missing specs and predefines that should be defined in each
   of the target tm files to override the defaults.  This is mostly a place-
   holder until I can get each of the files updated [mm].  */

#if defined(OSF_OS) \
    || defined(DECSTATION) \
    || defined(SGI_TARGET) \
    || defined(MIPS_NEWS) \
    || defined(MIPS_SYSV) \
    || defined(MIPS_SVR4) \
    || defined(MIPS_BSD43)

#ifndef CPP_PREDEFINES
	#error "Define CPP_PREDEFINES in the appropriate tm.h file"
#endif

#ifndef LIB_SPEC
	#error "Define LIB_SPEC in the appropriate tm.h file"
#endif

#ifndef STARTFILE_SPEC
	#error "Define STARTFILE_SPEC in the appropriate tm.h file"
#endif

#ifndef MACHINE_TYPE
	#error "Define MACHINE_TYPE in the appropriate tm.h file"
#endif
#endif

/* Tell collect what flags to pass to nm.  */
#ifndef NM_FLAGS
#define NM_FLAGS "-Bp"
#endif


/* Names to predefine in the preprocessor for this target machine.  */

#ifndef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \
-D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43 \
-Asystem(unix) -Asystem(bsd) -Acpu(mips) -Amachine(mips)"
#endif

/* Assembler specs.  */

/* MIPS_AS_ASM_SPEC is passed when using the MIPS assembler rather
   than gas.  */

#define MIPS_AS_ASM_SPEC "\
%{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \
%{pipe: %e-pipe is not supported.} \
%{K} %(subtarget_mips_as_asm_spec)"

/* SUBTARGET_MIPS_AS_ASM_SPEC is passed when using the MIPS assembler
   rather than gas.  It may be overridden by subtargets.  */

#ifndef SUBTARGET_MIPS_AS_ASM_SPEC
#define SUBTARGET_MIPS_AS_ASM_SPEC "%{v}"
#endif

/* GAS_ASM_SPEC is passed when using gas, rather than the MIPS
   assembler.  */

#define GAS_ASM_SPEC "%{mcpu=*} %{m4650} %{mmad:-m4650} %{m3900} %{v}"

/* TARGET_ASM_SPEC is used to select either MIPS_AS_ASM_SPEC or
   GAS_ASM_SPEC as the default, depending upon the value of
   TARGET_DEFAULT.  */

#if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0
/* GAS */

#define TARGET_ASM_SPEC "\
%{mmips-as: %(mips_as_asm_spec)} \
%{!mmips-as: %(gas_asm_spec)}"

#else /* not GAS */

#define TARGET_ASM_SPEC "\
%{!mgas: %(mips_as_asm_spec)} \
%{mgas: %(gas_asm_spec)}"

#endif /* not GAS */

/* SUBTARGET_ASM_OPTIMIZING_SPEC handles passing optimization options
   to the assembler.  It may be overridden by subtargets.  */
#ifndef SUBTARGET_ASM_OPTIMIZING_SPEC
#define SUBTARGET_ASM_OPTIMIZING_SPEC "\
%{noasmopt:-O0} \
%{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}}"
#endif

/* SUBTARGET_ASM_DEBUGGING_SPEC handles passing debugging options to
   the assembler.  It may be overridden by subtargets.  */
#ifndef SUBTARGET_ASM_DEBUGGING_SPEC
#define SUBTARGET_ASM_DEBUGGING_SPEC "\
%{g} %{g0} %{g1} %{g2} %{g3} \
%{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
%{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
%{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
%{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3}"
#endif

/* SUBTARGET_ASM_SPEC is always passed to the assembler.  It may be
   overridden by subtargets.  */

#ifndef SUBTARGET_ASM_SPEC
#define SUBTARGET_ASM_SPEC ""
#endif