📄 lib1funcs.asm
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! r0: Result!! Destroys:!! (none)! .global ___lshrsi3 .align 2___lshrsi3: mov #31,r0 and r0,r5 mova LOCAL(lshrsi3_table),r0 mov.b @(r0,r5),r5#ifdef __sh1__ add r5,r0 jmp @r0#else braf r5#endif mov r4,r0 .align 2LOCAL(lshrsi3_table): .byte LOCAL(lshrsi3_0)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_1)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_2)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_3)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_4)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_5)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_6)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_7)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_8)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_9)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_10)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_11)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_12)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_13)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_14)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_15)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_16)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_17)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_18)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_19)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_20)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_21)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_22)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_23)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_24)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_25)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_26)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_27)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_28)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_29)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_30)-LOCAL(lshrsi3_table) .byte LOCAL(lshrsi3_31)-LOCAL(lshrsi3_table)LOCAL(lshrsi3_6): shlr2 r0LOCAL(lshrsi3_4): shlr2 r0LOCAL(lshrsi3_2): rts shlr2 r0LOCAL(lshrsi3_7): shlr2 r0LOCAL(lshrsi3_5): shlr2 r0LOCAL(lshrsi3_3): shlr2 r0LOCAL(lshrsi3_1): rts shlr r0LOCAL(lshrsi3_14): shlr2 r0LOCAL(lshrsi3_12): shlr2 r0LOCAL(lshrsi3_10): shlr2 r0LOCAL(lshrsi3_8): rts shlr8 r0LOCAL(lshrsi3_15): shlr2 r0LOCAL(lshrsi3_13): shlr2 r0LOCAL(lshrsi3_11): shlr2 r0LOCAL(lshrsi3_9): shlr8 r0 rts shlr r0LOCAL(lshrsi3_22): shlr2 r0LOCAL(lshrsi3_20): shlr2 r0LOCAL(lshrsi3_18): shlr2 r0LOCAL(lshrsi3_16): rts shlr16 r0LOCAL(lshrsi3_23): shlr2 r0LOCAL(lshrsi3_21): shlr2 r0LOCAL(lshrsi3_19): shlr2 r0LOCAL(lshrsi3_17): shlr16 r0 rts shlr r0LOCAL(lshrsi3_30): shlr2 r0LOCAL(lshrsi3_28): shlr2 r0LOCAL(lshrsi3_26): shlr2 r0LOCAL(lshrsi3_24): shlr16 r0 rts shlr8 r0LOCAL(lshrsi3_31): shlr2 r0LOCAL(lshrsi3_29): shlr2 r0LOCAL(lshrsi3_27): shlr2 r0LOCAL(lshrsi3_25): shlr16 r0 shlr8 r0 rts shlr r0LOCAL(lshrsi3_0): rts nop#endif#ifdef L_movstr .text! done all the large groups, do the remainder! jump to movstr+done: add #64,r5 mova ___movstrSI0,r0 shll2 r6 add r6,r0 jmp @r0 add #64,r4 .align 4 .global ___movstrSI64___movstrSI64: mov.l @(60,r5),r0 mov.l r0,@(60,r4) .global ___movstrSI60___movstrSI60: mov.l @(56,r5),r0 mov.l r0,@(56,r4) .global ___movstrSI56___movstrSI56: mov.l @(52,r5),r0 mov.l r0,@(52,r4) .global ___movstrSI52___movstrSI52: mov.l @(48,r5),r0 mov.l r0,@(48,r4) .global ___movstrSI48___movstrSI48: mov.l @(44,r5),r0 mov.l r0,@(44,r4) .global ___movstrSI44___movstrSI44: mov.l @(40,r5),r0 mov.l r0,@(40,r4) .global ___movstrSI40___movstrSI40: mov.l @(36,r5),r0 mov.l r0,@(36,r4) .global ___movstrSI36___movstrSI36: mov.l @(32,r5),r0 mov.l r0,@(32,r4) .global ___movstrSI32___movstrSI32: mov.l @(28,r5),r0 mov.l r0,@(28,r4) .global ___movstrSI28___movstrSI28: mov.l @(24,r5),r0 mov.l r0,@(24,r4) .global ___movstrSI24___movstrSI24: mov.l @(20,r5),r0 mov.l r0,@(20,r4) .global ___movstrSI20___movstrSI20: mov.l @(16,r5),r0 mov.l r0,@(16,r4) .global ___movstrSI16___movstrSI16: mov.l @(12,r5),r0 mov.l r0,@(12,r4) .global ___movstrSI12___movstrSI12: mov.l @(8,r5),r0 mov.l r0,@(8,r4) .global ___movstrSI8___movstrSI8: mov.l @(4,r5),r0 mov.l r0,@(4,r4) .global ___movstrSI4___movstrSI4: mov.l @(0,r5),r0 mov.l r0,@(0,r4)___movstrSI0: rts or r0,r0,r0 .align 4 .global ___movstr___movstr: mov.l @(60,r5),r0 mov.l r0,@(60,r4) mov.l @(56,r5),r0 mov.l r0,@(56,r4) mov.l @(52,r5),r0 mov.l r0,@(52,r4) mov.l @(48,r5),r0 mov.l r0,@(48,r4) mov.l @(44,r5),r0 mov.l r0,@(44,r4) mov.l @(40,r5),r0 mov.l r0,@(40,r4) mov.l @(36,r5),r0 mov.l r0,@(36,r4) mov.l @(32,r5),r0 mov.l r0,@(32,r4) mov.l @(28,r5),r0 mov.l r0,@(28,r4) mov.l @(24,r5),r0 mov.l r0,@(24,r4) mov.l @(20,r5),r0 mov.l r0,@(20,r4) mov.l @(16,r5),r0 mov.l r0,@(16,r4) mov.l @(12,r5),r0 mov.l r0,@(12,r4) mov.l @(8,r5),r0 mov.l r0,@(8,r4) mov.l @(4,r5),r0 mov.l r0,@(4,r4) mov.l @(0,r5),r0 mov.l r0,@(0,r4) add #-16,r6 cmp/pl r6 bf done add #64,r5 bra ___movstr add #64,r4#endif#ifdef L_mulsi3 .global ___mulsi3! r4 = aabb! r5 = ccdd! r0 = aabb*ccdd via partial products!! if aa == 0 and cc = 0! r0 = bb*dd!! else! aa = bb*dd + (aa*dd*65536) + (cc*bb*65536)!___mulsi3: mulu r4,r5 ! multiply the lsws macl=bb*dd mov r5,r3 ! r3 = ccdd swap.w r4,r2 ! r2 = bbaa xtrct r2,r3 ! r3 = aacc tst r3,r3 ! msws zero ? bf hiset rts ! yes - then we have the answer sts macl,r0hiset: sts macl,r0 ! r0 = bb*dd mulu r2,r5 | brewing macl = aa*dd sts macl,r1 mulu r3,r4 | brewing macl = cc*bb sts macl,r2 add r1,r2 shll16 r2 rts add r2,r0#endif#ifdef L_sdivsi3 .title "SH DIVIDE"!! 4 byte integer Divide code for the Hitachi SH!!!! Steve Chamberlain!! sac@cygnus.com!!!!!! args in r4 and r5, result in r0 clobber r1,r2,r3 .global ___sdivsi3___sdivsi3: mov r4,r1 mov r5,r0 tst r0,r0 bt div0 mov #0,r2 div0s r2,r1 subc r3,r3 subc r2,r1 div0s r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 div1 r0,r3 rotcl r1 addc r2,r1 rts mov r1,r0div0: rts mov #0,r0#endif#ifdef L_udivsi3 .title "SH DIVIDE"!! 4 byte integer Divide code for the Hitachi SH!!!! Steve Chamberlain!! sac@cygnus.com!!!!!! args in r4 and r5, result in r0, clobbers r4, pr, and t bit .global ___udivsi3___udivsi3:longway: mov #0,r0 div0u ! get one bit from the msb of the numerator into the T ! bit and divide it by whats in r5. Put the answer bit ! into the T bit so it can come out again at the bottom rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0shortway: rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0vshortway: rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4 ; div1 r5,r0 rotcl r4ret: rts mov r4,r0#endif
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