sh.h

GCC编译器源代码

    }						\
}

#define ASM_OUTPUT_REG_PUSH(file, v) \
  fprintf ((file), "\tmov.l\tr%s,-@r15\n", (v));

#define ASM_OUTPUT_REG_POP(file, v) \
  fprintf ((file), "\tmov.l\t@r15+,r%s\n", (v));

/* The assembler's names for the registers.  RFP need not always be used as
   the Real framepointer; it can also be used as a normal general register.
   Note that the name `fp' is horribly misleading since `fp' is in fact only
   the argument-and-return-context pointer.  */
#define REGISTER_NAMES  				\
{				                   	\
  "r0", "r1", "r2",  "r3",  "r4",  "r5",  "r6",  "r7", 	\
  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",	\
  "ap", "pr", "t",  "gbr", "mach","macl", "fpul","rap", \
  "fr0","fr1","fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \
  "fr8","fr9","fr10","fr11","fr12","fr13","fr14","fr15",\
}

/* DBX register number for a given compiler register number.  */
/* GDB has FPUL at 23 and FP0 at 25, so we must add one to all FP registers
   to match gdb.  */
#define DBX_REGISTER_NUMBER(REGNO)	\
  (((REGNO) >= 22 && (REGNO) <= 39) ? ((REGNO) + 1) : (REGNO))

/* Output a label definition.  */
#define ASM_OUTPUT_LABEL(FILE,NAME) \
  do { assemble_name ((FILE), (NAME)); fputs (":\n", (FILE)); } while (0)

/* This is how to output an assembler line
   that says to advance the location counter
   to a multiple of 2**LOG bytes.  */

#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
  if ((LOG) != 0)			\
    fprintf ((FILE), "\t.align %d\n", (LOG))

/* Output a function label definition.  */
#define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
    ASM_OUTPUT_LABEL((STREAM), (NAME))

/* Output a globalising directive for a label.  */
#define ASM_GLOBALIZE_LABEL(STREAM,NAME)	\
  (fprintf ((STREAM), "\t.global\t"),		\
   assemble_name ((STREAM), (NAME)),		\
   fputc ('\n', (STREAM)))

/* The prefix to add to user-visible assembler symbols. */

#define USER_LABEL_PREFIX "_"

/* The prefix to add to an internally generated label. */

#define LOCAL_LABEL_PREFIX ""

/* Make an internal label into a string.  */
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
  sprintf ((STRING), "*%s%s%d", LOCAL_LABEL_PREFIX, (PREFIX), (NUM))

/* Output an internal label definition.  */
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
  asm_fprintf ((FILE), "%L%s%d:\n", (PREFIX), (NUM))

/* #define ASM_OUTPUT_CASE_END(STREAM,NUM,TABLE)	    */

/* Construct a private name.  */
#define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER)	\
  ((OUTVAR) = (char *) alloca (strlen (NAME) + 10),	\
   sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER)))

/* Jump tables must be 32 bit aligned, no matter the size of the element.  */
#define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \
  fprintf ((STREAM), "\t.align 2\n%s%d:\n",  (PREFIX), (NUM));

/* Output a relative address table.  */

#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,VALUE,REL)  			\
  switch (sh_addr_diff_vec_mode)					\
    {									\
    case SImode:							\
      asm_fprintf ((STREAM), "\t.long\t%LL%d-%LL%d\n", (VALUE),(REL));	\
      break;								\
    case HImode:							\
      asm_fprintf ((STREAM), "\t.word\t%LL%d-%LL%d\n", (VALUE),(REL));	\
      break;								\
    case QImode:							\
      asm_fprintf ((STREAM), "\t.byte\t%LL%d-%LL%d\n", (VALUE),(REL));	\
      break;								\
    }

/* Output an absolute table element.  */

#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE)  				\
  if (TARGET_BIGTABLE) 							\
    asm_fprintf ((STREAM), "\t.long\t%LL%d\n", (VALUE)); 			\
  else									\
    asm_fprintf ((STREAM), "\t.word\t%LL%d\n", (VALUE)); 			\

/* Output various types of constants.  */

/* This is how to output an assembler line defining a `double'.  */

#define ASM_OUTPUT_DOUBLE(FILE,VALUE)			\
do { char dstr[30];					\
     REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr);	\
     fprintf ((FILE), "\t.double %s\n", dstr);		\
   } while (0)

/* This is how to output an assembler line defining a `float' constant.  */
#define ASM_OUTPUT_FLOAT(FILE,VALUE)			\
do { char dstr[30];					\
     REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr);	\
     fprintf ((FILE), "\t.float %s\n", dstr);		\
   } while (0)

#define ASM_OUTPUT_INT(STREAM, EXP)		\
  (fprintf ((STREAM), "\t.long\t"),      	\
   output_addr_const ((STREAM), (EXP)),  	\
   fputc ('\n', (STREAM)))

#define ASM_OUTPUT_SHORT(STREAM, EXP)	\
  (fprintf ((STREAM), "\t.short\t"),	\
   output_addr_const ((STREAM), (EXP)),	\
   fputc ('\n', (STREAM)))

#define ASM_OUTPUT_CHAR(STREAM, EXP)		\
  (fprintf ((STREAM), "\t.byte\t"),      	\
   output_addr_const ((STREAM), (EXP)),  	\
   fputc ('\n', (STREAM)))

#define ASM_OUTPUT_BYTE(STREAM, VALUE)  	\
  fprintf ((STREAM), "\t.byte\t%d\n", (VALUE)) 	\

/* The next two are used for debug info when compiling with -gdwarf.  */
#define UNALIGNED_SHORT_ASM_OP	".uaword"
#define UNALIGNED_INT_ASM_OP	".ualong"

/* Loop alignment is now done in machine_dependent_reorg, so that
   branch shortening can know about it.  */

/* This is how to output an assembler line
   that says to advance the location counter by SIZE bytes.  */

#define ASM_OUTPUT_SKIP(FILE,SIZE) \
  fprintf ((FILE), "\t.space %d\n", (SIZE))

/* This says how to output an assembler line
   to define a global common symbol.  */

#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)	\
( fputs ("\t.comm ", (FILE)),			\
  assemble_name ((FILE), (NAME)),		\
  fprintf ((FILE), ",%d\n", (SIZE)))

/* This says how to output an assembler line
   to define a local common symbol.  */

#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)	\
( fputs ("\t.lcomm ", (FILE)),				\
  assemble_name ((FILE), (NAME)),			\
  fprintf ((FILE), ",%d\n", (SIZE)))

/* The assembler's parentheses characters.  */
#define ASM_OPEN_PAREN "("
#define ASM_CLOSE_PAREN ")"

/* Target characters.  */
#define TARGET_BELL	007
#define TARGET_BS	010
#define TARGET_TAB	011
#define TARGET_NEWLINE	012
#define TARGET_VT	013
#define TARGET_FF	014
#define TARGET_CR	015

/* A C statement to be executed just prior to the output of
   assembler code for INSN, to modify the extracted operands so
   they will be output differently.

   Here the argument OPVEC is the vector containing the operands
   extracted from INSN, and NOPERANDS is the number of elements of
   the vector which contain meaningful data for this insn.
   The contents of this vector are what will be used to convert the insn
   template into assembler code, so you can change the assembler output
   by changing the contents of the vector.  */

#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
  final_prescan_insn ((INSN), (OPVEC), (NOPERANDS))

/* Print operand X (an rtx) in assembler syntax to file FILE.
   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
   For `%' followed by punctuation, CODE is the punctuation and X is null.  */

#define PRINT_OPERAND(STREAM, X, CODE)  print_operand ((STREAM), (X), (CODE))

/* Print a memory address as an operand to reference that memory location.  */

#define PRINT_OPERAND_ADDRESS(STREAM,X)  print_operand_address ((STREAM), (X))

#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
  ((CHAR) == '.' || (CHAR) == '#' || (CHAR) == '@' || (CHAR) == ','	\
   || (CHAR) == '$')

extern struct rtx_def *sh_compare_op0;
extern struct rtx_def *sh_compare_op1;
extern struct rtx_def *prepare_scc_operands();

/* Which processor to schedule for.  The elements of the enumeration must
   match exactly the cpu attribute in the sh.md file.  */

enum processor_type {
  PROCESSOR_SH1,
  PROCESSOR_SH2,
  PROCESSOR_SH3,
  PROCESSOR_SH3E
};

#define sh_cpu_attr ((enum attr_cpu)sh_cpu)
extern enum processor_type sh_cpu;

extern enum machine_mode sh_addr_diff_vec_mode;

extern int optimize; /* needed for gen_casesi, and addr_diff_vec_adjust.  */

/* Declare functions defined in sh.c and used in templates.  */

extern char *output_branch();
extern char *output_ieee_ccmpeq();
extern char *output_branchy_insn();
extern char *output_shift();
extern char *output_movedouble();
extern char *output_movepcrel();
extern char *output_jump_label_table();
extern char *output_far_jump();

enum mdep_reorg_phase_e
{
  SH_BEFORE_MDEP_REORG,
  SH_INSERT_USES_LABELS,
  SH_SHORTEN_BRANCHES0,
  SH_FIXUP_PCLOAD,
  SH_SHORTEN_BRANCHES1,
  SH_AFTER_MDEP_REORG
};

void machine_dependent_reorg ();
int short_cbranch_p ();
int med_branch_p ();
int braf_branch_p ();
int align_length ();
int addr_diff_vec_adjust ();
struct rtx_def *sfunc_uses_reg ();

#define MACHINE_DEPENDENT_REORG(X) machine_dependent_reorg(X)

/* Generate calls to memcpy, memcmp and memset.  */

#define TARGET_MEM_FUNCTIONS

/* Define this macro if you want to implement any pragmas.  If defined, it
   is a C expression to be executed when #pragma is seen.  The
   argument FILE is the stdio input stream from which the source
   text can be read.  CH is the first character after the #pragma.  The
   result of the expression is the terminating character found
   (newline or EOF).  */
#define HANDLE_PRAGMA(FILE, NODE) handle_pragma ((FILE), (NODE))

/* Set when processing a function with pragma interrupt turned on.  */

extern int pragma_interrupt;

/* Set to an RTX containing the address of the stack to switch to
   for interrupt functions.  */
extern struct rtx_def *sp_switch;

/* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
   is a valid machine specific attribute for DECL.
   The attributes in ATTRIBUTES have previously been assigned to DECL.  */
extern int sh_valid_machine_decl_attribute ();
#define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, IDENTIFIER, ARGS) \
sh_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)


#define MOVE_RATIO (TARGET_SMALLCODE ? 2 : 16)

/* Instructions with unfilled delay slots take up an extra two bytes for
   the nop in the delay slot.  Instructions at the start of loops, or
   after unconditional branches, may take up extra room when they are
   aligned.  ??? We would get more accurate results if we did instruction
   alignment based on the value of INSN_CURRENT_ADDRESS; the approach used
   here is too conservative.  */

#define ADJUST_INSN_LENGTH(X, LENGTH)				\
  if (((GET_CODE (X) == INSN					\
	&& GET_CODE (PATTERN (X)) != USE			\
	&& GET_CODE (PATTERN (X)) != CLOBBER)			\
       || GET_CODE (X) == CALL_INSN				\
       || (GET_CODE (X) == JUMP_INSN				\
	   && GET_CODE (PATTERN (X)) != ADDR_DIFF_VEC		\
	   && GET_CODE (PATTERN (X)) != ADDR_VEC))		\
      && GET_CODE (PATTERN (NEXT_INSN (PREV_INSN (X)))) != SEQUENCE \
      && get_attr_needs_delay_slot (X) == NEEDS_DELAY_SLOT_YES)	\
    (LENGTH) += 2;						\
  if (GET_CODE (X) == INSN					\
      && GET_CODE (PATTERN (X)) == UNSPEC_VOLATILE		\
      && XINT (PATTERN (X), 1) == 7)				\
    (LENGTH) -= addr_diff_vec_adjust (X, LENGTH);		\
  if (GET_CODE (X) == INSN					\
      && GET_CODE (PATTERN (X)) == UNSPEC_VOLATILE		\
      && XINT (PATTERN (X), 1) == 1)				\
    (LENGTH) = align_length (X);				\
  if (GET_CODE (X) == JUMP_INSN					\
      && GET_CODE (PATTERN (X)) == ADDR_DIFF_VEC)		\
    {								\
      /* The code before an ADDR_DIFF_VEC is even aligned,	\
	 thus any odd estimate is wrong.  */			\
      (LENGTH) &= ~1;						\
      /* If not optimizing, the alignment is implicit.  */	\
      if (! optimize)						\
	(LENGTH) += 2;						\
    }

/* Enable a bug fix for the shorten_branches pass.  */
#define SHORTEN_WITH_ADJUST_INSN_LENGTH

/* Define the codes that are matched by predicates in sh.c.  */
#define PREDICATE_CODES \
  {"arith_operand", {SUBREG, REG, CONST_INT}},				\
  {"arith_reg_operand", {SUBREG, REG}},					\
  {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT}},			\
  {"braf_label_ref_operand", {LABEL_REF}},				\
  {"general_movsrc_operand", {SUBREG, REG, CONST_INT, MEM}},		\
  {"general_movdst_operand", {SUBREG, REG, CONST_INT, MEM}},		\
  {"logical_operand", {SUBREG, REG, CONST_INT}},			\
  {"register_operand", {SUBREG, REG}},

/* Define this macro if it is advisable to hold scalars in registers
   in a wider mode than that declared by the program.  In such cases, 
   the value is constrained to be within the bounds of the declared
   type, but kept valid in the wider mode.  The signedness of the
   extension may differ from that of the type.

   Leaving the unsignedp unchanged gives better code than always setting it
   to 0.  This is despite the fact that we have only signed char and short
   load instructions.  */
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
  if (GET_MODE_CLASS (MODE) == MODE_INT			\
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)		\
    (MODE) = SImode;

/* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
   extensions applied to char/short functions arguments.  Defining
   PROMOTE_FUNCTION_RETURN does the same for function returns.  */

#define PROMOTE_FUNCTION_ARGS
#define PROMOTE_FUNCTION_RETURN

/* ??? Define ACCUMULATE_OUTGOING_ARGS?  This is more efficient than pushing
   and poping arguments.  However, we do have push/pop instructio