pulse.sim.rpt

脉冲发生器

; |pulse|counter:u1|Equal0~74 ; |pulse|counter:u1|Equal0~74     ; combout          ;
; |pulse|c                    ; |pulse|c                        ; regout           ;
; |pulse|counter:u1|q[7]~846  ; |pulse|counter:u1|q[7]~846      ; combout          ;
; |pulse|counter:u1|q[7]      ; |pulse|counter:u1|q[7]          ; regout           ;
; |pulse|pr                   ; |pulse|pr                       ; combout          ;
; |pulse|counter:u1|q[6]      ; |pulse|counter:u1|q[6]          ; regout           ;
; |pulse|counter:u1|q[3]      ; |pulse|counter:u1|q[3]          ; regout           ;
; |pulse|counter:u1|q[2]      ; |pulse|counter:u1|q[2]          ; regout           ;
; |pulse|counter:u1|q[1]      ; |pulse|counter:u1|q[1]          ; regout           ;
; |pulse|counter:u1|q[0]      ; |pulse|counter:u1|q[0]          ; regout           ;
; |pulse|counter:u1|q[5]      ; |pulse|counter:u1|q[5]          ; regout           ;
; |pulse|counter:u1|q[4]      ; |pulse|counter:u1|q[4]          ; regout           ;
; |pulse|process0~48          ; |pulse|process0~48              ; combout          ;
; |pulse|process0~49          ; |pulse|process0~49              ; combout          ;
; |pulse|process0~50          ; |pulse|process0~50              ; combout          ;
; |pulse|counter:u2|q[7]      ; |pulse|counter:u2|q[7]          ; regout           ;
; |pulse|counter:u2|q[6]      ; |pulse|counter:u2|q[6]          ; regout           ;
; |pulse|counter:u2|q[3]      ; |pulse|counter:u2|q[3]          ; regout           ;
; |pulse|counter:u2|q[2]      ; |pulse|counter:u2|q[2]          ; regout           ;
; |pulse|counter:u2|q[1]      ; |pulse|counter:u2|q[1]          ; regout           ;
; |pulse|counter:u2|q[0]      ; |pulse|counter:u2|q[0]          ; regout           ;
; |pulse|counter:u2|q[5]      ; |pulse|counter:u2|q[5]          ; regout           ;
; |pulse|counter:u2|q[4]      ; |pulse|counter:u2|q[4]          ; regout           ;
; |pulse|channel              ; |pulse|channel                  ; padio            ;
; |pulse|clock                ; |pulse|clock~corein             ; combout          ;
+-----------------------------+---------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+---------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                        ;
+----------------------------+---------------------------------+------------------+
; Node Name                  ; Output Port Name                ; Output Port Type ;
+----------------------------+---------------------------------+------------------+
; |pulse|counter:u1|Add0~387 ; |pulse|counter:u1|Add0~388COUT1 ; cout1            ;
; |pulse|counter:u1|Add0~397 ; |pulse|counter:u1|Add0~398COUT1 ; cout1            ;
; |pulse|counter:u2|Add0~387 ; |pulse|counter:u2|Add0~388COUT1 ; cout1            ;
; |pulse|counter:u2|Add0~397 ; |pulse|counter:u2|Add0~398COUT1 ; cout1            ;
; |pulse|load                ; |pulse|load~corein              ; combout          ;
; |pulse|counter_able        ; |pulse|counter_able~corein      ; combout          ;
; |pulse|h_data[7]           ; |pulse|h_data[7]~corein         ; combout          ;
; |pulse|h_data[6]           ; |pulse|h_data[6]~corein         ; combout          ;
; |pulse|h_data[3]           ; |pulse|h_data[3]~corein         ; combout          ;
; |pulse|h_data[2]           ; |pulse|h_data[2]~corein         ; combout          ;
; |pulse|h_data[1]           ; |pulse|h_data[1]~corein         ; combout          ;
; |pulse|h_data[0]           ; |pulse|h_data[0]~corein         ; combout          ;
; |pulse|h_data[5]           ; |pulse|h_data[5]~corein         ; combout          ;
; |pulse|h_data[4]           ; |pulse|h_data[4]~corein         ; combout          ;
; |pulse|l_data[7]           ; |pulse|l_data[7]~corein         ; combout          ;
; |pulse|l_data[6]           ; |pulse|l_data[6]~corein         ; combout          ;
; |pulse|l_data[3]           ; |pulse|l_data[3]~corein         ; combout          ;
; |pulse|l_data[2]           ; |pulse|l_data[2]~corein         ; combout          ;
; |pulse|l_data[1]           ; |pulse|l_data[1]~corein         ; combout          ;
; |pulse|l_data[0]           ; |pulse|l_data[0]~corein         ; combout          ;
; |pulse|l_data[5]           ; |pulse|l_data[5]~corein         ; combout          ;
; |pulse|l_data[4]           ; |pulse|l_data[4]~corein         ; combout          ;
+----------------------------+---------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+---------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                        ;
+----------------------------+---------------------------------+------------------+
; Node Name                  ; Output Port Name                ; Output Port Type ;
+----------------------------+---------------------------------+------------------+
; |pulse|counter:u1|Add0~387 ; |pulse|counter:u1|Add0~388COUT1 ; cout1            ;
; |pulse|counter:u1|Add0~397 ; |pulse|counter:u1|Add0~398COUT1 ; cout1            ;
; |pulse|counter:u2|Add0~387 ; |pulse|counter:u2|Add0~388COUT1 ; cout1            ;
; |pulse|counter:u2|Add0~397 ; |pulse|counter:u2|Add0~398COUT1 ; cout1            ;
; |pulse|counter_able        ; |pulse|counter_able~corein      ; combout          ;
; |pulse|h_data[7]           ; |pulse|h_data[7]~corein         ; combout          ;
; |pulse|h_data[6]           ; |pulse|h_data[6]~corein         ; combout          ;
; |pulse|h_data[3]           ; |pulse|h_data[3]~corein         ; combout          ;
; |pulse|h_data[2]           ; |pulse|h_data[2]~corein         ; combout          ;
; |pulse|h_data[1]           ; |pulse|h_data[1]~corein         ; combout          ;
; |pulse|h_data[0]           ; |pulse|h_data[0]~corein         ; combout          ;
; |pulse|h_data[5]           ; |pulse|h_data[5]~corein         ; combout          ;
; |pulse|h_data[4]           ; |pulse|h_data[4]~corein         ; combout          ;
; |pulse|l_data[7]           ; |pulse|l_data[7]~corein         ; combout          ;
; |pulse|l_data[6]           ; |pulse|l_data[6]~corein         ; combout          ;
; |pulse|l_data[3]           ; |pulse|l_data[3]~corein         ; combout          ;
; |pulse|l_data[2]           ; |pulse|l_data[2]~corein         ; combout          ;
; |pulse|l_data[1]           ; |pulse|l_data[1]~corein         ; combout          ;
; |pulse|l_data[0]           ; |pulse|l_data[0]~corein         ; combout          ;
; |pulse|l_data[5]           ; |pulse|l_data[5]~corein         ; combout          ;
; |pulse|l_data[4]           ; |pulse|l_data[4]~corein         ; combout          ;
+----------------------------+---------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Processing started: Sat Mar 22 17:05:59 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off pulse -c pulse
Info: Using vector source file "C:/altera/72/quartus/pulse/pulse.vwf"
Warning: Found glitch at time 2.51 ns of duration 0.25 ns on node "|pulse|counter:u2|Add0~385"
Warning: Found glitch at time 2.51 ns of duration 0.33 ns on node "|pulse|counter:u2|Add0~387"
Warning: Found glitch at time 2.57 ns of duration 0.55 ns on node "|pulse|counter:u1|Add0~385"
Warning: Found glitch at time 2.57 ns of duration 0.63 ns on node "|pulse|counter:u1|Add0~387"
Warning: Found glitch at time 14.18 ns of duration 0.8 ns on node "|pulse|counter:u1|Add0~385"
Warning: Found glitch at time 14.38 ns of duration 0.79 ns on node "|pulse|counter:u1|Add0~387"
Warning: Found glitch at time 14.81 ns of duration 0.77 ns on node "|pulse|counter:u2|Add0~387"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Warning: Found glitch at time 1004.29 ns of duration 0.16 ns on node "|pulse|counter:u1|Equal0~73"
Warning: Found glitch at time 1004.42 ns of duration 0.08 ns on node "|pulse|counter:u1|Add0~389"
Warning: Found glitch at time 1004.43 ns of duration 0.08 ns on node "|pulse|counter:u1|Add0~389"
Warning: Found glitch at time 1004.94 ns of duration 0.59 ns on node "|pulse|counter:u1|Add0~389"
Warning: Found glitch at time 1005.02 ns of duration 0.08 ns on node "|pulse|counter:u1|Add0~399"
Warning: Found glitch at time 1005.1 ns of duration 0.74 ns on node "|pulse|counter:u1|Add0~391"
Warning: Found glitch at time 1005.32 ns of duration 0.8 ns on node "|pulse|counter:u1|Add0~393"
Warning: Found glitch at time 1804.79 ns of duration 0.3 ns on node "|pulse|counter:u1|Add0~393"
Warning: Found glitch at time 1804.8 ns of duration 0.3 ns on node "|pulse|counter:u1|Add0~393"
Warning: Found glitch at time 1805.32 ns of duration 0.8 ns on node "|pulse|counter:u1|Add0~393"
Warning: Found glitch at time 1805.4 ns of duration 0.3 ns on node "|pulse|counter:u1|Add0~391"
Warning: Found glitch at time 2604.57 ns of duration 0.23 ns on node "|pulse|counter:u1|Add0~391"
Warning: Found glitch at time 2604.58 ns of duration 0.24 ns on node "|pulse|counter:u1|Add0~391"
Warning: Found glitch at time 2604.65 ns of duration 0.23 ns on node "|pulse|counter:u1|Add0~389"
Warning: Found glitch at time 2604.66 ns of duration 0.24 ns on node "|pulse|counter:u1|Add0~389"
Warning: Found glitch at time 2604.83 ns of duration 0.23 ns on node "|pulse|counter:u1|Add0~399"
Warning: Found glitch at time 2605.1 ns of duration 0.74 ns on node "|pulse|counter:u1|Add0~391"
Warning: Found glitch at time 2605.17 ns of duration 0.23 ns on node "|pulse|counter:u1|Add0~389"
Warning: Found glitch at time 2605.25 ns of duration 0.23 ns on node "|pulse|counter:u1|Add0~399"
Warning: Found glitch at time 2605.32 ns of duration 0.8 ns on node "|pulse|counter:u1|Add0~393"
Warning: Found glitch at time 2605.45 ns of duration 0.23 ns on node "|pulse|counter:u1|Add0~387"
Warning: Found glitch at time 2605.45 ns of duration 0.23 ns on node "|pulse|counter:u1|Add0~397"
Warning: Found glitch at time 3404.66 ns of duration 0.37 ns on node "|pulse|counter:u1|Equal0~73"