db_disasm.cxx

C++ 编写的EROS RTOS

/*	$NetBSD: db_disasm.c,v 1.9 1995/02/05 13:59:38 mycroft Exp $	*/

/* 
 * Mach Operating System
 * Copyright (c) 1991,1990 Carnegie Mellon University
 * All Rights Reserved.
 * 
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 * 
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS 
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 * 
 * Carnegie Mellon requests users of this software to return to
 * 
 *  Software Distribution Coordinator  or  [e-mail]
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 * 
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 *
 *	Id: db_disasm.c,v 2.3 91/02/05 17:11:03 mrt (CMU)
 */

/*
 * Instruction disassembler.
 */
#include <arch-kerninc/db_machdep.hxx>

#include <ddb/db_access.hxx>
#include <ddb/db_sym.hxx>
#include <ddb/db_output.hxx>

/*
 * Size attributes
 */
#define	BYTE	0
#define	WORD	1
#define	LONG	2
#define	QUAD	3
#define	SNGL	4
#define	DBLR	5
#define	EXTR	6
#define	SDEP	7
#define	NONE	8

/*
 * Addressing modes
 */
#define	E	1			/* general effective address */
#define	Eind	2			/* indirect address (jump, call) */
#define	Ew	3			/* address, word size */
#define	Eb	4			/* address, byte size */
#define	R	5			/* register, in 'reg' field */
#define	Rw	6			/* word register, in 'reg' field */
#define	Ri	7			/* register in instruction */
#define	S	8			/* segment reg, in 'reg' field */
#define	Si	9			/* segment reg, in instruction */
#define	A	10			/* accumulator */
#define	BX	11			/* (bx) */
#define	CL	12			/* cl, for shifts */
#define	DX	13			/* dx, for IO */
#define	SI	14			/* si */
#define	DI	15			/* di */
#define	CR	16			/* control register */
#define	DR	17			/* debug register */
#define	TR	18			/* test register */
#define	I	19			/* immediate, unsigned */
#define	Is	20			/* immediate, signed */
#define	Ib	21			/* byte immediate, unsigned */
#define	Ibs	22			/* byte immediate, signed */
#define	Iw	23			/* word immediate, unsigned */
#define	Il	24			/* long immediate */
#define	O	25			/* direct address */
#define	Db	26			/* byte displacement from EIP */
#define	Dl	27			/* long displacement from EIP */
#define	o1	28			/* constant 1 */
#define	o3	29			/* constant 3 */
#define	OS	30			/* immediate offset/segment */
#define	ST	31			/* FP stack top */
#define	STI	32			/* FP stack */
#define	X	33			/* extended FP op */
#define	XA	34			/* for 'fstcw %ax' */

struct inst {
	char *	i_name;			/* name */
	short	i_has_modrm;		/* has regmodrm byte */
	short	i_size;			/* operand size */
	int	i_mode;			/* addressing modes */
	char *	i_extra;		/* pointer to extra opcode table */
};

#define	op1(x)		(x)
#define	op2(x,y)	((x)|((y)<<8))
#define	op3(x,y,z)	((x)|((y)<<8)|((z)<<16))

struct finst {
	char *	f_name;			/* name for memory instruction */
	int	f_size;			/* size for memory instruction */
	int	f_rrmode;		/* mode for rr instruction */
	char *	f_rrname;		/* name for rr instruction
					   (or pointer to table) */
};

char *	db_Grp6[] = {
	"sldt",
	"str",
	"lldt",
	"ltr",
	"verr",
	"verw",
	"",
	""
};

char *	db_Grp7[] = {
	"sgdt",
	"sidt",
	"lgdt",
	"lidt",
	"smsw",
	"",
	"lmsw",
	"invlpg"
};

char *	db_Grp8[] = {
	"",
	"",
	"",
	"",
	"bt",
	"bts",
	"btr",
	"btc"
};

struct inst db_inst_0f0x[] = {
/*00*/	{ "",	   true,  NONE,  op1(Ew),     (char *)db_Grp6 },
/*01*/	{ "",	   true,  NONE,  op1(Ew),     (char *)db_Grp7 },
/*02*/	{ "lar",   true,  LONG,  op2(E,R),    0 },
/*03*/	{ "lsl",   true,  LONG,  op2(E,R),    0 },
/*04*/	{ "",      false, NONE,  0,	      0 },
/*05*/	{ "",      false, NONE,  0,	      0 },
/*06*/	{ "clts",  false, NONE,  0,	      0 },
/*07*/	{ "",      false, NONE,  0,	      0 },

/*08*/	{ "invd",  false, NONE,  0,	      0 },
/*09*/	{ "wbinvd",false, NONE,  0,	      0 },
/*0a*/	{ "",      false, NONE,  0,	      0 },
/*0b*/	{ "",      false, NONE,  0,	      0 },
/*0c*/	{ "",      false, NONE,  0,	      0 },
/*0d*/	{ "",      false, NONE,  0,	      0 },
/*0e*/	{ "",      false, NONE,  0,	      0 },
/*0f*/	{ "",      false, NONE,  0,	      0 },
};

struct inst	db_inst_0f2x[] = {
/*20*/	{ "mov",   true,  LONG,  op2(CR,E),   0 }, /* use E for reg */
/*21*/	{ "mov",   true,  LONG,  op2(DR,E),   0 }, /* since mod == 11 */
/*22*/	{ "mov",   true,  LONG,  op2(E,CR),   0 },
/*23*/	{ "mov",   true,  LONG,  op2(E,DR),   0 },
/*24*/	{ "mov",   true,  LONG,  op2(TR,E),   0 },
/*25*/	{ "",      false, NONE,  0,	      0 },
/*26*/	{ "mov",   true,  LONG,  op2(E,TR),   0 },
/*27*/	{ "",      false, NONE,  0,	      0 },

/*28*/	{ "",      false, NONE,  0,	      0 },
/*29*/	{ "",      false, NONE,  0,	      0 },
/*2a*/	{ "",      false, NONE,  0,	      0 },
/*2b*/	{ "",      false, NONE,  0,	      0 },
/*2c*/	{ "",      false, NONE,  0,	      0 },
/*2d*/	{ "",      false, NONE,  0,	      0 },
/*2e*/	{ "",      false, NONE,  0,	      0 },
/*2f*/	{ "",      false, NONE,  0,	      0 },
};

struct inst	db_inst_0f8x[] = {
/*80*/	{ "jo",    false, NONE,  op1(Dl),     0 },
/*81*/	{ "jno",   false, NONE,  op1(Dl),     0 },
/*82*/	{ "jb",    false, NONE,  op1(Dl),     0 },
/*83*/	{ "jnb",   false, NONE,  op1(Dl),     0 },
/*84*/	{ "jz",    false, NONE,  op1(Dl),     0 },
/*85*/	{ "jnz",   false, NONE,  op1(Dl),     0 },
/*86*/	{ "jbe",   false, NONE,  op1(Dl),     0 },
/*87*/	{ "jnbe",  false, NONE,  op1(Dl),     0 },

/*88*/	{ "js",    false, NONE,  op1(Dl),     0 },
/*89*/	{ "jns",   false, NONE,  op1(Dl),     0 },
/*8a*/	{ "jp",    false, NONE,  op1(Dl),     0 },
/*8b*/	{ "jnp",   false, NONE,  op1(Dl),     0 },
/*8c*/	{ "jl",    false, NONE,  op1(Dl),     0 },
/*8d*/	{ "jnl",   false, NONE,  op1(Dl),     0 },
/*8e*/	{ "jle",   false, NONE,  op1(Dl),     0 },
/*8f*/	{ "jnle",  false, NONE,  op1(Dl),     0 },
};

struct inst	db_inst_0f9x[] = {
/*90*/	{ "seto",  true,  NONE,  op1(Eb),     0 },
/*91*/	{ "setno", true,  NONE,  op1(Eb),     0 },
/*92*/	{ "setb",  true,  NONE,  op1(Eb),     0 },
/*93*/	{ "setnb", true,  NONE,  op1(Eb),     0 },
/*94*/	{ "setz",  true,  NONE,  op1(Eb),     0 },
/*95*/	{ "setnz", true,  NONE,  op1(Eb),     0 },
/*96*/	{ "setbe", true,  NONE,  op1(Eb),     0 },
/*97*/	{ "setnbe",true,  NONE,  op1(Eb),     0 },

/*98*/	{ "sets",  true,  NONE,  op1(Eb),     0 },
/*99*/	{ "setns", true,  NONE,  op1(Eb),     0 },
/*9a*/	{ "setp",  true,  NONE,  op1(Eb),     0 },
/*9b*/	{ "setnp", true,  NONE,  op1(Eb),     0 },
/*9c*/	{ "setl",  true,  NONE,  op1(Eb),     0 },
/*9d*/	{ "setnl", true,  NONE,  op1(Eb),     0 },
/*9e*/	{ "setle", true,  NONE,  op1(Eb),     0 },
/*9f*/	{ "setnle",true,  NONE,  op1(Eb),     0 },
};

struct inst	db_inst_0fax[] = {
/*a0*/	{ "push",  false, NONE,  op1(Si),     0 },
/*a1*/	{ "pop",   false, NONE,  op1(Si),     0 },
/*a2*/	{ "cpuid", false, NONE,  0,	      0 },
/*a3*/	{ "bt",    true,  LONG,  op2(R,E),    0 },
/*a4*/	{ "shld",  true,  LONG,  op3(Ib,E,R), 0 },
/*a5*/	{ "shld",  true,  LONG,  op3(CL,E,R), 0 },
/*a6*/	{ "",      false, NONE,  0,	      0 },
/*a7*/	{ "",      false, NONE,  0,	      0 },

/*a8*/	{ "push",  false, NONE,  op1(Si),     0 },
/*a9*/	{ "pop",   false, NONE,  op1(Si),     0 },
/*aa*/	{ "",      false, NONE,  0,	      0 },
/*ab*/	{ "bts",   true,  LONG,  op2(R,E),    0 },
/*ac*/	{ "shrd",  true,  LONG,  op3(Ib,E,R), 0 },
/*ad*/	{ "shrd",  true,  LONG,  op3(CL,E,R), 0 },
/*a6*/	{ "",      false, NONE,  0,	      0 },
/*a7*/	{ "imul",  true,  LONG,  op2(E,R),    0 },
};

struct inst	db_inst_0fbx[] = {
/*b0*/	{ "cmpxchg",true, BYTE,	 op2(R, E),   0 },
/*b1*/	{ "cmpxchg",true, LONG,	 op2(R, E),   0 },
/*b2*/	{ "lss",   true,  LONG,  op2(E, R),   0 },
/*b3*/	{ "btr",   true,  LONG,  op2(R, E),   0 },
/*b4*/	{ "lfs",   true,  LONG,  op2(E, R),   0 },
/*b5*/	{ "lgs",   true,  LONG,  op2(E, R),   0 },
/*b6*/	{ "movzb", true,  LONG,  op2(E, R),   0 },
/*b7*/	{ "movzw", true,  LONG,  op2(E, R),   0 },

/*b8*/	{ "",      false, NONE,  0,	      0 },
/*b9*/	{ "",      false, NONE,  0,	      0 },
/*ba*/	{ "",      true,  LONG,  op2(Ib, E),  (char *)db_Grp8 },
/*bb*/	{ "btc",   true,  LONG,  op2(R, E),   0 },
/*bc*/	{ "bsf",   true,  LONG,  op2(E, R),   0 },
/*bd*/	{ "bsr",   true,  LONG,  op2(E, R),   0 },
/*be*/	{ "movsb", true,  LONG,  op2(E, R),   0 },
/*bf*/	{ "movsw", true,  LONG,  op2(E, R),   0 },
};

struct inst	db_inst_0fcx[] = {
/*c0*/	{ "xadd",  true,  BYTE,	 op2(R, E),   0 },
/*c1*/	{ "xadd",  true,  LONG,	 op2(R, E),   0 },
/*c2*/	{ "",	   false, NONE,	 0,	      0 },
/*c3*/	{ "",	   false, NONE,	 0,	      0 },
/*c4*/	{ "",	   false, NONE,	 0,	      0 },
/*c5*/	{ "",	   false, NONE,	 0,	      0 },
/*c6*/	{ "",	   false, NONE,	 0,	      0 },
/*c7*/	{ "",	   false, NONE,	 0,	      0 },
/*c8*/	{ "bswap", false, LONG,  op1(Ri),     0 },
/*c9*/	{ "bswap", false, LONG,  op1(Ri),     0 },
/*ca*/	{ "bswap", false, LONG,  op1(Ri),     0 },
/*cb*/	{ "bswap", false, LONG,  op1(Ri),     0 },
/*cc*/	{ "bswap", false, LONG,  op1(Ri),     0 },
/*cd*/	{ "bswap", false, LONG,  op1(Ri),     0 },
/*ce*/	{ "bswap", false, LONG,  op1(Ri),     0 },
/*cf*/	{ "bswap", false, LONG,  op1(Ri),     0 },
};

struct inst *db_inst_0f[] = {
	db_inst_0f0x,
	0,
	db_inst_0f2x,
	0,
	0,
	0,
	0,
	0,
	db_inst_0f8x,
	db_inst_0f9x,
	db_inst_0fax,
	db_inst_0fbx,
	db_inst_0fcx,
	0,
	0,
	0
};

char *	db_Esc92[] = {
	"fnop",	"",	"",	"",	"",	"",	"",	""
};
char *	db_Esc93[] = {
	"",	"",	"",	"",	"",	"",	"",	""
};
char *	db_Esc94[] = {
	"fchs",	"fabs",	"",	"",	"ftst",	"fxam",	"",	""
};
char *	db_Esc95[] = {
	"fld1",	"fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz",""
};
char *	db_Esc96[] = {
	"f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp",
	"fincstp"
};
char *	db_Esc97[] = {
	"fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos"
};

char *	db_Esca4[] = {
	"",	"fucompp","",	"",	"",	"",	"",	""
};

char *	db_Escb4[] = {
	"",	"",	"fnclex","fninit","",	"",	"",	""
};

char *	db_Esce3[] = {
	"",	"fcompp","",	"",	"",	"",	"",	""
};

char *	db_Escf4[] = {
	"fnstsw","",	"",	"",	"",	"",	"",	""
};

struct finst db_Esc8[] = {
/*0*/	{ "fadd",   SNGL,  op2(STI,ST),	0 },
/*1*/	{ "fmul",   SNGL,  op2(STI,ST),	0 },
/*2*/	{ "fcom",   SNGL,  op2(STI,ST),	0 },
/*3*/	{ "fcomp",  SNGL,  op2(STI,ST),	0 },
/*4*/	{ "fsub",   SNGL,  op2(STI,ST),	0 },
/*5*/	{ "fsubr",  SNGL,  op2(STI,ST),	0 },
/*6*/	{ "fdiv",   SNGL,  op2(STI,ST),	0 },
/*7*/	{ "fdivr",  SNGL,  op2(STI,ST),	0 },
};

struct finst db_Esc9[] = {
/*0*/	{ "fld",    SNGL,  op1(STI),	0 },
/*1*/	{ "",       NONE,  op1(STI),	"fxch" },
/*2*/	{ "fst",    SNGL,  op1(X),	(char *)db_Esc92 },
/*3*/	{ "fstp",   SNGL,  op1(X),	(char *)db_Esc93 },
/*4*/	{ "fldenv", NONE,  op1(X),	(char *)db_Esc94 },
/*5*/	{ "fldcw",  NONE,  op1(X),	(char *)db_Esc95 },
/*6*/	{ "fnstenv",NONE,  op1(X),	(char *)db_Esc96 },
/*7*/	{ "fnstcw", NONE,  op1(X),	(char *)db_Esc97 },
};

struct finst db_Esca[] = {
/*0*/	{ "fiadd",  WORD,  0,		0 },
/*1*/	{ "fimul",  WORD,  0,		0 },
/*2*/	{ "ficom",  WORD,  0,		0 },
/*3*/	{ "ficomp", WORD,  0,		0 },
/*4*/	{ "fisub",  WORD,  op1(X),	(char *)db_Esca4 },
/*5*/	{ "fisubr", WORD,  0,		0 },
/*6*/	{ "fidiv",  WORD,  0,		0 },
/*7*/	{ "fidivr", WORD,  0,		0 }
};

struct finst db_Escb[] = {
/*0*/	{ "fild",   WORD,  0,		0 },
/*1*/	{ "",       NONE,  0,		0 },
/*2*/	{ "fist",   WORD,  0,		0 },
/*3*/	{ "fistp",  WORD,  0,		0 },
/*4*/	{ "",       WORD,  op1(X),	(char *)db_Escb4 },
/*5*/	{ "fld",    EXTR,  0,		0 },
/*6*/	{ "",       WORD,  0,		0 },
/*7*/	{ "fstp",   EXTR,  0,		0 },
};

struct finst db_Escc[] = {
/*0*/	{ "fadd",   DBLR,  op2(ST,STI),	0 },
/*1*/	{ "fmul",   DBLR,  op2(ST,STI),	0 },
/*2*/	{ "fcom",   DBLR,  op2(ST,STI),	0 },
/*3*/	{ "fcomp",  DBLR,  op2(ST,STI),	0 },
/*4*/	{ "fsub",   DBLR,  op2(ST,STI),	"fsubr" },
/*5*/	{ "fsubr",  DBLR,  op2(ST,STI),	"fsub" },
/*6*/	{ "fdiv",   DBLR,  op2(ST,STI),	"fdivr" },
/*7*/	{ "fdivr",  DBLR,  op2(ST,STI),	"fdiv" },
};

struct finst db_Escd[] = {
/*0*/	{ "fld",    DBLR,  op1(STI),	"ffree" },
/*1*/	{ "",       NONE,  0,		0 },
/*2*/	{ "fst",    DBLR,  op1(STI),	0 },
/*3*/	{ "fstp",   DBLR,  op1(STI),	0 },
/*4*/	{ "frstor", NONE,  op1(STI),	"fucom" },
/*5*/	{ "",       NONE,  op1(STI),	"fucomp" },
/*6*/	{ "fnsave", NONE,  0,		0 },
/*7*/	{ "fnstsw", NONE,  0,		0 },
};

struct finst db_Esce[] = {
/*0*/	{ "fiadd",  LONG,  op2(ST,STI),	"faddp" },
/*1*/	{ "fimul",  LONG,  op2(ST,STI),	"fmulp" },
/*2*/	{ "ficom",  LONG,  0,		0 },
/*3*/	{ "ficomp", LONG,  op1(X),	(char *)db_Esce3 },
/*4*/	{ "fisub",  LONG,  op2(ST,STI),	"fsubrp" },
/*5*/	{ "fisubr", LONG,  op2(ST,STI),	"fsubp" },
/*6*/	{ "fidiv",  LONG,  op2(ST,STI),	"fdivrp" },
/*7*/	{ "fidivr", LONG,  op2(ST,STI),	"fdivp" },
};

struct finst db_Escf[] = {
/*0*/	{ "fild",   LONG,  0,		0 },
/*1*/	{ "",       LONG,  0,		0 },
/*2*/	{ "fist",   LONG,  0,		0 },
/*3*/	{ "fistp",  LONG,  0,		0 },
/*4*/	{ "fbld",   NONE,  op1(XA),	(char *)db_Escf4 },
/*5*/	{ "fld",    QUAD,  0,		0 },
/*6*/	{ "fbstp",  NONE,  0,		0 },
/*7*/	{ "fstp",   QUAD,  0,		0 },
};

struct finst *db_Esc_inst[] = {
	db_Esc8, db_Esc9, db_Esca, db_Escb,
	db_Escc, db_Escd, db_Esce, db_Escf
};

char *	db_Grp1[] = {
	"add",
	"or",
	"adc",