s12_pwm.h

PWM Generation Using HCS12 Timer Channels

/*****************************************************************************/
/*                                             COPYRIGHT (c) MOTOROLA 2002   */
/*                                                                           */
/* File Name          :    $RCSfile: s12_pwm.h,v $							 */
/*                                                                           */
/* Current Revision :      $Revision: 1.2 $                                  */
/*                                                                           */
/* PURPOSE: header file for HCS12 PWM register block	   			 		 */
/*                                                                           */
/*  ***********************************************************************  */
/*  *  THIS CODE IS ONLY INTENDED AS AN EXAMPLE OF CODE FOR THE           *  */
/*  *  METROWERKS COMPILER AND THE STAR12 EVB AND HAS ONLY BEEN GIVEN A   *  */
/*  *  MIMIMUM LEVEL OF TEST. IT IS PROVIDED 'AS SEEN' WITH NO GUARANTEES *  */
/*  *  AND NO PROMISE OF SUPPORT.                                         *  */
/*  ***********************************************************************  */
/*                                                                           */
/*                                                                           */
/* DESCRIPTION:  Defines the 8 channel Pulse Width Modulator register block  */
/*               as a datastructure of type tPWM.                            */
/* 																		     */
/* PWM module base address (out of reset) -                                  */
/*                                                                           */
/* S12DP256      : 0x00A0                                                    */
/*																			 */
/* The datastructure compiled can be determined by the #define's S12DP256,   */
/* S12xxx, etc. These definitions can be found in "s12_common.h".            */
/* The MCU id can be #defined in a "target.h" header file or included as a   */
/* complier command line argument as -DS12DP256.                             */
/* Currently only S12DP256 is supported.									 */
/*																			 */
/* Multiple register descriptions are used when a differing bit structure    */
/* exists between parts. In the case of additional bit definitions within    */
/* the same register, then only the full register description is used.       */
/*                                                                           */
/*                                                                           */
/* AUTHOR: R32151            LOCATION: SPSEKB      LAST EDIT DATE: 14/03/02  */
/*                                                                           */
/* UPDATE HISTORY                                                            */
/* REV  AUTHOR       DATE       DESCRIPTION OF CHANGE                        */
/* ---  ------      --------    ---------------------                        */
/* 1.00	r32151  	28/04/00                                                 */
/* 1.01	r32151  	09/05/00  	- fixed typo in #define PCKA 0x07            */
/*                                (it was incorrectly PCKB)                  */
/* 1.02 r32151  	10/05/00 	- added missing '}tPWM;' at end of pwm       */
/*                                structure type			                 */
/*     							- Changed #include <s12_common.h> 		     */
/* 							      to #include "s12_common.h"			     */
/* 1.1  r32151      11/03/02	- Added disclaimer and reformated file info. */
/*                              - Modified revision numbering to match RCS   */
/* 1.2  r32151      14/03/02	- Declared all registers volatile 			 */
/*                              - changed tU08 declarations in structure to  */
/*                                tREG08 to standardise all accesses as      */
/*                                using .bit or .byte format                 */
/*                                                                           */
/*===========================================================================*/
/* Motorola reserves the right to make changes without further notice to any */
/* product herein to improve reliability, function, or design. Motorola does */
/* not assume any  liability arising  out  of the  application or use of any */
/* product,  circuit, or software described herein;  neither  does it convey */
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/* products are not designed, intended,  or authorized for use as components */
/* in  systems  intended  for  surgical  implant  into  the  body, or  other */
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/* which the failure of the Motorola product  could create a situation where */
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/* indirectly,  any claim of personal injury  or death  associated with such */
/* unintended or unauthorized use, even if such claim alleges that  Motorola */
/* was negligent regarding the  design  or manufacture of the part. Motorola */
/* and the Motorola logo* are registered trademarks of Motorola Ltd.         */
/*****************************************************************************/


#ifndef S12_PWM_H           /*prevent duplicated includes */
#define S12_PWM_H

#ifndef S12_COMMON_H        /*prevent duplicated includes */
#include "s12_common.h"
#endif

typedef union uPWME
  {
  tU08  byte;
  struct
    {
    tU08 pwme0  :1;     /*pwm channel enable */
    tU08 pwme1  :1;
    tU08 pwme2  :1;
    tU08 pwme3  :1;
    tU08 pwme4  :1;     
    tU08 pwme5  :1;
    tU08 pwme6  :1;
    tU08 pwme7  :1;
    }bit;
  }tPWME;

#define PWME0   0x01    /*bit masks */
#define PWME1   0x02
#define PWME2   0x04
#define PWME3   0x08
#define PWME4   0x10
#define PWME5   0x20
#define PWME6   0x40
#define PWME7   0x80

typedef union uPWMPOL
  {
  tU08  byte;
  struct
    {
    tU08 ppol0  :1;     /*pwm channel polarity */
    tU08 ppol1  :1;
    tU08 ppol2  :1;
    tU08 ppol3  :1;
    tU08 ppol4  :1;     
    tU08 ppol5  :1;
    tU08 ppol6  :1;
    tU08 ppol7  :1;
    }bit;
  }tPWMPOL;

#define PPOL0   0x01    /*bit masks */
#define PPOL1   0x02
#define PPOL2   0x04
#define PPOL3   0x08
#define PPOL4   0x10
#define PPOL5   0x20
#define PPOL6   0x40
#define PPOL7   0x80

typedef union uPWMCLK
  {
  tU08  byte;
  struct
    {
    tU08 pclk0  :1;     /*pwm clock select */
    tU08 pclk1  :1;
    tU08 pclk2  :1;
    tU08 pclk3  :1;
    tU08 pclk4  :1;     
    tU08 pclk5  :1;
    tU08 pclk6  :1;
    tU08 pclk7  :1;
    }bit;
  }tPWMCLK;

#define PCLK0   0x01    /*bit masks */
#define PCLK1   0x02
#define PCLK2   0x04
#define PCLK3   0x08
#define PCLK4   0x10
#define PCLK5   0x20
#define PCLK6   0x40
#define PCLK7   0x80

typedef union uPWMPRCLK
  {
  tU08  byte;
  struct
    {
    tU08 pcka   :3;     /*prescaler for clock B (1,2,4,8,16,32,64,128) */
    tU08        :1;     /*not used*/                                   
    tU08 pckb   :3;     /*prescaler for clock A (1,2,4,8,16,32,64,128) */
    tU08        :1;     /*not used */                                      
    }bit;
  }tPWMPRCLK;

#define PCKA0   0x01    /*bit masks */
#define PCKA1   0x02
#define PCKA2   0x04
#define PCKA    0x07    /*prescaler A mask */
#define PCKB0   0x10
#define PCKB1   0x20
#define PCKB2   0x40    
#define PCKB    0x70    /*prescaler B mask */


typedef union uPWMCAE
  {
  tU08  byte;
  struct
    {
    tU08 cae0   :1;     /*pwm channel centre align enable */
    tU08 cae1   :1;
    tU08 cae2   :1;
    tU08 cae3   :1;
    tU08 cae4   :1;     
    tU08 cae5   :1;
    tU08 cae6   :1;
    tU08 cae7   :1;
    }bit;
  }tPWMCAE;

#define CAE0    0x01    /*bit masks */
#define CAE1    0x02
#define CAE2    0x04
#define CAE3    0x08
#define CAE4    0x10
#define CAE5    0x20
#define CAE6    0x40
#define CAE7    0x80

typedef union uPWMCTL
  { 
  tU08  byte;
  struct
    {
    tU08        :2;     /*not used */
    tU08 pfrz   :1;     /*pwm stops in freeze mode*/
    tU08 pswai  :1;     /*pwm stops in wait mode */
    tU08 con01  :1;     /*concatenate channels 6 & 7 */
    tU08 con23  :1;     /*concatenate channels 6 & 7 */
    tU08 con45  :1;     /*concatenate channels 6 & 7 */
    tU08 con67  :1;     /*concatenate channels 6 & 7 */
    }bit;
  }tPWMCTL;

#define PFRZ    0x04    /*bit masks */
#define PSWAI   0x08
#define CON01   0x10
#define CON23   0x20
#define CON45   0x40
#define CON67   0x80

typedef union uPWMSDN
  {
  tU08  byte;
  struct
    {
    tU08 pwm7en     :1;     /*emergency shutdown enable */
    tU08 pwm7inl    :1;     /*shutdown i/p polarity (ch7) */
    tU08 pwm7in     :1;     /*ch7 i/p pin state */
    tU08            :1;     
    tU08 pwmlvl     :1;     /* shutdown output level */
    tU08 pwmrstrt   :1;     /* restart control */
    tU08 pwmie      :1;     /* pwm interrupt enable */
    tU08 pwmif      :1;     /* pwm interrupt flag */
    }bit;
  }tPWMSDN;

#define PWM7EN      0x01    /*bit masks */
#define PWM7INL     0x02
#define PWM7IN      0x04
#define PWMLVL      0x10
#define PWMRSTRT    0x20
#define PWMIE       0x40
#define PWMIF       0x80

typedef struct                  /*pwm module used on the mscDP256 */
  {
  volatile tPWME      pwme;       /*pwm enable */
  volatile tPWMPOL    pwmpol;     /*pwm polarity  */
  volatile tPWMCLK    pwmclk;     /*pwm clocks select */
  volatile tPWMPRCLK  pwmprclk;   /*pwm prescale clock select*/
  volatile tPWMCAE    pwmcae;     /*pwm center align enable*/
  volatile tPWMCTL    pwmctl;     /*pwm control register */
  volatile tREG08     pwmtst;     /*pwm special mode test register */
  volatile tREG08     pwmprsc;    /*pwm reserved register */
  volatile tREG08     pwmscla;   /*pwm scale register A*/
  volatile tREG08     pwmsclb;   /*pwm scale register B*/
  volatile tU08       pwmscnt[2]; /*pwm reserved test */
  
  #ifndef S12C32
  
  volatile tREG08     pwmcnt[8];  /*pwm channel counters */
  volatile tREG08     pwmper[8];  /*pwm channel period counters */
  volatile tREG08     pwmdty[8];  /*pwm channel duty counters */
  volatile tPWMSDN    pwmsdn;     /*pwm shutdown register*/
  volatile tU08		  pwmrsv[3];  /*reserved */
  
  #else 
  
  volatile tREG08     pwmcnt[6];  /*pwm channel counters */
  volatile tREG08     pwmper[6];  /*pwm channel period counters */
  volatile tREG08     pwmdty[6];  /*pwm channel duty counters */
  volatile tPWMSDN    pwmsdn;     /*pwm shutdown register*/
  volatile tU08		  pwmrsv;  /*reserved */
  
  #endif /*S12C32 */
  }tPWM;
#endif /*S12_PWM_H */