s12_register.h

PWM Generation Using HCS12 Timer Channels

  tU08  byte;
  struct
    {
    tU08        :4;     /*not used */
    tU08 bktag  :1;     
    tU08 bkbdm  :1;
    tU08 bkfull :1;     
    tU08 bken   :1;     /*breakpoint mode enable */
    }bit;
  }tBKPCT0;

#define BKTAG   0x10
#define BKBDM   0x20
#define BKFULL  0x40
#define BKEN    0x80


typedef union uBKPCT1
  {
  tU08  byte;
  struct
    {
    tU08 bk1rw  :1;    
    tU08 bk1rwe :1;    
    tU08 bk0rw  :1;     
    tU08 bk0rwe :1;   
    tU08 bk1mbl :1;    
    tU08 bk1mbh :1;    
    tU08 bk0mbl :1;     
    tU08 bk0mbh :1;    
    }bit;
  }tBKPCT1;

#define BK1RW   0x01    /*bit masks */
#define BK1RWE  0x02
#define BK0RW   0x04
#define BK0RWE  0x08
#define BK1MBL  0x10
#define BK1MBH  0x20
#define BK0Mbl  0x40
#define BK0MBH  0x80


typedef union uBKP0X
  {
  tU08  byte;
  struct
    {
    tU08 bk0v   :6;     /* */
    tU08        :2;     /*not used */

    }bit;
  }tBKP0X;

#define BK0V0   0x01    /*bit masks */
#define BK0V1   0x02
#define BK0V2   0x04
#define BK0V3   0x08
#define BK0V4   0x10
#define BK0V5   0x20


typedef union uBKP0
  {
  tU16  word;
  struct
    {
    tU08 high;
    tU08 low;
    }byte;
  }tBKP0;


typedef union uBKP1X
  {
  tU08  byte;
  struct
    {
    tU08 bk1v   :6;     /* */
    tU08        :2;     /*not used */

    }bit;
  }tBKP1X;

#define BK1V0   0x01    /*bit masks */
#define BK1V1   0x02
#define BK1V2   0x04
#define BK1V3   0x08
#define BK1V4   0x10
#define BK1V5   0x20


typedef union uBKP1
  {
  tU16  word;
  struct
    {
    tU08 high;
    tU08 low;
    }byte;
  }tBKP1;


typedef union uDBGC1	/*debug control register 1 */
  {
  tU08  byte;
  struct
    {
    tU08 capmod :2;
    tU08        :1;  	/*not used */
    tU08 dbgbrk :1;
    tU08 begin	:1;
    tU08 trgsel	:1;
    tU08 arm   	:1;
    tU08 dbgen 	:1;         
    }bit;
  }tDBGC1;

#define CAPMOD0 0x01	/*bit masks */
#define CAPMOD1 0x02
#define DBGBRK  0x08
#define BEGIN   0x10
#define TRGSEL  0x20
#define ARM		0x40 
#define DBGEN	0x80	
  

typedef union uDBGSC 		/*debug status and control register */
  {
  tU08  byte;
  struct
    {
    tU08 trg    :4;
    tU08  		:1;
    tU08 cf	 	:1;     
    tU08 bf		:1;     
    tU08 af		:1;        
    }bit;
  }tDBGSC;

#define TRG0   	0x01		 /*bit masks */
#define TRG1  	0x02   
#define TRG2 	0x04
#define TRG3  	0x08
#define CF   	0x20
#define BF 		0x40
#define AF		0x80


typedef union uDBGTBH		/*debug trace buffer high register */
  {
  tU08  byte;
  struct
    {
    tU08 dbgtbh8  :1;     
    tU08 dbgtbh9  :1;     
    tU08 dbgtbh10 :1;
    tU08 dbgtbh11 :1;
    tU08 dbgtbh12 :1;
    tU08 dbgtbh13 :1;
    tU08 dbgtbh14 :1;     
    tU08 dbgtbh15 :1;     
    }bit;
  }tDBGTBH;

#define DBGTBH8   	0x01	/*bit masks */
#define DBGTBH9    	0x02   
#define DBGTBH10    0x04
#define DBGTBH11	0x08
#define DBGTBH12   	0x10
#define DBGTBH13   	0x20
#define DBGTBH14   	0x40
#define DBGTBH15   	0x80

typedef union uDBGTBL		/*debug trace buffer low register */
  {
  tU08  byte;
  struct
    {
    tU08 dbgtbl0 :1;     
    tU08 dbgtbl1 :1;     
    tU08 dbgtbl2 :1;
    tU08 dbgtbl3 :1;
    tU08 dbgtbl4 :1;
    tU08 dbgtbl5 :1;
    tU08 dbgtbl6 :1;     
    tU08 dbgtbl7 :1;     
    }bit;
  }tDBGTBL;

#define  DBGTBL0  0x01		 /*bit masks */
#define  DBGTBL1  0x02   
#define  DBGTBL2  0x04
#define  DBGTBL3  0x08
#define  DBGTBL4  0x10
#define  DBGTBL5  0x20
#define  DBGTBL6  0x40
#define  DBGTBL7  0x80


typedef union uDBGTB   		/*combined trace buffer structure */
  {                    
  tU16  word;           
  struct             
    {
    tU08 dbgtbh;
    tU08 dbgtbl;
    }byte;
  }tDBGTB;


typedef union uDBGCNT		/*debug count register */
  {
  tU08  byte;
  struct
    {
	tU08 cnt :6;   
    tU08     :1;			/*unused */     
    tU08 tbf :1;     
    }bit;
  }tDBGCNT;

#define DBCNT0   0x01		/*bit masks */
#define DBCNT1   0x02   
#define DBCNT2   0x04
#define DBCNT3   0x08
#define DBCNT4   0x10
#define DBCNT5   0x20
#define TBF   	 0x80


typedef union uDBGCCX		/*debug comparator C extended register */
  {
  tU08  byte;
  struct
    {
    tU08 extcmp :6;     
    tU08 pagsel :2;         
    }bit;
  }tDBGCCX;

#define EXTCMP0   0x01		 /*bit masks */
#define EXTCMP1   0x02   
#define EXTCMP2   0x04
#define EXTCMP3   0x08
#define EXTCMP4   0x10
#define EXTCMP5   0x20
#define PAGSEL0   0x40
#define PAGSEL1   0x80


typedef union uDBGCCH		/* debug comparator C high register */
  {
  tU08  byte;
  struct
    {
    tU08 dbgcch8  :1;     
    tU08 dbgcch9  :1;     
    tU08 dbgcch10 :1;
    tU08 dbgcch11 :1;
    tU08 dbgcch12 :1;
    tU08 dbgcch13 :1;
    tU08 dbgcch14 :1;     
    tU08 dbgcch15 :1;     
    }bit;
  }tDBGCCH;

#define  DBGCCH8  0x01	 	/*bit masks */
#define  DBGCCH9  0x02   
#define  DBGCCH10 0x04
#define  DBGCCH11 0x08
#define  DBGCCH12 0x10
#define  DBGCCH13 0x20
#define  DBGCCH14 0x40
#define  DBGCCH15 0x80


typedef union uDBGCCL		/* debug comparator C low register */
  {
  tU08  byte;
  struct
    {
    tU08 dbgccl0 :1;     
    tU08 dbgccl1 :1;     
    tU08 dbgccl2 :1;
    tU08 dbgccl3 :1;
    tU08 dbgccl4 :1;
    tU08 dbgccl5 :1;
    tU08 dbgccl6 :1;     
    tU08 dbgccl7 :1;     
    }bit;
  }tDBGCCL;

#define  DBGCCL0  0x01		 /*bit masks */
#define  DBGCCL1  0x02   
#define  DBGCCL2  0x04
#define  DBGCCL3  0x08
#define  DBGCCL4  0x10
#define  DBGCCL5  0x20
#define  DBGCCL6  0x40
#define  DBGCCL7  0x80


typedef union uDBGCC   		/*combined comparator C structure */
  {                    
  tU16  word;           
  struct             
    {
    tU08 dbgcch;
    tU08 dbgccl;
    }byte;
  }tDBGCC;


typedef union uDBGC2		/*debug control register 2 */
  {
  tU08  byte;
  struct
    {
    tU08 rwc	:1;     
    tU08 rwcen	:1;     
    tU08 tagc	:1;
    tU08 bkcen	:1;
    tU08 tagab	:1;
    tU08 bdm	:1;
    tU08 full	:1;     
    tU08 bkaben	:1;     
    }bit;
  }tDBGC2;

#define  RWC	0x01		 /*bit masks */
#define  RWCEN	0x02   
#define  TAGC	0x04
#define  BKCEN  0x08
#define  TAGAB	0x10
#define  BDM	0x20
#define  FULL	0x40
#define  BKABEN 0x80


typedef union uDBGC3		/*debug control register 3 */
  {
  tU08  byte;
  struct
    {
    tU08 rwb	:1;     
    tU08 rwben	:1;     
    tU08 rwa 	:1;
    tU08 rwaen	:1;
    tU08 bkbmbl	:1;
    tU08 bkbmbh :1;
    tU08 bkambl	:1;     
    tU08 bkambh	:1;     
    }bit;
  }tDBGC3;

#define  RWB	0x01		 /*bit masks */
#define  RWBEN	0x02   
#define  RWA	0x04
#define  RWAEN  0x08
#define  BKBMBL	0x10
#define  BKBMBH	0x20
#define  BKAMBL	0x40
#define  BKAMBH 0x80  
  
  
typedef union uDBGCAX		/*debug comparator A extended register */
  {
  tU08  byte;
  struct
    {
    tU08 extcmp :6;     
    tU08 pagsel :2;         
    }bit;
  }tDBGCAX;


typedef union uDBGCAH		/* debug comparator A high register */
  {
  tU08  byte;
  struct
    {
    tU08 dbgcah8  :1;     
    tU08 dbgcah9  :1;     
    tU08 dbgcah10 :1;
    tU08 dbgcah11 :1;
    tU08 dbgcah12 :1;
    tU08 dbgcah13 :1;
    tU08 dbgcah14 :1;     
    tU08 dbgcah15 :1;     
    }bit;
  }tDBGCAH;

#define  DBGCAH8  0x01	 	/*bit masks */
#define  DBGCAH9  0x02   
#define  DBGCAH10 0x04
#define  DBGCAH11 0x08
#define  DBGCAH12 0x10
#define  DBGCAH13 0x20
#define  DBGCAH14 0x40
#define  DBGCAH15 0x80


typedef union uDBGCAL		/* debug comparator A low register */
  {
  tU08  byte;
  struct
    {
    tU08 dbgcal0 :1;     
    tU08 dbgcal1 :1;     
    tU08 dbgcal2 :1;
    tU08 dbgcal3 :1;
    tU08 dbgcal4 :1;
    tU08 dbgcal5 :1;
    tU08 dbgcal6 :1;     
    tU08 dbgcal7 :1;     
    }bit;
  }tDBGCAL;

#define  DBGCAL0  0x01		 /*bit masks */
#define  DBGCAL1  0x02   
#define  DBGCAL2  0x04
#define  DBGCAL3  0x08
#define  DBGCAL4  0x10
#define  DBGCAL5  0x20
#define  DBGCAL6  0x40
#define  DBGCAL7  0x80

typedef union uDBGCA   		/*combined comparator A structure */
  {                    
  tU16  word;           
  struct             
    {
    tU08 dbgcah;
    tU08 dbgcal;
    }byte;
  }tDBGCA;

typedef union uDBGCBX		/*debug comparator B extended register */
  {
  tU08  byte;
  struct
    {
    tU08 extcmp :6;     
    tU08 pagsel :2;         
    }bit;
  }tDBGCBX;


typedef union uDBGCBH		/* debug comparator B high register */
  {
  tU08  byte;
  struct
    {
    tU08 dbgcbh8  :1;     
    tU08 dbgcbh9  :1;     
    tU08 dbgcbh10 :1;
    tU08 dbgcbh11 :1;
    tU08 dbgcbh12 :1;
    tU08 dbgcbh13 :1;
    tU08 dbgcbh14 :1;     
    tU08 dbgcbh15 :1;     
    }bit;
  }tDBGCBH;

#define  DBGCBH8  0x01	 	/*bit masks */
#define  DBGCBH9  0x02   
#define  DBGCBH10 0x04
#define  DBGCBH11 0x08
#define  DBGCBH12 0x10
#define  DBGCBH13 0x20
#define  DBGCBH14 0x40
#define  DBGCBH15 0x80


typedef union uDBGCBL		/* debug comparator B low register */
  {
  tU08  byte;
  struct
    {
    tU08 dbgcbl0 :1;     
    tU08 dbgcbl1 :1;     
    tU08 dbgcbl2 :1;
    tU08 dbgcbl3 :1;
    tU08 dbgcbl4 :1;
    tU08 dbgcbl5 :1;
    tU08 dbgcbl6 :1;     
    tU08 dbgcbl7 :1;     
    }bit;
  }tDBGCBL;

#define  DBGCBL0  0x01		 /*bit masks */
#define  DBGCBL1  0x02   
#define  DBGCBL2  0x04
#define  DBGCBL3  0x08
#define  DBGCBL4  0x10
#define  DBGCBL5  0x20
#define  DBGCBL6  0x40
#define  DBGCBL7  0x80

typedef union uDBGCB   		/*combined comparator B structure */
  {                    
  tU16  word;           
  struct             
    {
    tU08 dbgcbh;
    tU08 dbgcbl;
    }byte;
  }tDBGCB;
  
typedef struct              	/*port and internal resource control */
  {
  volatile tPORTA   porta;  	/*port A data register */
  volatile tPORTB   portb;  	/*port B data register */
  volatile tDDRA    ddra;   	/*port A data direction register */
  volatile tDDRB    ddrb;   	/*port B data direction register */
  volatile tU08     rsv1[4];	/*reserved (maintaining memory map) */
  volatile tPORTE   porte;  	/*port E data register */
  volatile tDDRE    ddre;   	/*port E data direction register */
  volatile tPEAR    pear;   	/*port E assignment register */
  volatile tMODE    mode;   	/*mode register */
  volatile tPUCR    pucr;   	/*pull-up control register */
  volatile tRDRIV   rdriv;  	/*reduced drive register */
  volatile tEBICTL  ebictl; 	/*external bus control */
  volatile tU08     rsv2;   	/*reserved (maintaining memory map) */
  volatile tINITRM  initrm; 	/*initialise internal ram position */
  volatile tINITRG  initrg; 	/*initialise internal register position */
  volatile tINITEE  initee; 	/*initialise internal eeprom position */
  volatile tMISC    misc;   	/*miscellaneous system control register */
  volatile tMTST    mtst0;  	/*memory test (?) */
  volatile tITCR    itcr;   	/*interrupt test control (?) */
  volatile tITEST   itest;  	/*interrupt test status (?) */
  volatile tMTST    mtst1;  	/*memory test (?) */

 
  #ifndef S12C32				/*HCS12 devices with breakpoint module */
 
  volatile tU08     rsv3[2]; 	/*reserved (maintaining memory map) */
  volatile tPARTID  partid;  	/*WORD - part id information */
  volatile tMEMSIZ0 memsiz0; 	/*memory size info 0 */
  volatile tMEMSIZ1 memsiz1; 	/*memory size info 1  */
  volatile tINTCR   intcr;  	/*interrupt control register */
  volatile tHPRIO   hprio;  	/*highest priority I interrupt */
  volatile tU08     rsv4[8];	/*reserved (maintaining memory map) */
  volatile tBKPCT0  bkpct0; 	/*breakpoint control register 0 */
  volatile tBKPCT1  bkpct1; 	/*breakpoint control register 1 */
  volatile tBKP0X   bkp0x;  	/*breakpoint address 0 expansion register */
  volatile tBKP0    bkp0;   	/*WORD - breakpoint address register(s) */
  volatile tBKP1X   bkp1x;  	/*breakpoint address 1 expansion register */
  volatile tBKP1    bkp1;   	/*WORD - breakpoint data register(s) */
 
  #else 						/*HCS12 devices with debug module (C32) */
 
  volatile tU08     rsv3; 		/*reserved (maintaining memory map) */
  volatile tVREG    vreg;	    /*voltage regulator */
  volatile tPARTID  partid;  	/*WORD - part id information */
  volatile tMEMSIZ0 memsiz0; 	/*memory size info 0 */
  volatile tMEMSIZ1 memsiz1; 	/*memory size info 1  */
  volatile tINTCR   intcr;  	/*interrupt control register */
  volatile tHPRIO   hprio;  	/*highest priority I interrupt */ 
  volatile tDBGC1   dbgc1;		/*debug control register 1 */
  volatile tDBGSC   dbgsc;		/*debug status and control register */
  volatile tDBGTB 	dbgtb;		/*WORD - debug trace buffer register */
  volatile tDBGCNT  dbgcnt;		/*debug count register */
  volatile tDBGCCX  dbgccx;		/*debug comparator C extended register */
  volatile tDBGCC   dbgcc;		/*WORD - debug comparator C register(s) */
  volatile tDBGC2 	dbgc2;		/*debug control register 2 */
  volatile tDBGC3   dbgc3;		/*debug control register 3 */
  volatile tDBGCAX  dbgcax;		/*debug comparator A extended register */
  volatile tDBGCA   dbgca;		/*WORD - debug comparator A register(s) */		
  volatile tDBGCBX  dbgcbx;		/*debug comparator B extended register */
  volatile tDBGCB   dbgcb; 		/*WORD - debug comparator C register(s) */
 
  #endif	/*S12C32 */
  }tREGISTER;

#endif /*S12_REGISTER_H */