s12_byteflight.h

PWM Generation Using HCS12 Timer Channels

/*****************************************************************************/
/*                                             COPYRIGHT (c) MOTOROLA 2002   */
/*                                                                           */
/* File Name        :    $RCSfile: s12_byteflight.h,v $                      */
/*                                                                           */
/* Current Revision :    $Revision: 1.2 $									 */
/*                                                                           */
/* PURPOSE: header file for HCS12 Byteflight block 				 	    	 */


#ifndef S12_BYTEFLIGHT_H		/*prevent duplicated includes*/
#define S12_BYTEFLIGHT_H

#ifndef S12_COMMON_H		/*prevent duplicated includes*/
#include "s12_common.h"
#endif

typedef union uBFMCR
  {
  tU08	byte;
  struct
  	{
  	tU08 initak	:1;		/*Initialization acknowledge*/
  	tU08 sswai	:1;		/*Stops in Wait Mode*/
  	tU08 wpulse	:1;		/*Wake Up Pulses*/
  	tU08 slprq	:1;		/*Sleep Request*/
  	tU08 slpak	:1;		/*Sleep Acknowledge*/
  	tU08 alarm	:1;		/*Master Alarm Pulses*/
  	tU08 master :1;		/*Master Select*/
  	tU08 initrq :1;		/*Initialization request*/
  	}bit;
  }tBFMCR;
  
#define INITAK	0x01	/*bit masks	*/
#define SSWAI	0x02
#define WPULSE	0x04
#define SLPREQ	0x08
#define SLPACK	0x10
#define ALARM	0x20
#define MASTER	0x40
#define INITREQ	0x80

typedef union uBFFSIZR
  {
  tU08	byte;
  struct
  	{
  	tU08 fsize	:5;		/* FIFO size Bits*/
  	tU08 		:1;		/*not used*/
  	tU08 		:1;		/*not used*/
  	tU08 		:1;		/*not used*/
  	}bit;
  }tBFFSIZR;
  
#define FSIZ0	0x01	/*bit masks	*/
#define FSIZ1	0x02
#define FSIZ2	0x04
#define FSIZ3	0x08
#define FSIZ4	0x10

typedef union uBFIDX
  {
  tU08	byte;
  struct
  	{
  	tU08 putidx	:4;		/* Put index bits*/
  	tU08 getidx	:4;		/* Put index bits*/
   	}bit;
  }tBFIDX;
  
#define PUTIDX0	0x01	/*bit masks	*/
#define PUTIDX1	0x02
#define PUTIDX2	0x04
#define PUTIDX3	0x08
#define GETIDX0	0x10
#define GETIDX1	0x20
#define GETIDX2	0x40
#define GETIDX3	0x80

typedef union uBFRISR
  {
  tU08	byte;
  struct
  	{
  	tU08 optdf	:1;		/*Optical diagnosis flag*/
  	tU08 xsynif	:1;		/*Xsync pulse interrupt flag*/
  	tU08 		:1;		/*not used*/
  	tU08 slmmif	:1;		/*Slot mismatch interrupt flag*/
  	tU08 synnif :1;		/*Sync normal pulse interrupt flag*/
  	tU08 synaif :1;		/*Sync Alarm pulse interrupt flag*/
  	tU08 rxif	:1;		/*Receive interrupt flag*/
  	tU08 rcvfif	:1;		/*Receive FIFO not empty interrupt flag*/
   	}bit;
  }tBFRISR;
  
#define OPTDF	0x01	/*bit masks	*/
#define XSYNIF	0x02
#define SLMMIF	0x08
#define SYNNIF	0x10
#define SYNAIF	0x20
#define RXIF	0x40
#define RCVFIF	0x80

typedef union uBFGISR
  {
  tU08	byte;
  struct
  	{
  	tU08 wakeif	:1;		/*Wake up interrupt flag*/
  	tU08 lockif	:1;		/*Locking error interrupt flag*/
  	tU08 illpif :1;		/*Illegal pulse error interrupt flag*/
  	tU08 synlif	:1;		/*Sync pulse lost interrupt flag*/
  	tU08 syneif :1;		/*Sync pulse too early interrupt flag*/
  	tU08 errif	:1;		/*Message format error interrupt flag*/
  	tU08 ovrnif	:1;		/*Receive FIFO overrun interrupt flag*/
  	tU08 txif	:1;		/*Transmit interrupt flag*/
   	}bit;
  }tBFGISR;
  
#define WAKEIF	0x01	/*bit masks	*/
#define LCKIF	0x02
#define ILLPIF	0x04
#define SYNLIF	0x08
#define SYNEIF	0x10
#define ERRIF	0x20
#define OVRNIF	0x40
#define TXIF	0x80

typedef union uBFRIER
  {
  tU08	byte;
  struct
  	{
  	tU08 		:1;		/*NOT USED*/
  	tU08 xsynie	:1;		/*Xsync pulse interrupt enable*/
  	tU08 		:1;		/*not used*/
  	tU08 slmmie	:1;		/*Slot mismatch interrupt enable*/
  	tU08 synnie :1;		/*Sync normal pulse interrupt enable*/
  	tU08 synaie :1;		/*Sync Alarm pulse interrupt enable*/
  	tU08 rxie	:1;		/*Receive interrupt enable*/
  	tU08 rcvfie	:1;		/*Receive FIFO not empty interrupt enable*/
   	}bit;
  }tBFRIER;
  
#define XSYNIE	0x02	/*bit masks	*/
#define SLMMIE	0x08
#define SYNNIE	0x10
#define SYNAIE	0x20
#define RXIE	0x40
#define RCVFIE	0x80

typedef union uBFGIER
  {
  tU08	byte;
  struct
  	{
  	tU08 wakeie	:1;		/*Wake up interrupt enable*/
  	tU08 lockie	:1;		/*Locking error interrupt enable*/
  	tU08 illpie :1;		/*Illegal pulse error interrupt enable*/
  	tU08 synlie	:1;		/*Sync pulse lost interrupt enable*/
  	tU08 syneie :1;		/*Sync pulse too early interrupt enable*/
  	tU08 errie	:1;		/*Message format error interrupt enable*/
  	tU08 ovrnie	:1;		/*Receive FIFO overrun interrupt enable*/
  	tU08 txie	:1;		/*Transmit interrupt enable*/
   	}bit;
  }tBFGIER;
  
#define WAKEIE	0x01	/*bit masks	*/
#define LOCKIE	0x02
#define ILLPIE	0x04
#define SYNLIE	0x08
#define SYNEIE	0x10
#define ERRIE	0x20
#define OVRNIE	0x40
#define TXIE	0x80

typedef union uBFRIVEC
  {
  tU08	byte;
  struct
  	{
  	tU08 rivec	:4;		/*Receive Vector bits*/
  	tU08 		:4;		/*not used*/
   	}bit;
  }tBFRIVEC;
  
#define RIVEC0	0x01	/*bit masks	*/
#define RIVEC1	0x02
#define RIVEC2	0x04
#define RIVEC3	0x08

typedef union uBFTIVEC
  {
  tU08	byte;
  struct
  	{
  	tU08 tivec	:4;		/*Transmit Vector bits*/
  	tU08 		:4;		/*not used*/
   	}bit;
  }tBFTIVEC;
  
#define TIVEC0	0x01	/*bit masks	*/
#define TIVEC1	0x02
#define TIVEC2	0x04
#define TIVEC3	0x08

typedef union uBFFIDAC
  {
  tU08	byte;
  struct
  	{
  	tU08 fidac0	:1;		/*FIFO identification acceptance bits*/
  	tU08 fidac1	:1;
  	tU08 fidac2	:1;
  	tU08 fidac3	:1;
  	tU08 fidac4	:1;
  	tU08 fidac5	:1;
  	tU08 fidac6	:1;
  	tU08 fidac7	:1;
   	}bit;
  }tBFFIDAC;
  
#define FIDAC0	0x01	/*bit masks	*/
#define FIDAC1	0x02
#define FIDAC2	0x04
#define FIDAC3	0x08
#define FIDAC4	0x10
#define FIDAC5	0x20
#define FIDAC6	0x40
#define FIDAC7	0x80

typedef union uBFFIDMR
  {
  tU08	byte;
  struct
  	{
  	tU08 fidmr0 :1;		/*FIFO identification mask bits*/
   	tU08 fidmr1	:1;		
   	tU08 fidmr2	:1;		
   	tU08 fidmr3	:1;		
   	tU08 fidmr4	:1;		
   	tU08 fidmr5	:1;		
   	tU08 fidmr6	:1;		
   	tU08 fidmr7	:1;		
   	}bit;
  }tBFFIDMR;
  
#define FIDMR0	0x01	/*bit masks	*/
#define FIDMR1	0x02
#define FIDMR2	0x04
#define FIDMR3	0x08
#define FIDMR4	0x10
#define FIDMR5	0x20
#define FIDMR6	0x40
#define FIDMR7	0x80

typedef union uBFPCTLBF
  {
  tU08	byte;
  struct
  	{
  	tU08 bfen	:1;		/*Byteflight enable*/
  	tU08 		:1;		/*not used*/
  	tU08 psynen	:1;		/*sync pulse ok enable*/
  	tU08 proken	:1;		/*reception ok enable*/
  	tU08 perren	:1;		/*error pulse enable*/
  	tU08 pslmen	:1;		/*slot mismatch enable*/
  	tU08 		:1;		/*not used*/
  	tU08 pmeren	:1;		/*slot mismatch error enable*/
   	}bit;
  }tBFPCTLBF;
  
#define BFEN	0x01	/*bit masks	*/
#define PSYNEN	0x04
#define PROKEN	0x08
#define PERREN	0x10
#define PSLMEN	0x20
#define PMEREN	0x80

typedef union uBFBUFLOCK
  {
  tU08	byte;
  struct
  	{
  	tU08 rxbuflock	:1;		/*RX buffer locked*/
  	tU08 txbuflock	:1;		/*TX buffer locked*/
  	tU08 			:6;		/*not used*/
   	}bit;
  }tBFBUFLOCK;
  
#define RXBUFLOCK	0x01	/*bit masks	*/
#define TXBUFLOCK	0x02

typedef union uBFFIDRJ
  {
  tU08	byte;
  struct
  	{
  	tU08 fidrj0	:1;		/*FIFO identification rejection bits*/
   	tU08 fidrj1	:1;
   	tU08 fidrj2	:1;
   	tU08 fidrj3	:1;
   	tU08 fidrj4	:1;
   	tU08 fidrj5	:1;
   	tU08 fidrj6	:1;
   	tU08 fidrj7	:1;
   	}bit;
  }tBFFIDRJ;
  
#define FIDRJ0	0x01	/*bit masks	*/
#define FIDRJ1	0x02
#define FIDRJ2	0x04
#define FIDRJ3	0x08
#define FIDRJ4	0x10
#define FIDRJ5	0x20
#define FIDRJ6	0x40
#define FIDRJ7	0x80

typedef union uBFFIDRMR
  {
  tU08	byte;
  struct
  	{
  	tU08 fidrmr0	:1;		/*FIFO identification mask bits*/
   	tU08 fidrmr1	:1;
   	tU08 fidrmr2	:1;
   	tU08 fidrmr3	:1;
   	tU08 fidrmr4	:1;
   	tU08 fidrmr5	:1;
   	tU08 fidrmr6	:1;
   	tU08 fidrmr7	:1;
   	}bit;
  }tBFFIDRMR;
  
#define FIDRMR0		0x01	/*bit masks	*/
#define FIDRMR1		0x02
#define FIDRMR2		0x04
#define FIDRMR3		0x08
#define FIDRMR4		0x10
#define FIDRMR5		0x20
#define FIDRMR6		0x40
#define FIDRMR7		0x80

typedef union uBFTLEN
  {
  tU08	byte;
  struct
  	{
  	tU08 tlen	:4;		/*Transmit data length bits*/
  	tU08		:4;		/*not used*/
   	}bit;
  }tBFTLEN;
  
#define TLEN0	0x01	/*bit masks	*/
#define TLEN1	0x02
#define TLEN2	0x04
#define TLEN3	0x08

typedef union uBFRLEN
  {
  tU08	byte;
  struct
  	{
  	tU08 rlen	:4;		/*Receive data length bits*/
  	tU08		:4;		/*not used*/
   	}bit;
  }tBFRLEN;
  
#define RLEN0	0x01	/*bit masks	*/
#define RLEN1	0x02
#define RLEN2	0x04
#define RLEN3	0x08

typedef union uBFFLEN
  {
  tU08	byte;
  struct
  	{
  	tU08 flen	:4;		/*Receive FIFO data length bits*/
  	tU08		:4;		/*not used*/
   	}bit;
  }tBFFLEN;
  
#define FLEN0	0x01	/*bit masks	*/
#define FLEN1	0x02
#define FLEN2	0x04
#define FLEN3	0x08

typedef union uBFBUFCTL
  {
  tU08	byte;
  struct
  	{
  	tU08 cfg	:1;		/*message buffer configuration bit*/
  	tU08 		:2;		/*not used*/
  	tU08 abtrq	:1;		/*abort request*/
  	tU08 abtak	:1;		/*abort acknowledge*/
  	tU08 lock	:1;		/*message buffer lock*/
  	tU08 iena	:1;		/*interrupt enable bit*/
  	tU08 iflg	:1;		/*interrupt status flag*/
   	}bit;
  }tBFBUFCTL;
  
#define CFG		0x01	/*bit masks	*/
#define ABTRQ	0x08
#define ABTAK	0x10
#define LCK		0x20
#define IENA	0x40
#define IFLG	0x80

  
typedef struct
  {
  volatile tBFMCR		bfmcr;			/*module configuration register*/
  volatile tBFFSIZR		bffsizr;		/*FIFO size register*/		                   
  volatile tREG08		bftcr1;			/*Time Configuration Register 1*/		                   
  volatile tREG08		bftcr2;			/*Time Configuration Register 2*/		                   
  volatile tREG08		bftcr3;			/*Time Configuration Register 3*/		                   
  volatile tBFIDX		bfidx;			/*Fifo indexe register*/		                   
  volatile tBFRISR		bfrisr;			/*Receive interrupt status register*/		                   
  volatile tBFGISR		bfgisr;			/*General interrupt status register*/		                   
  volatile tBFRIER		bfrier;			/*Receive interrupt enable register*/		                   
  volatile tBFGIER		bfgier;			/*General interrupt enable register*/
  volatile tBFRIVEC		bfrivec;		/*Receive interrupt vector register*/		                   
  volatile tBFTIVEC 	bftivec;		/*Transmit interrupt vector register*/		                   
  volatile tBFFIDAC		bffidac;		/*Fifo identifier acceptance register*/		                   
  volatile tBFFIDMR		bffidmr;		/*Fifo identifier mask register*/		                   
  volatile tREG08		bfmvr;			/*module version register*/		   
  volatile tU08			rsv5;			/*reserved*/                
  volatile tBFPCTLBF 	bfpctlbf;		/*byteflight port control register*/
  volatile tU08 		rsv6;			/*reserved*/		                   
  volatile tBFBUFLOCK 	bfbuflock;  	/*buffer lock register*/
  volatile tU08			rsv;			/*reserved*/	                   
  volatile tBFFIDRJ		bffidrj;		/*Fifo identifier rejection register*/		                   
  volatile tBFFIDRMR 	bffidrmr;		/*Fifo identifier rejection maskr register*/
  volatile tU08			rsv1[10];		/*reserved*/		                   
  volatile tREG08	 	bftident;		/*Transmit identifier register*/		                   
  volatile tBFTLEN		bftlen;			/*Transmit data length register*/		                   
  volatile tREG08		bftdata[12];	/*Transmit data register 11*/		                   
  volatile tU08			rsv2[2];		/*reserved*/		
  volatile tREG08		bfrident;		/*Receive identifier register*/		                   
  volatile tBFRLEN		bfrlen;			/*Receive data length register*/		                   
  volatile tREG08		bfrdata[12];	/*Receive data registers */		                   
  volatile tU08			rsv3[2];		/*reserved*/		
  volatile tREG08		bffident;		/*Receive Fifo identifier register*/		                   
  volatile tBFFLEN		bfflen;			/*Receive Fifo data length register*/		                   
  volatile tREG08		bffdata[12];	/*Receive Fifo data registers */		                   
  volatile tU08			rsv4[2];		/*reserved*/		
  volatile tBFBUFCTL	bfbufctl[16];	/*Message Buffer Control Registers*/ 
  }tBYTEFLIGHT;     		                   
  	                   
          
#endif /*S12_BYTEFLIGHT_H*/