📄 s12_timer.h
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/*****************************************************************************/
/* COPYRIGHT (c) MOTOROLA 2002 */
/* */
/* File Name : $RCSfile: s12_timer.h,v $ */
/* */
/* Current Revision : $Revision: 1.2 $ */
/* */
/* PURPOSE: header file for HCS12 Timer block */
/* */
/* *********************************************************************** */
/* * THIS CODE IS ONLY INTENDED AS AN EXAMPLE OF CODE FOR THE * */
/* * METROWERKS COMPILER AND THE STAR12 EVB AND HAS ONLY BEEN GIVEN A * */
/* * MIMIMUM LEVEL OF TEST. IT IS PROVIDED 'AS SEEN' WITH NO GUARANTEES * */
/* * AND NO PROMISE OF SUPPORT. * */
/* *********************************************************************** */
/* */
/* DESCRIPTION: Defines the timer block as a datastructure of type tTIMER. */
/* */
/* Timer Datastructure base address (out of reset) - */
/* */
/* S12DP256 : 0x0040 */
/* */
/* The datastructure compiled can be determined by the #define's S12DP256, */
/* S12xxx, etc. These definitions can be found in "s12_common.h". */
/* The MCU id can be #defined in a "target.h" header file or included as a */
/* complier command line argument as -DS12DP256. */
/* */
/* Multiple register descriptions are used when a differing bit structure */
/* exists between parts. In the case of additional bit definitions within */
/* the same register, then only the full register description is used. */
/* */
/* */
/* AUTHOR: r32151 LOCATION: SPSEKB LAST EDIT DATE: 14/03/02 */
/* */
/* UPDATE HISTORY */
/* REV AUTHOR DATE DESCRIPTION OF CHANGE */
/* --- ------ -------- --------------------- */
/* 1.00 r32151 05/05/00 - */
/* 1.01 r32151 10/05/00 - fixed missing terminator on 3 comments. */
/* - Changed #include <s12_common.h> */
/* to #include "s12_common.h". */
/* - deleted bit definitions for port T */
/* (now in PIM). */
/* 1.02 r32151 27/11/00 - added missing definition for type uPACA. */
/* - structure elements for pulse accumulator */
/* count registers changed from pacna & pacnb */
/* to paca & pacb (as per HC12). */
/* Note: registers defined as pacn0,1,2,3 as */
/* in timer structure. */
/* - declarations corrected for tscr1 and rsv2 */
/* in timer structure. */
/* 1.03 r32151 26/07/01 - changed CPU id MCSDP256 to S12DP256. */
/* - Added disclaimer and reformated file info. */
/* 1.1 r32151 11/03/02 - fixed typo in tTIMER structure */
/* changed tfgl2 to tflg */
/* - Update file description. */
/* - Modified revision numbering to match RCS */
/* 1.2 r32151 14/03/02 - Declared all registers volatile */
/* - changed tU08 declarations in structure to */
/* tREG08 to standardise all accesses as */
/* using .bit or .byte format */
/* - changed tU16 declarations in structure to */
/* tREG16 to standardise all accesses as */
/* using .word */
/* 2.0 r58711 16/09/02 - added C32 TIM timer functionality */
/* */
/*===========================================================================*/
/* Motorola reserves the right to make changes without further notice to any */
/* product herein to improve reliability, function, or design. Motorola does */
/* not assume any liability arising out of the application or use of any */
/* product, circuit, or software described herein; neither does it convey */
/* any license under its patent rights nor the rights of others. Motorola */
/* products are not designed, intended, or authorized for use as components */
/* in systems intended for surgical implant into the body, or other */
/* applications intended to support life, or for any other application in */
/* which the failure of the Motorola product could create a situation where */
/* personal injury or death may occur. Should Buyer purchase or use Motorola */
/* products for any such intended or unauthorized application, Buyer shall */
/* indemnify and hold Motorola and its officers, employees, subsidiaries, */
/* affiliates, and distributors harmless against all claims costs, damages, */
/* and expenses, and reasonable attorney fees arising out of, directly or */
/* indirectly, any claim of personal injury or death associated with such */
/* unintended or unauthorized use, even if such claim alleges that Motorola */
/* was negligent regarding the design or manufacture of the part. Motorola */
/* and the Motorola logo* are registered trademarks of Motorola Ltd. */
/*****************************************************************************/
#ifndef S12_TIMER_H /*prevent duplicated includes */
#define S12_TIMER_H
#ifndef S12_COMMON_H /*prevent duplicated includes */
#include "s12_common.h"
#endif
typedef union uTIOS
{
tU08 byte;
struct
{
tU08 ios0 :1; /*i/p capture(0) or o/p compare(1) select */
tU08 ios1 :1;
tU08 ios2 :1;
tU08 ios3 :1;
tU08 ios4 :1;
tU08 ios5 :1;
tU08 ios6 :1;
tU08 ios7 :1;
}bit;
}tTIOS;
#define IOS0 0x01 /*bit masks */
#define IOS1 0x02
#define IOS2 0x04
#define IOS3 0x08
#define IOS4 0x10
#define IOS5 0x20
#define IOS6 0x40
#define IOS7 0x80
typedef union uCFORC
{
tU08 byte;
struct
{
tU08 foc0 :1; /*force output compare, no interrupt flag */
tU08 foc1 :1;
tU08 foc2 :1;
tU08 foc3 :1;
tU08 foc4 :1;
tU08 foc5 :1;
tU08 foc6 :1;
tU08 foc7 :1;
}bit;
}tCFORC;
#define FOC0 0x01 /*bit masks */
#define FOC1 0x02
#define FOC2 0x04
#define FOC3 0x08
#define FOC4 0x10
#define FOC5 0x20
#define FOC6 0x40
#define FOC7 0x80
typedef union uOC7M
{
tU08 byte;
struct
{
tU08 oc7m0 :1; /*output compare 7 bit mask */
tU08 oc7m1 :1;
tU08 oc7m2 :1;
tU08 oc7m3 :1;
tU08 oc7m4 :1;
tU08 oc7m5 :1;
tU08 oc7m6 :1;
tU08 oc7m7 :1;
}bit;
}tOC7M;
#define OC7M0 0x01 /*bit masks */
#define OC7M1 0x02
#define OC7M2 0x04
#define OC7M3 0x08
#define OC7M4 0x10
#define OC7M5 0x20
#define OC7M6 0x40
#define OC7M7 0x80
typedef union uOC7D
{
tU08 byte;
struct
{
tU08 oc7d0 :1; /*output compare 7 data */
tU08 oc7d1 :1;
tU08 oc7d2 :1;
tU08 oc7d3 :1;
tU08 oc7d4 :1;
tU08 oc7d5 :1;
tU08 oc7d6 :1;
tU08 oc7d7 :1;
}bit;
}tOC7D;
#define OC7D0 0x01 /*bit masks */
#define OC7D1 0x02
#define OC7D2 0x04
#define OC7D3 0x08
#define OC7D4 0x10
#define OC7D5 0x20
#define OC7D6 0x40
#define OC7D7 0x80
typedef union uTCNT
{
tU16 word;
struct
{
tU08 tcnth;
tU08 tcntl;
}byte;
}tTCNT;
typedef union uTSCR1
{
tU08 byte;
struct
{
tU08 :4; /*not used */
tU08 tffca :1; /*timer fast flag clear all */
tU08 tsbck :1; /*timer stops in background mode */
tU08 tswai :1; /*timer stops in wait mode */
tU08 ten :1; /*timer enable */
}bit;
}tTSCR1;
#define TFFCA 0x10 /*bit masks */
#define TSBCK 0x20
#define TSWAI 0x40
#define TEN 0x80
typedef union uTTOV /*TOVx toggles output compare pin on overflow */
{
tU08 byte;
struct
{
tU08 tov0 :1;
tU08 tov1 :1;
tU08 tov2 :1;
tU08 tov3 :1;
tU08 tov4 :1;
tU08 tov5 :1;
tU08 tov6 :1;
tU08 tov7 :1;
}bit;
}tTTOV;
#define TOV0 0x01 /*bit masks */
#define TOV1 0x02
#define TOV2 0x04
#define TOV3 0x08
#define TOV4 0x10
#define TOV5 0x20
#define TOV6 0x40
#define TOV7 0x80
typedef union uTCTL1
{
tU08 byte;
struct
{
tU08 ol4 :1; /*output compare pin action */
tU08 om4 :1;
tU08 ol5 :1; /*OMx:OLx -> action */
tU08 om5 :1; /* 0 : 0 -> disconnected from pin */
tU08 ol6 :1; /* 0 : 1 -> toggle OCx pin */
tU08 om6 :1; /* 1 : 0 -> clear OCx pin (0) */
tU08 ol7 :1; /* 1 : 1 -> set OCx pin (1) */
tU08 om7 :1;
}bit;
}tTCTL1;
#define OL4 0x01 /*bit masks */
#define OM4 0x02
#define OL5 0x04
#define OM5 0x08
#define OL6 0x10
#define OM6 0x20
#define OL7 0x40
#define OM7 0x80
typedef union uTCTL2
{
tU08 byte;
struct
{
tU08 ol0 :1; /*output compare pin action */
tU08 om0 :1;
tU08 ol1 :1; /*OMx:OLx -> action */
tU08 om1 :1; /* 0 : 0 -> disconnected from pin */
tU08 ol2 :1; /* 0 : 1 -> toggle OCx pin */
tU08 om2 :1; /* 1 : 0 -> clear OCx pin (0) */
tU08 ol3 :1; /* 1 : 1 -> set OCx pin (1) */
tU08 om3 :1;
}bit;
}tTCTL2;
#define OL0 0x01 /*bit masks */
#define OM0 0x02
#define OL1 0x04
#define OM1 0x08
#define OL2 0x10
#define OM2 0x20
#define OL3 0x40
#define OM3 0x80
typedef union uTCTL3
{
tU08 byte;
struct
{
tU08 edg4a :1; /*input capture configuration */
tU08 edg4b :1;
tU08 edg5a :1; /*EDGxB:EDGxA -> configuration */
tU08 edg5b :1; /* 0 : 0 -> capture disabled */
tU08 edg6a :1; /* 0 : 1 -> rising edge only */
tU08 edg6b :1; /* 1 : 0 -> falling edge only */
tU08 edg7a :1; /* 1 : 1 -> any edge */
tU08 edg7b :1;
}bit;
}tTCTL3;
#define EDG4A 0x01 /*bit masks */
#define EDG4B 0x02
#define EDG5A 0x04
#define EDG5B 0x08
#define EDG6A 0x10
#define EDG6B 0x20
#define EDG7A 0x40
#define EDG7B 0x80
typedef union uTCTL4
{
tU08 byte;
struct
{
tU08 edg0a :1; /*input capture configuration */
tU08 edg0b :1;
tU08 edg1a :1; /*EDGxB:EDGxA -> configuration */
tU08 edg1b :1; /* 0 : 0 -> capture disabled */
tU08 edg2a :1; /* 0 : 1 -> rising edge only */
tU08 edg2b :1; /* 1 : 0 -> falling edge only */
tU08 edg3a :1; /* 1 : 1 -> any edge */
tU08 edg3b :1;
}bit;
}tTCTL4;
#define EDG0A 0x01 /*bit masks */
#define EDG0B 0x02
#define EDG1A 0x04
#define EDG1B 0x08
#define EDG2A 0x10
#define EDG2B 0x20
#define EDG3A 0x40
#define EDG3B 0x80
typedef union uTIE /*On HC12 was TMSK1 */
{
tU08 byte;
struct
{
tU08 c0i :1; /*capture/compare interrupt enable */
tU08 c1i :1;
tU08 c2i :1;
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