_mc9s12c32_flat.prm

PWM Generation Using HCS12 Timer Channels

/*****************************************************************************/
/*                                             COPYRIGHT (c) MOTOROLA 2002   */
/* FILE NAME: MC9S12C32_FLAT.PRM                                             */
/*                                                                           */
/* PURPOSE: Example Linker file for building a non-banked Flash target.      */
/*                                                                           */
/* TARGET DEVICE: 68HC9S12C32                                                */
/*                                                                           */
/* COMPILER:    Metrowerks                                                   */
/*                                                                           */
/* DESCRIPTION: Linker Parameter file for Metrowerks Codewarrior.            */
/*                                                                           */
/* NOTES:       1) 	Source code should include _dummyISR for unused          */
/*                 	interrupts.  											 */
/*              2)  ISRs in source code should be assigned to NON_BANKED 	 */
/*					Section.												 */
/*     			3)  Peripheral modules located by the linker. In the source  */
/*              	code the peripheral registers should be allocated to the */
/* 					appropriate segment e.g. #pragma DATA_SEG S12_REG.       */
/*              	If the register block is remapped then all of the  	 	 */
/*              	periperals sections must be edited for their new address.*/
/*                  This goes for any sections that are remapped.            */
/*                                                                           */
/*                                                                           */
/* AUTHOR: r32151/r58711        LOCATION: SPSEKB                             */
/*                                                                           */
/* UPDATE HISTORY                                                            */
/* REV      AUTHOR       DATE       DESCRIPTION OF CHANGE                    */
/* ---      ------      ---------   ---------------------                    */
/* 1.0      r32151      16/07/02 	Initial coding							 */
/* 2.0      r58711		17/09/02    Modifications for C32 					 */	
/*                                                                           */
/*===========================================================================*/
/* Motorola reserves the right to make changes without further notice to any */
/* product herein to improve reliability, function, or design. Motorola does */
/* not assume any  liability arising  out  of the  application or use of any */
/* product,  circuit, or software described herein;  neither  does it convey */
/* any license under its patent rights  nor the  rights of others.  Motorola */
/* products are not designed, intended,  or authorized for use as components */
/* in  systems  intended  for  surgical  implant  into  the  body, or  other */
/* applications intended to support life, or  for any  other application  in */
/* which the failure of the Motorola product  could create a situation where */
/* personal injury or death may occur. Should Buyer purchase or use Motorola */
/* products for any such intended  or unauthorized  application, Buyer shall */
/* indemnify and  hold  Motorola  and its officers, employees, subsidiaries, */
/* affiliates,  and distributors harmless against all claims costs, damages, */
/* and expenses, and reasonable  attorney  fees arising  out of, directly or */
/* indirectly,  any claim of personal injury  or death  associated with such */
/* unintended or unauthorized use, even if such claim alleges that  Motorola */
/* was negligent regarding the  design  or manufacture of the part. Motorola */
/* and the Motorola logo* are registered trademarks of Motorola Ltd.         */
/*****************************************************************************/

NAMES
END

SECTIONS

	/* ram */
    RAM 	= READ_WRITE 0x0800 TO 0x0FFF; /* 1K */
  
  	/* flat flash ROM */
	ROM_4000 = READ_ONLY  0x4000 TO 0x7FFF;  /* 16K */
	ROM_C000 = READ_ONLY  0xC000 TO 0xFEFF;  /* ~16K */

	/* no EEPROM on the C32 */
    
    C32_REG     	= NO_INIT 0x0000 TO 0x002F;
 	C32_PAGE     	= NO_INIT 0x0030 TO 0x0033; 
 	C32_CRG     	= NO_INIT 0x0034 TO 0x003F; 
 	C32_TIMER    	= NO_INIT 0x0040 TO 0x007F;
 	C32_ATD0     	= NO_INIT 0x0080 TO 0x009F;
 	C32_SCI0     	= NO_INIT 0x00C8 TO 0x00CF;
 	C32_SPI0     	= NO_INIT 0x00D8 TO 0x00DF;
 	C32_PWM			= NO_INIT 0x00E0 TO 0x00FF;
 	C32_FLASH    	= NO_INIT 0x0100 TO 0x010F;
 	C32_CAN0    	= NO_INIT 0x0140 TO 0x017F;
 	C32_PIM    		= NO_INIT 0x0240 TO 0x027F; 
END
    
PLACEMENT
    _PRESTART, STARTUP,
    ROM_VAR, STRINGS,
    NON_BANKED,DEFAULT_ROM,
    COPY                   INTO   ROM_4000, ROM_C000;
    DEFAULT_RAM            INTO   RAM;
    
    S12_REG    					INTO C32_REG;
 	S12_PAGE   					INTO C32_PAGE;
 	S12_CRG    					INTO C32_CRG;
	S12_TIMER  					INTO C32_TIMER;
 	S12_ATD0   					INTO C32_ATD0;
 	S12_SCI0	   				INTO C32_SCI0;
 	S12_SPI0   					INTO C32_SPI0;
 	S12_PWM						INTO C32_PWM;
 	S12_FLASH  					INTO C32_FLASH;
 	S12_CAN0   					INTO C32_CAN0;
 	S12_PIM   					INTO C32_PIM;
END

STACKSIZE 0x0080 /* 128 bytes = 1/16 of RAM */

INIT _Startup

VECTOR  0 _Startup     /* 0xFFFE Reset   */
VECTOR  1 _dummyISR    /* 0xFFFC Clock monitor fail reset  */
VECTOR  2 _dummyISR    /* 0xFFFA COP failure reset  */
VECTOR  3 _dummyISR    /* 0xFFF8 Unimplemented instruction trap  */
VECTOR  4 _dummyISR    /* 0xFFF6 SWI  */
VECTOR  5 _dummyISR    /* 0xFFF4 XIRQ  */
VECTOR  6 _dummyISR    /* 0xFFF2 IRQ  */
VECTOR  7 _dummyISR    /* 0xFFF0 Real Time Interrupt  */
VECTOR  8 _TimerCompare0ISR	   /* 0xFFEE Timer channel 0  */
VECTOR  9 _TimerCompare1ISR    /* 0xFFEC Timer channel 1  */
VECTOR 10 _TimerCompare2ISR    /* 0xFFEA Timer channel 2  */
VECTOR 11 _TimerCompare3ISR    /* 0xFFE8 Timer channel 3  */
VECTOR 12 _dummyISR    /* 0xFFE6 Timer channel 4  */
VECTOR 13 _dummyISR    /* 0xFFE4 Timer channel 5  */
VECTOR 14 _dummyISR    /* 0xFFE2 Timer channel 6  */
VECTOR 15 _dummyISR    /* 0xFFE0 Timer channel 7  */
VECTOR 16 _dummyISR    /* 0xFFDE Timer overflow  */
VECTOR 17 _dummyISR    /* 0xFFDC Pulse accumulator A overflow  */
VECTOR 18 _dummyISR    /* 0xFFDA Pulse accumulator input edge  */
VECTOR 19 _dummyISR    /* 0xFFD8 SPI Serial transfer complete  */
VECTOR 20 _dummyISR    /* 0xFFD6 SCI0  */
VECTOR 21 _dummyISR    /* 0xFFD4 Reserved */
VECTOR 22 _dummyISR    /* 0xFFD2 ATD0  */
VECTOR 23 _dummyISR    /* 0xFFD0 Reserved */
VECTOR 24 _dummyISR    /* 0xFFCE Port J  */
VECTOR 25 _dummyISR    /* 0xFFCC Reserved */
VECTOR 26 _dummyISR    /* 0xFFCA Reserved */
VECTOR 27 _dummyISR    /* 0xFFC8 Reserved */
VECTOR 28 _dummyISR    /* 0xFFC6 CRG lock  */
VECTOR 29 _dummyISR    /* 0xFFC4 SCME  */
VECTOR 30 _dummyISR    /* 0xFFC2 Reserved */
VECTOR 31 _dummyISR    /* 0xFFC0 Reserved */
VECTOR 32 _dummyISR    /* 0xFFBE Reserved */
VECTOR 33 _dummyISR    /* 0xFFBC Reserved */
VECTOR 34 _dummyISR    /* 0xFFBA EEPROM  */
VECTOR 35 _dummyISR    /* 0xFFB8 Flash  */
VECTOR 36 _dummyISR    /* 0xFFB6 MSCAN 0 wake-up  */
VECTOR 37 _dummyISR    /* 0xFFB4 MSCAN 0 errors  */
VECTOR 38 _dummyISR    /* 0xFFB2 MSCAN 0 receive  */
VECTOR 39 _dummyISR    /* 0xFFB0 MSCAN 0 transmit  */
VECTOR 40 _dummyISR    /* 0xFFAE Reserved */
VECTOR 41 _dummyISR    /* 0xFFAC Reserved */
VECTOR 42 _dummyISR    /* 0xFFAA Reserved */
VECTOR 43 _dummyISR    /* 0xFFA8 Reserved */
VECTOR 44 _dummyISR    /* 0xFFA6 Reserved */
VECTOR 45 _dummyISR    /* 0xFFA4 Reserved */
VECTOR 46 _dummyISR    /* 0xFFA2 Reserved */
VECTOR 47 _dummyISR    /* 0xFFA0 Reserved */
VECTOR 48 _dummyISR    /* 0xFF9E Reserved */
VECTOR 49 _dummyISR    /* 0xFF9C Reserved */
VECTOR 50 _dummyISR    /* 0xFF9A Reserved */
VECTOR 51 _dummyISR    /* 0xFF98 Reserved */
VECTOR 52 _dummyISR    /* 0xFF96 Reserved */
VECTOR 53 _dummyISR    /* 0xFF94 Reserved */
VECTOR 54 _dummyISR    /* 0xFF92 Reserved */
VECTOR 55 _dummyISR    /* 0xFF90 Reserved */
VECTOR 56 _dummyISR    /* 0xFF8E Port P Interrupt */
VECTOR 57 _dummyISR    /* 0xFF8C PWM Shutdown  */
VECTOR 58 _dummyISR    /* 0xFF8A VREG LVI */
VECTOR 59 _dummyISR    /* 0xFF88 Reserved */
VECTOR 60 _dummyISR    /* 0xFF86 Reserved */
VECTOR 61 _dummyISR    /* 0xFF84 Reserved */
VECTOR 62 _dummyISR    /* 0xFF82 Reserved */
VECTOR 63 _dummyISR    /* 0xFF80 Reserved */