📄 mc9s12dp256.lst
字号:
108: volatile DLCBSVRSTR _DLCBSVR; /* BDLC State Vector Register; 0x000000E9 */
109: volatile DLCBCR2STR _DLCBCR2; /* BDLC Control Register 2; 0x000000EA */
110: volatile DLCBDRSTR _DLCBDR; /* BDLC Data Register; 0x000000EB */
111: volatile DLCBARDSTR _DLCBARD; /* BDLC Analog Round Trip Delay Register; 0x000000EC */
112: volatile DLCBRSRSTR _DLCBRSR; /* BDLC Rate Select Register; 0x000000ED */
113: volatile DLCSCRSTR _DLCSCR; /* BDLC Control Register; 0x000000EE */
114: volatile SPI1CR1STR _SPI1CR1; /* SPI 1 Control Register; 0x000000F0 */
115: volatile SPI1CR2STR _SPI1CR2; /* SPI 1 Control Register 2; 0x000000F1 */
116: volatile SPI1BRSTR _SPI1BR; /* SPI 1 Baud Rate Register; 0x000000F2 */
117: volatile SPI1SRSTR _SPI1SR; /* SPI 1 Status Register; 0x000000F3 */
118: volatile SPI1DRSTR _SPI1DR; /* SPI 1 Data Register; 0x000000F5 */
119: volatile SPI2CR1STR _SPI2CR1; /* SPI 2 Control Register; 0x000000F8 */
120: volatile SPI2CR2STR _SPI2CR2; /* SPI 2 Control Register 2; 0x000000F9 */
121: volatile SPI2BRSTR _SPI2BR; /* SPI 2 Baud Rate Register; 0x000000FA */
122: volatile SPI2SRSTR _SPI2SR; /* SPI 2 Status Register; 0x000000FB */
123: volatile SPI2DRSTR _SPI2DR; /* SPI 2 Data Register; 0x000000FD */
124: volatile FCLKDIVSTR _FCLKDIV; /* Flash Clock Divider Register; 0x00000100 */
125: volatile FSECSTR _FSEC; /* Flash Security Register; 0x00000101 */
126: volatile FCNFGSTR _FCNFG; /* Flash Configuration Register; 0x00000103 */
127: volatile FPROTSTR _FPROT; /* Flash Protection Register; 0x00000104 */
128: volatile FSTATSTR _FSTAT; /* Flash Status Register; 0x00000105 */
129: volatile FCMDSTR _FCMD; /* Flash Command Buffer and Register; 0x00000106 */
130: volatile ECLKDIVSTR _ECLKDIV; /* EEPROM Clock Divider Register; 0x00000110 */
131: volatile ECNFGSTR _ECNFG; /* EEPROM Configuration Register; 0x00000113 */
132: volatile EPROTSTR _EPROT; /* EEPROM Protection Register; 0x00000114 */
133: volatile ESTATSTR _ESTAT; /* EEPROM Status Register; 0x00000115 */
134: volatile ECMDSTR _ECMD; /* EEPROM Command Buffer and Register; 0x00000116 */
135: volatile ATD1STAT0STR _ATD1STAT0; /* ATD 1 Status Register 0; 0x00000126 */
136: volatile ATD1TEST1STR _ATD1TEST1; /* ATD1 Test Register; 0x00000129 */
137: volatile ATD1STAT1STR _ATD1STAT1; /* ATD 1 Status Register 1; 0x0000012B */
138: volatile ATD1DIENSTR _ATD1DIEN; /* ATD 1 Input Enable Register; 0x0000012D */
139: volatile PORTAD1STR _PORTAD1; /* Port AD1 Register; 0x0000012F */
140: volatile CAN0CTL0STR _CAN0CTL0; /* MSCAN 0 Control 0 Register; 0x00000140 */
141: volatile CAN0CTL1STR _CAN0CTL1; /* MSCAN 0 Control 1 Register; 0x00000141 */
142: volatile CAN0BTR0STR _CAN0BTR0; /* MSCAN 0 Bus Timing Register 0; 0x00000142 */
143: volatile CAN0BTR1STR _CAN0BTR1; /* MSCAN 0 Bus Timing Register 1; 0x00000143 */
144: volatile CAN0RFLGSTR _CAN0RFLG; /* MSCAN 0 Receiver Flag Register; 0x00000144 */
145: volatile CAN0RIERSTR _CAN0RIER; /* MSCAN 0 Receiver Interrupt Enable Register; 0x00000145 */
146: volatile CAN0TFLGSTR _CAN0TFLG; /* MSCAN 0 Transmitter Flag Register; 0x00000146 */
147: volatile CAN0TIERSTR _CAN0TIER; /* MSCAN 0 Transmitter Interrupt Enable Register; 0x00000147 */
148: volatile CAN0TARQSTR _CAN0TARQ; /* MSCAN 0 Transmitter Message Abort Request; 0x00000148 */
149: volatile CAN0TAAKSTR _CAN0TAAK; /* MSCAN 0 Transmitter Message Abort Control; 0x00000149 */
150: volatile CAN0TBSELSTR _CAN0TBSEL; /* MSCAN 0 Transmit Buffer Selection; 0x0000014A */
151: volatile CAN0IDACSTR _CAN0IDAC; /* MSCAN 0 Identifier Acceptance Control Register; 0x0000014B */
152: volatile CAN0RXERRSTR _CAN0RXERR; /* MSCAN 0 Receive Error Counter Register; 0x0000014E */
153: volatile CAN0TXERRSTR _CAN0TXERR; /* MSCAN 0 Transmit Error Counter Register; 0x0000014F */
154: volatile CAN0IDAR0STR _CAN0IDAR0; /* MSCAN 0 Identifier Acceptance Register 0; 0x00000150 */
155: volatile CAN0IDAR1STR _CAN0IDAR1; /* MSCAN 0 Identifier Acceptance Register 1; 0x00000151 */
156: volatile CAN0IDAR2STR _CAN0IDAR2; /* MSCAN 0 Identifier Acceptance Register 2; 0x00000152 */
157: volatile CAN0IDAR3STR _CAN0IDAR3; /* MSCAN 0 Identifier Acceptance Register 3; 0x00000153 */
158: volatile CAN0IDMR0STR _CAN0IDMR0; /* MSCAN 0 Identifier Mask Register 0; 0x00000154 */
159: volatile CAN0IDMR1STR _CAN0IDMR1; /* MSCAN 0 Identifier Mask Register 1; 0x00000155 */
160: volatile CAN0IDMR2STR _CAN0IDMR2; /* MSCAN 0 Identifier Mask Register 2; 0x00000156 */
161: volatile CAN0IDMR3STR _CAN0IDMR3; /* MSCAN 0 Identifier Mask Register 3; 0x00000157 */
162: volatile CAN0IDAR4STR _CAN0IDAR4; /* MSCAN 0 Identifier Acceptance Register 4; 0x00000158 */
163: volatile CAN0IDAR5STR _CAN0IDAR5; /* MSCAN 0 Identifier Acceptance Register 5; 0x00000159 */
164: volatile CAN0IDAR6STR _CAN0IDAR6; /* MSCAN 0 Identifier Acceptance Register 6; 0x0000015A */
165: volatile CAN0IDAR7STR _CAN0IDAR7; /* MSCAN 0 Identifier Acceptance Register 7; 0x0000015B */
166: volatile CAN0IDMR4STR _CAN0IDMR4; /* MSCAN 0 Identifier Mask Register 4; 0x0000015C */
167: volatile CAN0IDMR5STR _CAN0IDMR5; /* MSCAN 0 Identifier Mask Register 5; 0x0000015D */
168: volatile CAN0IDMR6STR _CAN0IDMR6; /* MSCAN 0 Identifier Mask Register 6; 0x0000015E */
169: volatile CAN0IDMR7STR _CAN0IDMR7; /* MSCAN 0 Identifier Mask Register 7; 0x0000015F */
170: volatile CAN0RXIDR0STR _CAN0RXIDR0; /* MSCAN 0 Receive Identifier Register 0; 0x00000160 */
171: volatile CAN0RXIDR1STR _CAN0RXIDR1; /* MSCAN 0 Receive Identifier Register 1; 0x00000161 */
172: volatile CAN0RXIDR2STR _CAN0RXIDR2; /* MSCAN 0 Receive Identifier Register 2; 0x00000162 */
173: volatile CAN0RXIDR3STR _CAN0RXIDR3; /* MSCAN 0 Receive Identifier Register 3; 0x00000163 */
174: volatile CAN0RXDSR0STR _CAN0RXDSR0; /* MSCAN 0 Receive Data Segment Register 0; 0x00000164 */
175: volatile CAN0RXDSR1STR _CAN0RXDSR1; /* MSCAN 0 Receive Data Segment Register 1; 0x00000165 */
176: volatile CAN0RXDSR2STR _CAN0RXDSR2; /* MSCAN 0 Receive Data Segment Register 2; 0x00000166 */
177: volatile CAN0RXDSR3STR _CAN0RXDSR3; /* MSCAN 0 Receive Data Segment Register 3; 0x00000167 */
178: volatile CAN0RXDSR4STR _CAN0RXDSR4; /* MSCAN 0 Receive Data Segment Register 4; 0x00000168 */
179: volatile CAN0RXDSR5STR _CAN0RXDSR5; /* MSCAN 0 Receive Data Segment Register 5; 0x00000169 */
180: volatile CAN0RXDSR6STR _CAN0RXDSR6; /* MSCAN 0 Receive Data Segment Register 6; 0x0000016A */
181: volatile CAN0RXDSR7STR _CAN0RXDSR7; /* MSCAN 0 Receive Data Segment Register 7; 0x0000016B */
182: volatile CAN0RXDLRSTR _CAN0RXDLR; /* MSCAN 0 Receive Data Length Register; 0x0000016C */
183: volatile CAN0TXIDR0STR _CAN0TXIDR0; /* MSCAN 0 Transmit Identifier Register 0; 0x00000170 */
184: volatile CAN0TXIDR1STR _CAN0TXIDR1; /* MSCAN 0 Transmit Identifier Register 1; 0x00000171 */
185: volatile CAN0TXIDR2STR _CAN0TXIDR2; /* MSCAN 0 Transmit Identifier Register 2; 0x00000172 */
186: volatile CAN0TXIDR3STR _CAN0TXIDR3; /* MSCAN 0 Transmit Identifier Register 3; 0x00000173 */
187: volatile CAN0TXDSR0STR _CAN0TXDSR0; /* MSCAN 0 Transmit Data Segment Register 0; 0x00000174 */
188: volatile CAN0TXDSR1STR _CAN0TXDSR1; /* MSCAN 0 Transmit Data Segment Register 1; 0x00000175 */
189: volatile CAN0TXDSR2STR _CAN0TXDSR2; /* MSCAN 0 Transmit Data Segment Register 2; 0x00000176 */
190: volatile CAN0TXDSR3STR _CAN0TXDSR3; /* MSCAN 0 Transmit Data Segment Register 3; 0x00000177 */
191: volatile CAN0TXDSR4STR _CAN0TXDSR4; /* MSCAN 0 Transmit Data Segment Register 4; 0x00000178 */
192: volatile CAN0TXDSR5STR _CAN0TXDSR5; /* MSCAN 0 Transmit Data Segment Register 5; 0x00000179 */
193: volatile CAN0TXDSR6STR _CAN0TXDSR6; /* MSCAN 0 Transmit Data Segment Register 6; 0x0000017A */
194: volatile CAN0TXDSR7STR _CAN0TXDSR7; /* MSCAN 0 Transmit Data Segment Register 7; 0x0000017B */
195: volatile CAN0TXDLRSTR _CAN0TXDLR; /* MSCAN 0 Transmit Data Length Register; 0x0000017C */
196: volatile CAN0TXTBPRSTR _CAN0TXTBPR; /* MSCAN 0 Transmit Buffer Priority; 0x0000017D */
197: volatile CAN1CTL0STR _CAN1CTL0; /* MSCAN 1 Control 0 Register; 0x00000180 */
198: volatile CAN1CTL1STR _CAN1CTL1; /* MSCAN 1 Control 1 Register; 0x00000181 */
199: volatile CAN1BTR0STR _CAN1BTR0; /* MSCAN 1 Bus Timing Register 0; 0x00000182 */
200: volatile CAN1BTR1STR _CAN1BTR1; /* MSCAN 1 Bus Timing Register 1; 0x00000183 */
201: volatile CAN1RFLGSTR _CAN1RFLG; /* MSCAN 1 Receiver Flag Register; 0x00000184 */
202: volatile CAN1RIERSTR _CAN1RIER; /* MSCAN 1 Receiver Interrupt Enable Register; 0x00000185 */
203: volatile CAN1TFLGSTR _CAN1TFLG; /* MSCAN 1 Transmitter Flag Register; 0x00000186 */
204: volatile CAN1TIERSTR _CAN1TIER; /* MSCAN 1 Transmitter Interrupt Enable Register; 0x00000187 */
205: volatile CAN1TARQSTR _CAN1TARQ; /* MSCAN 1 Transmitter Message Abort Request; 0x00000188 */
206: volatile CAN1TAAKSTR _CAN1TAAK; /* MSCAN 1 Transmitter Message Abort Control; 0x00000189 */
207: volatile CAN1TBSELSTR _CAN1TBSEL; /* MSCAN 1 Transmit Buffer Selection; 0x0000018A */
208: volatile CAN1IDACSTR _CAN1IDAC; /* MSCAN 1 Identifier Acceptance Control Register; 0x0000018B */
209: volatile CAN1RXERRSTR _CAN1RXERR; /* MSCAN 1 Receive Error Counter Register; 0x0000018E */
210: volatile CAN1TXERRSTR _CAN1TXERR; /* MSCAN 1 Transmit Error Counter Register; 0x0000018F */
211: volatile CAN1IDAR0STR _CAN1IDAR0; /* MSCAN 1 Identifier Acceptance Register 0; 0x00000190 */
212: volatile CAN1IDAR1STR _CAN1IDAR1; /* MSCAN 1 Identifier Acceptance Register 1; 0x00000191 */
213: volatile CAN1IDAR2STR _CAN1IDAR2; /* MSCAN 1 Identifier Acceptance Register 2; 0x00000192 */
214: volatile CAN1IDAR3STR _CAN1IDAR3; /* MSCAN 1 Identifier Acceptance Register 3; 0x00000193 */
215: volatile CAN1IDMR0STR _CAN1IDMR0; /* MSCAN 1 Identifier Mask Register 0; 0x00000194 */
216: volatile CAN1IDMR1STR _CAN1IDMR1; /* MSCAN 1 Identifier Mask Register 1; 0x00000195 */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -