mc9s12dp256.lst

CAN通信程序,在汽车电子开发中 十分有用

ANSI-C/cC++ Compiler for HC12 V-5.0.30 Build 6037, Feb  7 2006

    1:  /* Based on CPU DB MC9S12DP256_112, version 2.87.359 (RegistersPrg V2.02) */
    2:  /* DataSheet : 9S12DP256BDGV2/D V02.14 */
    3:  
    4:  #include <MC9S12DP256.h>
    5:  
    6:  /*lint -save -esym(765, *) */
    7:  
    8:  
    9:  /* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
   10:  volatile PORTESTR _PORTE;                                  /* Port E Register; 0x00000008 */
   11:  volatile DDRESTR _DDRE;                                    /* Port E Data Direction Register; 0x00000009 */
   12:  volatile PEARSTR _PEAR;                                    /* Port E Assignment Register; 0x0000000A */
   13:  volatile MODESTR _MODE;                                    /* Mode Register; 0x0000000B */
   14:  volatile PUCRSTR _PUCR;                                    /* Pull-Up Control Register; 0x0000000C */
   15:  volatile RDRIVSTR _RDRIV;                                  /* Reduced Drive of I/O Lines; 0x0000000D */
   16:  volatile EBICTLSTR _EBICTL;                                /* External Bus Interface Control; 0x0000000E */
   17:  volatile INITRMSTR _INITRM;                                /* Initialization of Internal RAM Position Register; 0x00000010 */
   18:  volatile INITRGSTR _INITRG;                                /* Initialization of Internal Registers Position Register; 0x00000011 */
   19:  volatile INITEESTR _INITEE;                                /* Initialization of Internal EEPROM Position Register; 0x00000012 */
   20:  volatile MISCSTR _MISC;                                    /* Miscellaneous System Control Register; 0x00000013 */
   21:  volatile ITCRSTR _ITCR;                                    /* Interrupt Test Control Register; 0x00000015 */
   22:  volatile ITESTSTR _ITEST;                                  /* Interrupt Test Register; 0x00000016 */
   23:  volatile MEMSIZ0STR _MEMSIZ0;                              /* Memory Size Register Zero; 0x0000001C */
   24:  volatile MEMSIZ1STR _MEMSIZ1;                              /* Memory Size Register One; 0x0000001D */
   25:  volatile INTCRSTR _INTCR;                                  /* Interrupt Control Register; 0x0000001E */
   26:  volatile HPRIOSTR _HPRIO;                                  /* Highest Priority I Interrupt; 0x0000001F */
   27:  volatile BKPCT0STR _BKPCT0;                                /* Breakpoint Control Register 0; 0x00000028 */
   28:  volatile BKPCT1STR _BKPCT1;                                /* Breakpoint Control Register 1; 0x00000029 */
   29:  volatile BKP0XSTR _BKP0X;                                  /* First Address Memory Expansion Breakpoint Register; 0x0000002A */
   30:  volatile BKP0HSTR _BKP0H;                                  /* First Address High Byte Breakpoint Register; 0x0000002B */
   31:  volatile BKP0LSTR _BKP0L;                                  /* First Address Low Byte Breakpoint Register; 0x0000002C */
   32:  volatile BKP1XSTR _BKP1X;                                  /* Second Address Memory Expansion Breakpoint Register; 0x0000002D */
   33:  volatile BKP1HSTR _BKP1H;                                  /* Data (Second Address) High Byte Breakpoint Register; 0x0000002E */
   34:  volatile BKP1LSTR _BKP1L;                                  /* Data (Second Address) Low Byte Breakpoint Register; 0x0000002F */
   35:  volatile PPAGESTR _PPAGE;                                  /* Page Index Register; 0x00000030 */
   36:  volatile PORTKSTR _PORTK;                                  /* Port K Data Register; 0x00000032 */
   37:  volatile DDRKSTR _DDRK;                                    /* Port K Data Direction Register; 0x00000033 */
   38:  volatile SYNRSTR _SYNR;                                    /* CRG Synthesizer Register; 0x00000034 */
   39:  volatile REFDVSTR _REFDV;                                  /* CRG Reference Divider Register; 0x00000035 */
   40:  volatile CRGFLGSTR _CRGFLG;                                /* CRG Flags Register; 0x00000037 */
   41:  volatile CRGINTSTR _CRGINT;                                /* CRG Interrupt Enable Register; 0x00000038 */
   42:  volatile CLKSELSTR _CLKSEL;                                /* CRG Clock Select Register; 0x00000039 */
   43:  volatile PLLCTLSTR _PLLCTL;                                /* CRG PLL Control Register; 0x0000003A */
   44:  volatile RTICTLSTR _RTICTL;                                /* CRG RTI Control Register; 0x0000003B */
   45:  volatile COPCTLSTR _COPCTL;                                /* CRG COP Control Register; 0x0000003C */
   46:  volatile ARMCOPSTR _ARMCOP;                                /* CRG COP Timer Arm/Reset Register; 0x0000003F */
   47:  volatile TIOSSTR _TIOS;                                    /* Timer Input Capture/Output Compare Select; 0x00000040 */
   48:  volatile CFORCSTR _CFORC;                                  /* Timer Compare Force Register; 0x00000041 */
   49:  volatile OC7MSTR _OC7M;                                    /* Output Compare 7 Mask Register; 0x00000042 */
   50:  volatile OC7DSTR _OC7D;                                    /* Output Compare 7 Data Register; 0x00000043 */
   51:  volatile TSCR1STR _TSCR1;                                  /* Timer System Control Register1; 0x00000046 */
   52:  volatile TTOVSTR _TTOV;                                    /* Timer Toggle On Overflow Register; 0x00000047 */
   53:  volatile TCTL1STR _TCTL1;                                  /* Timer Control Register 1; 0x00000048 */
   54:  volatile TCTL2STR _TCTL2;                                  /* Timer Control Register 2; 0x00000049 */
   55:  volatile TCTL3STR _TCTL3;                                  /* Timer Control Register 3; 0x0000004A */
   56:  volatile TCTL4STR _TCTL4;                                  /* Timer Control Register 4; 0x0000004B */
   57:  volatile TIESTR _TIE;                                      /* Timer Interrupt Enable Register; 0x0000004C */
   58:  volatile TSCR2STR _TSCR2;                                  /* Timer System Control Register 2; 0x0000004D */
   59:  volatile TFLG1STR _TFLG1;                                  /* Main Timer Interrupt Flag 1; 0x0000004E */
   60:  volatile TFLG2STR _TFLG2;                                  /* Main Timer Interrupt Flag 2; 0x0000004F */
   61:  volatile PACTLSTR _PACTL;                                  /* 16-Bit Pulse Accumulator A Control Register; 0x00000060 */
   62:  volatile PAFLGSTR _PAFLG;                                  /* Pulse Accumulator A Flag Register; 0x00000061 */
   63:  volatile MCCTLSTR _MCCTL;                                  /* Modulus Down Counter underflow; 0x00000066 */
   64:  volatile MCFLGSTR _MCFLG;                                  /* 16-Bit Modulus Down Counter Flag Register; 0x00000067 */
   65:  volatile ICPARSTR _ICPAR;                                  /* Input Control Pulse Accumulator Register; 0x00000068 */
   66:  volatile DLYCTSTR _DLYCT;                                  /* Delay Counter Control Register; 0x00000069 */
   67:  volatile ICOVWSTR _ICOVW;                                  /* Input Control Overwrite Register; 0x0000006A */
   68:  volatile ICSYSSTR _ICSYS;                                  /* Input Control System Control Register; 0x0000006B */
   69:  volatile PBCTLSTR _PBCTL;                                  /* 16-Bit Pulse Accumulator B Control Register; 0x00000070 */
   70:  volatile PBFLGSTR _PBFLG;                                  /* Pulse Accumulator B Flag Register; 0x00000071 */
   71:  volatile ATD0STAT0STR _ATD0STAT0;                          /* ATD 0 Status Register 0; 0x00000086 */
   72:  volatile ATD0TEST1STR _ATD0TEST1;                          /* ATD0 Test Register; 0x00000089 */
   73:  volatile ATD0STAT1STR _ATD0STAT1;                          /* ATD 0 Status Register 1; 0x0000008B */
   74:  volatile ATD0DIENSTR _ATD0DIEN;                            /* ATD 0 Input Enable Register; 0x0000008D */
   75:  volatile PORTAD0STR _PORTAD0;                              /* Port AD0 Register; 0x0000008F */
   76:  volatile PWMESTR _PWME;                                    /* PWM Enable Register; 0x000000A0 */
   77:  volatile PWMPOLSTR _PWMPOL;                                /* PWM Polarity Register; 0x000000A1 */
   78:  volatile PWMCLKSTR _PWMCLK;                                /* PWM Clock Select Register; 0x000000A2 */
   79:  volatile PWMPRCLKSTR _PWMPRCLK;                            /* PWM Prescale Clock Select Register; 0x000000A3 */
   80:  volatile PWMCAESTR _PWMCAE;                                /* PWM Center Align Enable Register; 0x000000A4 */
   81:  volatile PWMCTLSTR _PWMCTL;                                /* PWM Control Register; 0x000000A5 */
   82:  volatile PWMSCLASTR _PWMSCLA;                              /* PWM Scale A Register; 0x000000A8 */
   83:  volatile PWMSCLBSTR _PWMSCLB;                              /* PWM Scale B Register; 0x000000A9 */
   84:  volatile PWMSDNSTR _PWMSDN;                                /* PWM Shutdown Register; 0x000000C4 */
   85:  volatile SCI0CR1STR _SCI0CR1;                              /* SCI 0 Control Register 1; 0x000000CA */
   86:  volatile SCI0CR2STR _SCI0CR2;                              /* SCI 0 Control Register 2; 0x000000CB */
   87:  volatile SCI0SR1STR _SCI0SR1;                              /* SCI 0 Status Register 1; 0x000000CC */
   88:  volatile SCI0SR2STR _SCI0SR2;                              /* SCI 0 Status Register 2; 0x000000CD */
   89:  volatile SCI0DRHSTR _SCI0DRH;                              /* SCI 0 Data Register High; 0x000000CE */
   90:  volatile SCI0DRLSTR _SCI0DRL;                              /* SCI 0 Data Register Low; 0x000000CF */
   91:  volatile SCI1CR1STR _SCI1CR1;                              /* SCI 1 Control Register 1; 0x000000D2 */
   92:  volatile SCI1CR2STR _SCI1CR2;                              /* SCI 1 Control Register 2; 0x000000D3 */
   93:  volatile SCI1SR1STR _SCI1SR1;                              /* SCI 1 Status Register 1; 0x000000D4 */
   94:  volatile SCI1SR2STR _SCI1SR2;                              /* SCI 1 Status Register 2; 0x000000D5 */
   95:  volatile SCI1DRHSTR _SCI1DRH;                              /* SCI 1 Data Register High; 0x000000D6 */
   96:  volatile SCI1DRLSTR _SCI1DRL;                              /* SCI 1 Data Register Low; 0x000000D7 */
   97:  volatile SPI0CR1STR _SPI0CR1;                              /* SPI 0 Control Register; 0x000000D8 */
   98:  volatile SPI0CR2STR _SPI0CR2;                              /* SPI 0 Control Register 2; 0x000000D9 */
   99:  volatile SPI0BRSTR _SPI0BR;                                /* SPI 0 Baud Rate Register; 0x000000DA */
  100:  volatile SPI0SRSTR _SPI0SR;                                /* SPI 0 Status Register; 0x000000DB */
  101:  volatile SPI0DRSTR _SPI0DR;                                /* SPI 0 Data Register; 0x000000DD */
  102:  volatile IBADSTR _IBAD;                                    /* IIC Address Register; 0x000000E0 */
  103:  volatile IBFDSTR _IBFD;                                    /* IIC Frequency Divider Register; 0x000000E1 */
  104:  volatile IBCRSTR _IBCR;                                    /* IIC Control Register; 0x000000E2 */
  105:  volatile IBSRSTR _IBSR;                                    /* IIC Status Register; 0x000000E3 */
  106:  volatile IBDRSTR _IBDR;                                    /* IIC Data I/O Register; 0x000000E4 */
  107:  volatile DLCBCR1STR _DLCBCR1;                              /* BDLC Control Register 1; 0x000000E8 */