rs6000.h

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    && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))

#define REGNO_OK_FOR_BASE_P(REGNO)				\
((REGNO) < FIRST_PSEUDO_REGISTER				\
 ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67		\
 : (reg_renumber[REGNO] > 0					\
    && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))

/* Maximum number of registers that can appear in a valid memory address.  */

#define MAX_REGS_PER_ADDRESS 2

/* Recognize any constant value that is a valid address.  */

#define CONSTANT_ADDRESS_P(X)   \
  (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF		\
   || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST		\
   || GET_CODE (X) == HIGH)

/* Nonzero if the constant value X is a legitimate general operand.
   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.

   On the RS/6000, all integer constants are acceptable, most won't be valid
   for particular insns, though.  Only easy FP constants are
   acceptable.  */

#define LEGITIMATE_CONSTANT_P(X)				\
  (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode	\
   || easy_fp_constant (X, GET_MODE (X)))

/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
   and check its validity for a certain class.
   We have two alternate definitions for each of them.
   The usual definition accepts all pseudo regs; the other rejects
   them unless they have been allocated suitable hard regs.
   The symbol REG_OK_STRICT causes the latter definition to be used.

   Most source files want to accept pseudo regs in the hope that
   they will get allocated to the class that the insn wants them to be in.
   Source files for reload pass need to be strict.
   After reload, it makes no difference, since pseudo regs have
   been eliminated by then.  */

#ifndef REG_OK_STRICT

/* Nonzero if X is a hard reg that can be used as an index
   or if it is a pseudo reg.  */
#define REG_OK_FOR_INDEX_P(X)			\
  (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)

/* Nonzero if X is a hard reg that can be used as a base reg
   or if it is a pseudo reg.  */
#define REG_OK_FOR_BASE_P(X)					 \
  (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))

#else

/* Nonzero if X is a hard reg that can be used as an index.  */
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
/* Nonzero if X is a hard reg that can be used as a base reg.  */
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))

#endif

/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
   that is a valid memory address for an instruction.
   The MODE argument is the machine mode for the MEM expression
   that wants to use this address.

   On the RS/6000, there are four valid address: a SYMBOL_REF that
   refers to a constant pool entry of an address (or the sum of it
   plus a constant), a short (16-bit signed) constant plus a register,
   the sum of two registers, or a register indirect, possibly with an
   auto-increment.  For DFmode and DImode with an constant plus register,
   we must ensure that both words are addressable.  */

#define LEGITIMATE_CONSTANT_POOL_BASE_P(X)				\
  (TARGET_TOC && GET_CODE (X) == SYMBOL_REF				\
   && CONSTANT_POOL_ADDRESS_P (X)					\
   && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))

#define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X)				\
  (LEGITIMATE_CONSTANT_POOL_BASE_P (X)					\
   || (TARGET_TOC							\
       && GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS	\
       && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT			\
       && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))

#define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET)				\
 (GET_CODE (X) == CONST_INT						\
  && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)

#define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X)		\
 (GET_CODE (X) == PLUS					\
  && GET_CODE (XEXP (X, 0)) == REG			\
  && REG_OK_FOR_BASE_P (XEXP (X, 0))			\
  && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0)	\
  && (((MODE) != DFmode && (MODE) != DImode)		\
      || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))

#define LEGITIMATE_INDEXED_ADDRESS_P(X)		\
 (GET_CODE (X) == PLUS				\
  && GET_CODE (XEXP (X, 0)) == REG		\
  && GET_CODE (XEXP (X, 1)) == REG		\
  && ((REG_OK_FOR_BASE_P (XEXP (X, 0))		\
       && REG_OK_FOR_INDEX_P (XEXP (X, 1)))	\
      || (REG_OK_FOR_BASE_P (XEXP (X, 1))	\
	  && REG_OK_FOR_INDEX_P (XEXP (X, 0)))))

#define LEGITIMATE_INDIRECT_ADDRESS_P(X)	\
  (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))

#define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X)		\
  (TARGET_ELF						\
   && (MODE) != DImode					\
   && (MODE) != TImode					\
   && (TARGET_HARD_FLOAT || (MODE) != DFmode)		\
   && GET_CODE (X) == LO_SUM				\
   && GET_CODE (XEXP (X, 0)) == REG			\
   && REG_OK_FOR_BASE_P (XEXP (X, 0))			\
   && CONSTANT_P (XEXP (X, 1)))

#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)		\
{ if (LEGITIMATE_INDIRECT_ADDRESS_P (X))		\
    goto ADDR;						\
  if (GET_CODE (X) == PRE_INC				\
      && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0)))	\
    goto ADDR;						\
  if (GET_CODE (X) == PRE_DEC				\
      && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0)))	\
    goto ADDR;						\
  if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X))		\
    goto ADDR;						\
  if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X))		\
    goto ADDR;						\
  if ((MODE) != DImode && (MODE) != TImode		\
      && (TARGET_HARD_FLOAT || (MODE) != DFmode)	\
      && LEGITIMATE_INDEXED_ADDRESS_P (X))		\
    goto ADDR;						\
  if (LEGITIMATE_LO_SUM_ADDRESS_P (MODE, X))		\
    goto ADDR;						\
}

/* Try machine-dependent ways of modifying an illegitimate address
   to be legitimate.  If we find one, return the new, valid address.
   This macro is used in only one place: `memory_address' in explow.c.

   OLDX is the address as it was before break_out_memory_refs was called.
   In some cases it is useful to look at this to decide what needs to be done.

   MODE and WIN are passed so that this macro can use
   GO_IF_LEGITIMATE_ADDRESS.

   It is always safe for this macro to do nothing.  It exists to recognize
   opportunities to optimize the output.

   On RS/6000, first check for the sum of a register with a constant
   integer that is out of range.  If so, generate code to add the
   constant with the low-order 16 bits masked to the register and force
   this result into another register (this can be done with `cau').
   Then generate an address of REG+(CONST&0xffff), allowing for the 
   possibility of bit 16 being a one.

   Then check for the sum of a register and something not constant, try to
   load the other things into a register and return the sum.  */

#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)				\
{ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG		\
    && GET_CODE (XEXP (X, 1)) == CONST_INT				\
    && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000)		\
    { int high_int, low_int;						\
      high_int = INTVAL (XEXP (X, 1)) >> 16;				\
      low_int = INTVAL (XEXP (X, 1)) & 0xffff;				\
      if (low_int & 0x8000)						\
	high_int += 1, low_int |= 0xffff0000;				\
      (X) = gen_rtx (PLUS, SImode,					\
		     force_operand					\
		     	(gen_rtx (PLUS, SImode, XEXP (X, 0),		\
				  gen_rtx (CONST_INT, VOIDmode,		\
						      high_int << 16)), 0), \
		     gen_rtx (CONST_INT, VOIDmode, low_int));		\
      goto WIN;								\
    }									\
  else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG	\
	   && GET_CODE (XEXP (X, 1)) != CONST_INT			\
	   && (TARGET_HARD_FLOAT || (MODE) != DFmode)			\
	   && (MODE) != DImode && (MODE) != TImode)			\
    {									\
      (X) = gen_rtx (PLUS, SImode, XEXP (X, 0),				\
		     force_reg (SImode, force_operand (XEXP (X, 1), 0))); \
      goto WIN;								\
    }									\
  else if (TARGET_ELF && !TARGET_64BIT && TARGET_NO_TOC			\
	   && GET_CODE (X) != CONST_INT					\
	   && GET_CODE (X) != CONST_DOUBLE && CONSTANT_P (X)		\
	   && (TARGET_HARD_FLOAT || (MODE) != DFmode)			\
	   && (MODE) != DImode && (MODE) != TImode)			\
    {									\
      rtx reg = gen_reg_rtx (Pmode);					\
      emit_insn (gen_elf_high (reg, (X)));				\
      (X) = gen_rtx (LO_SUM, Pmode, reg, (X));				\
    }									\
}

/* Go to LABEL if ADDR (a legitimate address expression)
   has an effect that depends on the machine mode it is used for.

   On the RS/6000 this is true if the address is valid with a zero offset
   but not with an offset of four (this means it cannot be used as an
   address for DImode or DFmode) or is a pre-increment or decrement.  Since
   we know it is valid, we just check for an address that is not valid with
   an offset of four.  */

#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)		\
{ if (GET_CODE (ADDR) == PLUS					\
      && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0)	\
      && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4))	\
    goto LABEL;							\
  if (GET_CODE (ADDR) == PRE_INC)				\
    goto LABEL;							\
  if (GET_CODE (ADDR) == PRE_DEC)				\
    goto LABEL;							\
  if (GET_CODE (ADDR) == LO_SUM)				\
    goto LABEL;							\
}

/* Define this if some processing needs to be done immediately before
   emitting code for an insn.  */

/* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */

/* Specify the machine mode that this machine uses
   for the index in the tablejump instruction.  */
#define CASE_VECTOR_MODE SImode

/* Define this if the tablejump instruction expects the table
   to contain offsets from the address of the table.
   Do not define this if the table should contain absolute addresses.  */
#define CASE_VECTOR_PC_RELATIVE

/* Specify the tree operation to be used to convert reals to integers.  */
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR

/* This is the kind of divide that is easiest to do in the general case.  */
#define EASY_DIV_EXPR TRUNC_DIV_EXPR

/* Define this as 1 if `char' should by default be signed; else as 0.  */
#define DEFAULT_SIGNED_CHAR 0

/* This flag, if defined, says the same insns that convert to a signed fixnum
   also convert validly to an unsigned one.  */

/* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */

/* Max number of bytes we can move from memory to memory
   in one reasonably fast instruction.  */
#define MOVE_MAX (TARGET_POWERPC64 ? 8 : 4)
#define MAX_MOVE_MAX 8

/* Nonzero if access to memory by bytes is no faster than for words.
   Also non-zero if doing byte operations (specifically shifts) in registers
   is undesirable.  */
#define SLOW_BYTE_ACCESS 1

/* Define if operations between registers always perform the operation
   on the full register even if a narrower mode is specified.  */
#define WORD_REGISTER_OPERATIONS

/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
   will either zero-extend or sign-extend.  The value of this macro should
   be the code that says which one of the two operations is implicitly
   done, NIL if none.  */
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND

/* Define if loading short immediate values into registers sign extends.  */
#define SHORT_IMMEDIATES_SIGN_EXTEND

/* The RS/6000 uses the XCOFF format.  */

#define XCOFF_DEBUGGING_INFO

/* Define if the object format being used is COFF or a superset.  */
#define OBJECT_FORMAT_COFF

/* Define the magic numbers that we recognize as COFF.  */

#define MY_ISCOFF(magic) \
  ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC)

/* This is the only version of nm that collect2 can work with.  */
#define REAL_NM_FILE_NAME "/usr/ucb/nm"

/* We don't have GAS for the RS/6000 yet, so don't write out special
   .stabs in cc1plus.  */
   
#define FASCIST_ASSEMBLER
#define ASM_OUTPUT_CONSTRUCTOR(file, name)
#define ASM_OUTPUT_DESTRUCTOR(file, name)

/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
   is done just by pretending it is already truncated.  */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1

/* Specify the machine mode that pointers have.
   After generation of rtl, the compiler makes no further distinction
   between pointers and any other objects of this machine mode.  */
#define Pmode (TARGET_64BIT ? DImode : SImode)

/* Mode of a function address in a call instruction (for indexing purposes).

   Doesn't matter on RS/6000.  */
#define FUNCTION_MODE (TARGET_64BIT ? DImode : SImode)

/* Define this if addresses of constant functions
   shouldn't be put through pseudo regs where they can be cse'd.
   Desirable on machines where ordinary constants are expensive
   but a CALL with constant address is cheap.  */
#define NO_FUNCTION_CSE

/* Define this to be nonzero if shift instructions ignore all but the low-order
   few bits.

   The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED
   have been dropped from the PowerPC architecture.  */

#define SHIFT_COUNT_TRUNCATED (TARGET_POWER ? 1 : 0)

/* Use atexit for static constructors/destructors, instead of defining
   our own exit function.  */
#define HAVE_ATEXIT

/* Compute the cost of computing a constant rtl expression RTX
   whose rtx-code is CODE.  T