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📄 rs6000.h

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/* Definitions of target machine for GNU compiler, for IBM RS/6000.   Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.   Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)This file is part of GNU CC.GNU CC is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.GNU CC is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with GNU CC; see the file COPYING.  If not, write tothe Free Software Foundation, 59 Temple Place - Suite 330,Boston, MA 02111-1307, USA.  *//* Note that some other tm.h files include this one and then override   many of the definitions that relate to assembler syntax.  *//* Names to predefine in the preprocessor for this target machine.  */#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \-Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)"/* Print subsidiary information on the compiler version in use.  */#define TARGET_VERSION ;/* Tell the assembler to assume that all undefined names are external.   Don't do this until the fixed IBM assembler is more generally available.   When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL,   ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no   longer be needed.  Also, the extern declaration of mcount in ASM_FILE_START   will no longer be needed.  *//* #define ASM_SPEC "-u" *//* Define appropriate architecture macros for preprocessor depending on   target switches.  */#define CPP_SPEC "\%{posix: -D_POSIX_SOURCE} \%{!mcpu*: \  %{mpower: %{!mpower2: -D_ARCH_PWR}} \  %{mpower2: -D_ARCH_PWR2} \  %{mpowerpc*: -D_ARCH_PPC} \  %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \  %{!mno-power: %{!mpower2: -D_ARCH_PWR}}} \%{mcpu=common: -D_ARCH_COM} \%{mcpu=power: -D_ARCH_PWR} \%{mcpu=powerpc: -D_ARCH_PPC} \%{mcpu=rios: -D_ARCH_PWR} \%{mcpu=rios1: -D_ARCH_PWR} \%{mcpu=rios2: -D_ARCH_PWR2} \%{mcpu=rsc: -D_ARCH_PWR} \%{mcpu=rsc1: -D_ARCH_PWR} \%{mcpu=403: -D_ARCH_PPC} \%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \%{mcpu=603: -D_ARCH_PPC} \%{mcpu=604: -D_ARCH_PPC}"/* Define the options for the binder: Start text at 512, align all segments   to 512 bytes, and warn if there is text relocation.   The -bhalt:4 option supposedly changes the level at which ld will abort,   but it also suppresses warnings about multiply defined symbols and is   used by the AIX cc command.  So we use it here.   -bnodelcsect undoes a poor choice of default relating to multiply-defined   csects.  See AIX documentation for more information about this.   -bM:SRE tells the linker that the output file is Shared REusable.  Note   that to actually build a shared library you will also need to specify an   export list with the -Wl,-bE option.  */#define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\   %{static:-bnso -bI:/lib/syscalls.exp} \   %{!shared:%{g*:-bexport:/usr/lib/libg.exp}} %{shared:-bM:SRE}"/* Profiled library versions are used by linking with special directories.  */#define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\   %{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}} -lc"/* gcc must do the search itself to find libgcc.a, not use -l.  */#define LIBGCC_SPEC "libgcc.a%s"/* Don't turn -B into -L if the argument specifies a relative file name.  */#define RELATIVE_PREFIX_NOT_LINKDIR/* Architecture type.  */extern int target_flags;/* Use POWER architecture instructions and MQ register.  */#define MASK_POWER		0x01/* Use POWER2 extensions to POWER architecture.  */#define MASK_POWER2		0x02/* Use PowerPC architecture instructions.  */#define MASK_POWERPC		0x04/* Use PowerPC General Purpose group optional instructions, e.g. fsqrt.  */#define MASK_PPC_GPOPT		0x08/* Use PowerPC Graphics group optional instructions, e.g. fsel.  */#define MASK_PPC_GFXOPT		0x10/* Use PowerPC-64 architecture instructions.  */#define MASK_POWERPC64		0x20/* Use revised mnemonic names defined for PowerPC architecture.  */#define MASK_NEW_MNEMONICS	0x40/* Disable placing fp constants in the TOC; can be turned on when the   TOC overflows.  */#define MASK_NO_FP_IN_TOC	0x80/* Disable placing symbol+offset constants in the TOC; can be turned on when   the TOC overflows.  */#define MASK_NO_SUM_IN_TOC	0x100/* Output only one TOC entry per module.  Normally linking fails if   there are more than 16K unique variables/constants in an executable.  With   this option, linking fails only if there are more than 16K modules, or   if there are more than 16K unique variables/constant in a single module.   This is at the cost of having 2 extra loads and one extra store per   function, and one less allocatable register.  */#define MASK_MINIMAL_TOC	0x200/* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits.  */#define MASK_64BIT		0x400/* Disable use of FPRs.  */#define MASK_SOFT_FLOAT		0x800/* Enable load/store multiple, even on powerpc */#define	MASK_MULTIPLE		0x1000#define	MASK_MULTIPLE_SET	0x2000/* Use string instructions for block moves */#define MASK_STRING		0x4000#define MASK_STRING_SET		0x8000/* Temporary debug switches */#define MASK_DEBUG_STACK	0x10000#define MASK_DEBUG_ARG		0x20000#define TARGET_POWER		(target_flags & MASK_POWER)#define TARGET_POWER2		(target_flags & MASK_POWER2)#define TARGET_POWERPC		(target_flags & MASK_POWERPC)#define TARGET_PPC_GPOPT	(target_flags & MASK_PPC_GPOPT)#define TARGET_PPC_GFXOPT	(target_flags & MASK_PPC_GFXOPT)#define TARGET_POWERPC64	(target_flags & MASK_POWERPC64)#define TARGET_NEW_MNEMONICS	(target_flags & MASK_NEW_MNEMONICS)#define TARGET_NO_FP_IN_TOC	(target_flags & MASK_NO_FP_IN_TOC)#define TARGET_NO_SUM_IN_TOC	(target_flags & MASK_NO_SUM_IN_TOC)#define TARGET_MINIMAL_TOC	(target_flags & MASK_MINIMAL_TOC)#define TARGET_64BIT		(target_flags & MASK_64BIT)#define TARGET_SOFT_FLOAT	(target_flags & MASK_SOFT_FLOAT)#define	TARGET_MULTIPLE		(target_flags & MASK_MULTIPLE)#define	TARGET_MULTIPLE_SET	(target_flags & MASK_MULTIPLE_SET)#define TARGET_STRING		(target_flags & MASK_STRING)#define TARGET_STRING_SET	(target_flags & MASK_STRING_SET)#define	TARGET_DEBUG_STACK	(target_flags & MASK_DEBUG_STACK)#define	TARGET_DEBUG_ARG	(target_flags & MASK_DEBUG_ARG)#define TARGET_HARD_FLOAT	(! TARGET_SOFT_FLOAT)/* Pseudo target to indicate whether the object format is ELF   (to get around not having conditional compilation in the md file)  */#ifndef	TARGET_ELF#define	TARGET_ELF		0#endif/* If this isn't V.4, don't support -mno-toc.  */#ifndef TARGET_NO_TOC#define TARGET_NO_TOC		0#define	TARGET_TOC		1#endif/* Run-time compilation parameters selecting different hardware subsets.   Macro to define tables used to set the flags.   This is a list in braces of pairs in braces,   each pair being { "NAME", VALUE }   where VALUE is the bits to set or minus the bits to clear.   An empty string NAME is used to identify the default VALUE.  *//* This is meant to be redefined in the host dependent files */#ifndef SUBTARGET_SWITCHES#define SUBTARGET_SWITCHES#endif#define TARGET_SWITCHES							\ {{"power",		MASK_POWER  | MASK_MULTIPLE | MASK_STRING},	\  {"power2",		(MASK_POWER | MASK_MULTIPLE | MASK_STRING	\			 | MASK_POWER2)},				\  {"no-power2",		- MASK_POWER2},					\  {"no-power",		- (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE	\			   | MASK_STRING)},				\  {"powerpc",		MASK_POWERPC},					\  {"no-powerpc",	- (MASK_POWERPC | MASK_PPC_GPOPT		\			   | MASK_PPC_GFXOPT | MASK_POWERPC64)},	\  {"powerpc-gpopt",	MASK_POWERPC | MASK_PPC_GPOPT},			\  {"no-powerpc-gpopt",	- MASK_PPC_GPOPT},				\  {"powerpc-gfxopt",	MASK_POWERPC | MASK_PPC_GFXOPT},		\  {"no-powerpc-gfxopt",	- MASK_PPC_GFXOPT},				\  {"new-mnemonics",	MASK_NEW_MNEMONICS},				\  {"old-mnemonics",	-MASK_NEW_MNEMONICS},				\  {"full-toc",		- (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC	\			   | MASK_MINIMAL_TOC)},			\  {"fp-in-toc",		- MASK_NO_FP_IN_TOC},				\  {"no-fp-in-toc",	MASK_NO_FP_IN_TOC},				\  {"sum-in-toc",	- MASK_NO_SUM_IN_TOC},				\  {"no-sum-in-toc",	MASK_NO_SUM_IN_TOC},				\  {"minimal-toc",	MASK_MINIMAL_TOC},				\  {"minimal-toc",	- (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)},	\  {"no-minimal-toc",	- MASK_MINIMAL_TOC},				\  {"hard-float",	- MASK_SOFT_FLOAT},				\  {"soft-float",	MASK_SOFT_FLOAT},				\  {"multiple",		MASK_MULTIPLE | MASK_MULTIPLE_SET},		\  {"no-multiple",	- MASK_MULTIPLE},				\  {"no-multiple",	MASK_MULTIPLE_SET},				\  {"string",		MASK_STRING | MASK_STRING_SET},			\  {"no-string",		- MASK_STRING},					\  {"no-string",		MASK_STRING_SET},				\  {"debug-stack",	MASK_DEBUG_STACK},				\  {"debug-arg",		MASK_DEBUG_ARG},				\  SUBTARGET_SWITCHES							\  {"",			TARGET_DEFAULT}}#define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING)/* Processor type.  */enum processor_type {PROCESSOR_RIOS1,  PROCESSOR_RIOS2,  PROCESSOR_PPC403,  PROCESSOR_PPC601,  PROCESSOR_PPC603,  PROCESSOR_PPC604,  PROCESSOR_PPC620};extern enum processor_type rs6000_cpu;/* Recast the processor type to the cpu attribute.  */#define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu)/* Define generic processor types based upon current deployment.  */#define PROCESSOR_COMMON  PROCESSOR_PPC601#define PROCESSOR_POWER   PROCESSOR_RIOS1#define PROCESSOR_POWERPC PROCESSOR_PPC601/* Define the default processor.  This is overridden by other tm.h files.  */#define PROCESSOR_DEFAULT PROCESSOR_RIOS1/* Specify the dialect of assembler to use.  New mnemonics is dialect one   and the old mnemonics are dialect zero.  */#define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0/* This macro is similar to `TARGET_SWITCHES' but defines names of   command options that have values.  Its definition is an   initializer with a subgrouping for each command option.   Each subgrouping contains a string constant, that defines the   fixed part of the option name, and the address of a variable.   The variable, type `char *', is set to the variable part of the   given option if the fixed part matches.  The actual option name   is made by appending `-m' to the specified name.   Here is an example which defines `-mshort-data-NUMBER'.  If the   given option is `-mshort-data-512', the variable `m88k_short_data'   will be set to the string `"512"'.	extern char *m88k_short_data;	#define TARGET_OPTIONS { { "short-data-", &m88k_short_data } }  */#define TARGET_OPTIONS		\{ {"cpu=", &rs6000_cpu_string}}extern char *rs6000_cpu_string;/* Sometimes certain combinations of command options do not make sense   on a particular target machine.  You can define a macro   `OVERRIDE_OPTIONS' to take account of this.  This macro, if   defined, is executed once just after all the command options have   been parsed.   On the RS/6000 this is used to define the target cpu type.  */#define OVERRIDE_OPTIONS rs6000_override_options ()/* Show we can debug even without a frame pointer.  */#define CAN_DEBUG_WITHOUT_FP/* target machine storage layout *//* Define to support cross compilation to an RS6000 target.  */#define REAL_ARITHMETIC/* Define this macro if it is advisable to hold scalars in registers   in a wider mode than that declared by the program.  In such cases,    the value is constrained to be within the bounds of the declared   type, but kept valid in the wider mode.  The signedness of the   extension may differ from that of the type.  */#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)  \  if (GET_MODE_CLASS (MODE) == MODE_INT	\      && GET_MODE_SIZE (MODE) < 4)  	\    (MODE) = SImode;/* Define this if most significant bit is lowest numbered   in instructions that operate on numbered bit-fields. *//* That is true on RS/6000. */#define BITS_BIG_ENDIAN 1/* Define this if most significant byte of a word is the lowest numbered.  *//* That is true on RS/6000.  */#define BYTES_BIG_ENDIAN 1/* Define this if most significant word of a multiword number is lowest   numbered.    For RS/6000 we can decide arbitrarily since there are no machine   instructions for them.  Might as well be consistent with bits and bytes. */#define WORDS_BIG_ENDIAN 1

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