mdio.h

基于51类单片机RTX51多任务系统

#ifndef	__MDIO_h__
#define	__MDIO_h__
//----------------------------------------------------------------
// XRS_MDIOO.h
//----------------------------------------------------------------
// Target: C8051F32x
// Tool chain: KEIL C51 6.03 / KEIL EVAL C51
//---------------------------------------------------------------
// Includes
//---------------------------------------------------------------
#include <regx52.H>
//---------------------------------------------------------------
// Global CONSTANTS
//---------------------------------------------------------------
//PORT interface
//sbit MRST = P2^0;
sbit XRS_MDC=P1^6;
sbit XRS_MDIO=P1^7;
//SERIAL DATA IN, could be assigned to same pin as XRS_MDIO
// if the I/O can support both input and output at same pin.
//-------------------------
// Delay
//-------------------------
void Delay(void)
{
	int x;
	for(x = 0;x < 500;x)
	x++;
}
void ShortDelay(void)
{
	int x;
	for(x = 0;x < 0; x);
}
// Used for a small pause, approximately 80 us in Full Speed,
// and 1 ms when clock is configured for Low Speed
//

//---------------------------------------------------------------
// XRS_MDIO_Init Routine
//---------------------------------------------------------------
void XRS_MDIO_Init(void)
{
	XRS_MDC=1;
	XRS_MDIO = 1;
	//MRST=0; // Reset
	ShortDelay();
	//MRST=1;
}

unsigned char XRS_MDIO_IF(unsigned char bRW, unsigned char bDevice, unsigned char bAddr2, unsigned char bAddr1,unsigned char
bAddr0, unsigned char bData)
{							  
	//bRW Read=1, Write = 0, address = else
	//bDevice Devive 0 = 0, Device 1 = 1 .... Device 5=5

	unsigned char i, value, start;
	unsigned long addr,temp;
	value = 0; //initialize
	if (bRW == 2)
		start = 40;
	else
		start = 32;
	addr = (bAddr1 << 8) + bAddr0;
	//1 - Preamble - 32 cycles

	for (i=0;i<start;i++)
	{ 
		XRS_MDIO = 1;
		XRS_MDC = 0;
		ShortDelay();
		XRS_MDIO = 1;
		XRS_MDC = 1;
		ShortDelay();
	}
	// 2 - Start of Frame - 2 cycles
	XRS_MDIO = 0;
	XRS_MDC = 0;
	ShortDelay();
	XRS_MDIO = 0;
	XRS_MDC = 1;
	ShortDelay();
	XRS_MDIO = 0;
	XRS_MDC = 0;
	ShortDelay();
	XRS_MDIO = 0;
	XRS_MDC = 1;
	ShortDelay();
	// 3 - OpCode - 2 cycles
	switch (bRW)
	{
		case 0: //read
			XRS_MDIO = 1;
			XRS_MDC = 0;
			ShortDelay();
			XRS_MDC = 1;
			XRS_MDIO = 1;
			ShortDelay();
			XRS_MDC = 0;
			XRS_MDIO = 1;
			ShortDelay();
			XRS_MDC = 1;
			XRS_MDIO = 1;
			ShortDelay();
			break;
		case 1: // write
			XRS_MDIO = 0;
			XRS_MDC = 0;
			ShortDelay();
			XRS_MDC = 1;
			ShortDelay();
			XRS_MDIO = 1;
			XRS_MDC = 0;
			ShortDelay();
			XRS_MDC = 1;
			ShortDelay();
			break;
		case 2: // addr
			XRS_MDIO = 0;
			XRS_MDC = 0;
			ShortDelay();
			XRS_MDIO = 0;
			XRS_MDC = 1;
			ShortDelay();
			XRS_MDIO = 0;
			XRS_MDC = 0;
			ShortDelay();
			XRS_MDIO = 0;
			XRS_MDC = 1;
			ShortDelay();
			break;
		}
		// 4 - Port Addr - 5 cycles
	for (i=0;i<5;i++)
	{
		if(bAddr2 & 0x10)
		{
			XRS_MDIO = 1;
			XRS_MDC = 0;
			ShortDelay ();
			XRS_MDC = 1;
			ShortDelay ();
		}
		else
		{				
			XRS_MDIO = 0;
			XRS_MDC = 0;
			ShortDelay ();
			XRS_MDC = 1;
			ShortDelay ();
		}
		bAddr2 <<= 1;
	}
// 5 - Device Addr - 5 cycles
	for(i=0;i<5;i++)
	{
		if(bDevice & 0x10)
		{
			XRS_MDIO = 1;
			XRS_MDC = 0;
			ShortDelay ();
			XRS_MDC = 1;
			ShortDelay ();
		}
		else
		{
			XRS_MDC = 0;
			XRS_MDIO = 0;
			ShortDelay ();
			XRS_MDC = 1;
			ShortDelay ();
		}
		bDevice <<= 1;
	}
// 6 - Turn Around cycles - 2 cycles
	XRS_MDC = 0;
	XRS_MDIO = 1;
	ShortDelay();
	XRS_MDC = 1;//XRS_MDIO = 1;
	ShortDelay();
	XRS_MDC = 0;
	XRS_MDIO = 0;
	ShortDelay();
	XRS_MDIO = 0;
	XRS_MDC = 1;
	ShortDelay();
	XRS_MDIO = 1;
// 7 - Read/Write/Addr Data
	if (bRW == 0) //Read Operation
	{
		temp = 0x8000;
		for(i=0;i<16;i++)
		{
			XRS_MDC = 0;
			if (XRS_MDIO) //use (~XRS_MDIO) if signal XRS_MDIO_n is connected to MPU
			{
				value += temp;
			}
			XRS_MDC = 1;
			temp >>= 1;
		}
		for (i=0; i<10;i++)
		{
			XRS_MDC=0;
			ShortDelay();
			XRS_MDC=1;
			ShortDelay();
		}
	}
	else if (bRW == 1) //Write Operation
	{
		for(i=0;i<8;i++)
		{
			XRS_MDC = 0;
			XRS_MDIO = 0;
			XRS_MDIO = 0;
			XRS_MDC = 1;
		}
		for (i=0; i<8; i++)
		{
			if(bData&0x80)
			{
				XRS_MDIO=1;
				XRS_MDC = 0;
				ShortDelay();
				XRS_MDIO=1;
				XRS_MDC = 1;
			}
			else
			{
				XRS_MDIO=0;
				XRS_MDC = 0;
				ShortDelay();
				XRS_MDIO=0;
				XRS_MDC = 1;
			}
			bData <<= 1;
		}
		for (i=0; i<10;i++)
		{
			XRS_MDIO = 1;
			XRS_MDC=0;
			ShortDelay();
			XRS_MDC=1;
			ShortDelay();
		}
	}
	else //Addr Operation
	{
		for(i=0;i<8;i++)
		{		
			if(bAddr1 & 0x80)
			{
				XRS_MDIO = 1;
				XRS_MDC = 0;
				ShortDelay ();
				XRS_MDC = 1;
			}
			else
			{
				XRS_MDC = 0;
				XRS_MDIO = 0;
				ShortDelay ();
				XRS_MDC = 1;
			}
			bAddr1 <<= 1;
		}
		for(i=0;i<8;i++)
		{	
			if(bAddr0 & 0x80)
			{
				XRS_MDIO = 1;
				XRS_MDC = 0;
				ShortDelay ();
				XRS_MDC = 1;
			}
			else
			{
				XRS_MDC = 0;
				XRS_MDIO = 0;
				ShortDelay ();
				XRS_MDC = 1;
			}
			bAddr0 <<= 1;
		}
		XRS_MDIO = 1;
	}
	return value;
}

#endif