jiaotongdeng.txt

I WANT TO SAY THIS IS DIFICULTY

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity jtdxs is
port(clk,clk1,clr,en,x,y:in std_logic;
            sel:out std_logic_vector(3 downto 0);
         output:out std_logic_vector(6 downto 0));
end jtdxs;
architecture rtl of jtdxs is
signal dout:std_logic_vector(7 downto 0);
signal dh,dl:std_logic_vector(3 downto 0);
signal sel_s:std_logic_vector(3 downto 0);
begin
a:
process(clk1,clr,en)
begin
if(clr='1') then
dh<="0000";
dl<="0000";
elsif(clk1='1'and clk1'event)then
 if(en='1')then
  if(dl="1001")then
  dl<="0000";
    if(x='1')then
     if(dh="0010")then
     dh<="0000";
     else
     dh<=dh+'1';
     end if;
elsif(y='1')then
     if(dh="0001")then
     dh<="0000";
     else
     dh<=dh+'1';
     end if;
    end if;
  else
  dl<=dl+'1';
  end if;
 end if;
end if;
dout<=dh&dl;
end process a;
b:
process(clk)
begin
if(clk='1' and clk'event)then
  if(sel_s="0001")then
  sel_s<="0010";
  elsif(sel_s="0010")then
  sel_s<="0100";
  elsif(sel_s="0100")then
  sel_s<="1000";
  else 
  sel_s<="0001";
  end if;
end if;
sel<=sel_s;
end process b;

c:
process(dh,dl,sel_s)
begin 

case sel_s is
when"0001"=>output<="1101111";
when"0010"=>output<="1011011";
when"0100"=>output<="1111111";
when"1000"=>output<="1110111";
when others=>output<="XXXXXXX";
end case;
if(dl/="0000"and sel_s="0001")then         

case dl is
when"0000"=>output<="1101111";
when"0001"=>output<="1111111";
when"0010"=>output<="0100111";
when"0011"=>output<="1111101";
when"0100"=>output<="1101101";
when"0101"=>output<="1100110";
when"0110"=>output<="1001111";
when"0111"=>output<="1011011";
when"1000"=>output<="0000110";
when"1001"=>output<="0111111";
when others=>output<="XXXXXXX";
end case;
elsif(dh>"0000" and sel_s="0010")then
case dh is
when"0001"=>output<="0000110";
when"0010"=>output<="0111111";
when others=>output<="XXXXXXX";
end case;
end if;
end process c;
end rtl;