main_save2.c

基于U（375）盘及SD（SPI模式）卡集成文件系统（包括底层驱动）

/*
 *  Copyright 2003 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  
 */
/* "@(#) DSP/BIOS 4.90.270 06-11-03 (barracuda-m10)" */
/*
 *  Copyright 2001 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  U.S. Patent Nos. 5,283,900  5,392,448
 */
/* "@(#) DSP/BIOS 4.51.0 05-23-01 (barracuda-i10)" */
/******************************************************************************\
*           Copyright (C) 2000 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... main.c
* DATE CREATED.. 01/11/2000
* LAST MODIFIED. 09/27/2000
\******************************************************************************/
#include <std.h>
#include <log.h>
#include <swi.h>

#include <csl.h>
#include <csl_mcbsp.h>
#include <csl_timer.h>

#define INIT_CMD0_ERROR			0xFF
#define INIT_CMD1_ERROR			0xFE
#define WRITE_BLOCK_ERROR		0xFD
#define READ_BLOCK_ERROR		0xFC
#define MMC_RESET				0x40 + 0
#define MMC_INIT				0x40 + 1
#define SD_CMD8                 0x40 + 8
#define MMC_READ_CSD			0x40 + 9
#define MMC_READ_CID			0x40 + 10
#define MMC_STOP_TRANSMISSION	0x40 + 12
#define MMC_SEND_STATUS			0x40 + 13
#define MMC_SET_BLOCKLEN		0x40 + 16
#define MMC_READ_BLOCK			0x40 + 17
#define MMC_READ_MULTI_BLOCK	0x40 + 18
#define MMC_WRITE_BLOCK			0x40 + 24
#define MMC_WRITE_MULTI_BLOCK	0x40 + 25
#define MMC_ERASE_WR_BLK_START_ADDR 0x40 + 32
#define MMC_ERASE_WR_BLK_END_ADDR   0x40 + 33
#define MMC_ERASE				0x40 + 38
#define MMC_APP_CMD             (0x40 + 55)
#define MMC_READ_OCR			0x40 + 58
#define MMC_CRC_ON_OFF          0x40 + 59

#define MMC_ACMD_SEND_OPC       0x40 + 41
#define MMC_ACMD44              0x40 + 44
#define BYTE_PER_SEC			512

#define CMD0                    0x40
#define CMD1                    (0x40 + 1)
#define CMD8                    (0x40 + 8)
#define CMD12					(0x40 + 12)
#define CMD16                   (0x40 + 16)
#define CMD17					(0x40 + 17)
#define CMD18					(0x40 + 18)
#define CMD24 					(0x40 + 24)
#define CMD25					(0x40 + 25)
#define CMD55                   (0x40 + 55)
#define CMD58                   (0x40 + 58)

#define ACMD23					(0xC0 + 23)
#define ACMD41					(0xC0 + 41)

typedef enum{ STA_NOINIT, STA_NODISK,STA_PROTECT, STA_INITED} DSTATUS;
typedef enum{RES_PARERR, RES_NOTRDY, RES_ERROR, RES_OK, RES_WRPRT}DRESULT;
typedef enum{CTRL_SYNC,GET_SECTOR_COUNT,GET_SECTOR_SIZE,GET_BLOCK_SIZE,MMC_GET_TYPE,MMC_GET_CSD,MMC_GET_CID,MMC_GET_OCR,MMC_GET_SDSTAT}CTRL_CODE;
static volatile DSTATUS Stat = STA_NOINIT;
static volatile	DRESULT res_status1;
static volatile	DRESULT res_status2;
static volatile unsigned char CardType; // b0:MMC, b1:SDv1, b2:SDv2, b3:Block addressing //
unsigned char buff_w[10512];
unsigned char buff_r[10512];
static volatile unsigned int Timer1, Timer2;
TIMER_Handle htimer1;
unsigned int start, end, overhead;
unsigned int writetime, readtime;
unsigned int transfertime1, transfertime2,transfertime3, transfertime4;
unsigned int testcount1, testcount2,testcount3;
unsigned char temp1[128];
unsigned char temp2[128];
/*----------------------------------------------------------------------------*/
extern far LOG_Obj LogMain;
extern far SWI_Obj SwiMain;
MCBSP_Handle myMcbsp;
/*----------------------------------------------------------------------------*/


static MCBSP_Config myInitialConfig = {
  MCBSP_SPCR_RMK(
    MCBSP_SPCR_FREE_DEFAULT	,
    MCBSP_SPCR_SOFT_DEFAULT,
    MCBSP_SPCR_FRST_DEFAULT,
    MCBSP_SPCR_GRST_DEFAULT,
    MCBSP_SPCR_XINTM_DEFAULT,
    MCBSP_SPCR_XSYNCERR_DEFAULT,
    MCBSP_SPCR_XRST_DEFAULT,
    MCBSP_SPCR_DLB_DEFAULT,
    MCBSP_SPCR_RJUST_DEFAULT,
    MCBSP_SPCR_CLKSTP_NODELAY,
    MCBSP_SPCR_DXENA_DEFAULT,
    MCBSP_SPCR_RINTM_RRDY,
    MCBSP_SPCR_RSYNCERR_DEFAULT,
    MCBSP_SPCR_RRST_DEFAULT
  ),
  MCBSP_RCR_RMK(
    MCBSP_RCR_RPHASE_SINGLE,
    MCBSP_RCR_RFRLEN2_DEFAULT,
    MCBSP_RCR_RWDLEN2_DEFAULT,
    MCBSP_RCR_RCOMPAND_DEFAULT,
    MCBSP_RCR_RFIG_NO,
    MCBSP_RCR_RDATDLY_1BIT,
    MCBSP_RCR_RFRLEN1_DEFAULT, 
    MCBSP_RCR_RWDLEN1_8BIT,
    MCBSP_RCR_RWDREVRS_DISABLE
  ),
  MCBSP_XCR_RMK(
    MCBSP_XCR_XPHASE_SINGLE,
    MCBSP_XCR_XFRLEN2_DEFAULT,
    MCBSP_XCR_XWDLEN2_DEFAULT,
    MCBSP_XCR_XCOMPAND_DEFAULT,
    MCBSP_XCR_XFIG_NO,
    MCBSP_XCR_XDATDLY_1BIT,
    MCBSP_XCR_XFRLEN1_DEFAULT, 
    MCBSP_XCR_XWDLEN1_8BIT,
    MCBSP_XCR_XWDREVRS_DISABLE
  ),
  MCBSP_SRGR_RMK(
    MCBSP_SRGR_GSYNC_FREE,
    MCBSP_SRGR_CLKSP_RISING,
    MCBSP_SRGR_CLKSM_INTERNAL,
    MCBSP_SRGR_FSGM_DXR2XSR,
    MCBSP_SRGR_FPER_DEFAULT,
    MCBSP_SRGR_FWID_DEFAULT,
    MCBSP_SRGR_CLKGDV_OF(4)
  ),
  MCBSP_MCR_DEFAULT,
  MCBSP_RCERE0_DEFAULT,
  MCBSP_RCERE1_DEFAULT,
  MCBSP_RCERE2_DEFAULT,
  MCBSP_RCERE3_DEFAULT,
  MCBSP_XCERE0_DEFAULT,
  MCBSP_XCERE1_DEFAULT,
  MCBSP_XCERE2_DEFAULT,
  MCBSP_XCERE3_DEFAULT,
  MCBSP_PCR_RMK(
    MCBSP_PCR_XIOEN_SP,
    MCBSP_PCR_RIOEN_SP,
    MCBSP_PCR_FSXM_INTERNAL,
    MCBSP_PCR_FSRM_EXTERNAL,
    MCBSP_PCR_CLKXM_OUTPUT,
    MCBSP_PCR_CLKRM_INPUT,
    MCBSP_PCR_CLKSSTAT_0,
    MCBSP_PCR_DXSTAT_0,
    MCBSP_PCR_FSXP_ACTIVELOW,
    MCBSP_PCR_FSRP_ACTIVELOW,
    MCBSP_PCR_CLKXP_FALLING,
    MCBSP_PCR_CLKRP_DEFAULT
  )
}; 

static MCBSP_Config myNormalConfig = {
  MCBSP_SPCR_RMK(
    MCBSP_SPCR_FREE_DEFAULT	,
    MCBSP_SPCR_SOFT_DEFAULT,
    MCBSP_SPCR_FRST_DEFAULT,
    MCBSP_SPCR_GRST_DEFAULT,
    MCBSP_SPCR_XINTM_DEFAULT,
    MCBSP_SPCR_XSYNCERR_DEFAULT,
    MCBSP_SPCR_XRST_DEFAULT,
    MCBSP_SPCR_DLB_DEFAULT,
    MCBSP_SPCR_RJUST_DEFAULT,
    MCBSP_SPCR_CLKSTP_DELAY,
    MCBSP_SPCR_DXENA_DEFAULT,
    MCBSP_SPCR_RINTM_RRDY,
    MCBSP_SPCR_RSYNCERR_DEFAULT,
    MCBSP_SPCR_RRST_DEFAULT
  ),
  MCBSP_RCR_RMK(
    MCBSP_RCR_RPHASE_SINGLE,
    MCBSP_RCR_RFRLEN2_DEFAULT,
    MCBSP_RCR_RWDLEN2_DEFAULT,
    MCBSP_RCR_RCOMPAND_DEFAULT,
    MCBSP_RCR_RFIG_NO,
    MCBSP_RCR_RDATDLY_1BIT,
    MCBSP_RCR_RFRLEN1_DEFAULT, 
    MCBSP_RCR_RWDLEN1_8BIT,
    MCBSP_RCR_RWDREVRS_DISABLE
  ),
  MCBSP_XCR_RMK(
    MCBSP_XCR_XPHASE_SINGLE,
    MCBSP_XCR_XFRLEN2_DEFAULT,
    MCBSP_XCR_XWDLEN2_DEFAULT,
    MCBSP_XCR_XCOMPAND_DEFAULT,
    MCBSP_XCR_XFIG_NO,
    MCBSP_XCR_XDATDLY_1BIT,
    MCBSP_XCR_XFRLEN1_DEFAULT, 
    MCBSP_XCR_XWDLEN1_8BIT,
    MCBSP_XCR_XWDREVRS_DISABLE
  ),
  MCBSP_SRGR_RMK(
    MCBSP_SRGR_GSYNC_FREE,
    MCBSP_SRGR_CLKSP_RISING,
    MCBSP_SRGR_CLKSM_INTERNAL,
    MCBSP_SRGR_FSGM_DXR2XSR,
    MCBSP_SRGR_FPER_DEFAULT,
    MCBSP_SRGR_FWID_DEFAULT,
    MCBSP_SRGR_CLKGDV_OF(3)
  ),
  MCBSP_MCR_DEFAULT,
  MCBSP_RCERE0_DEFAULT,
  MCBSP_RCERE1_DEFAULT,
  MCBSP_RCERE2_DEFAULT,
  MCBSP_RCERE3_DEFAULT,
  MCBSP_XCERE0_DEFAULT,
  MCBSP_XCERE1_DEFAULT,
  MCBSP_XCERE2_DEFAULT,
  MCBSP_XCERE3_DEFAULT,
  MCBSP_PCR_RMK(
    MCBSP_PCR_XIOEN_SP,
    MCBSP_PCR_RIOEN_SP,
    MCBSP_PCR_FSXM_INTERNAL,
    MCBSP_PCR_FSRM_EXTERNAL,
    MCBSP_PCR_CLKXM_OUTPUT,
    MCBSP_PCR_CLKRM_INPUT,
    MCBSP_PCR_CLKSSTAT_0,
    MCBSP_PCR_DXSTAT_0,
    MCBSP_PCR_FSXP_ACTIVELOW,
    MCBSP_PCR_FSRP_ACTIVELOW,
    MCBSP_PCR_CLKXP_RISING,
    MCBSP_PCR_CLKRP_DEFAULT
  )
};



unsigned char SPI_TransferByte(unsigned char value)       //数据传入后等待返回的数据
{ 
	unsigned int  incoming=0;	
	while (!MCBSP_xrdy(myMcbsp));                      
    MCBSP_write(myMcbsp,value);                      
	
	while(!MCBSP_rrdy(myMcbsp));
	incoming = MCBSP_read(myMcbsp);   //得到数据
	return(incoming);
}



static Bool rcvr_datablock(
	unsigned char* buff,
	unsigned int btr
)
{
	unsigned char token;
	unsigned int token_wait = 10000;
	do{
		token = SPI_TransferByte(0xff);
	}while((token !=0xFE)&&token_wait--);
	if(!token_wait) return FALSE;
	
	do{
		*buff++=SPI_TransferByte(0xff);
	}while(--btr);
	SPI_TransferByte(0xff);  //Discard CRC
	SPI_TransferByte(0xff);  //
	return TRUE;
}

static Bool xmit_datablock(
	unsigned char* buff,
	unsigned char token
)
{
	unsigned char resp;
	unsigned short wc;
	unsigned int resp_wait=1000000;
	wc = 512;
	SPI_TransferByte(token);
	if(token!=0xFD)
	{
		do{
			SPI_TransferByte(*buff++);
		}while(--wc);
		SPI_TransferByte(0xff);//CRC
		SPI_TransferByte(0xff);
		do{
			resp = SPI_TransferByte(0xff);
		}while((--resp_wait)&&((resp&0x1F)!=0x05));
		if(!resp_wait)
			return FALSE;
	}
	else
	{
		SPI_TransferByte(0xff);
		SPI_TransferByte(0xff);
	}
	return TRUE;
}




unsigned char Write_Command_MMC(unsigned char cmd, unsigned int address)
{
	unsigned int retry=100;
	unsigned char tmp;
	unsigned char crcc = 0xFF;
	if(cmd&0x80)
	{
		cmd &=0x7F;
		tmp = Write_Command_MMC(CMD55,0);
		if(tmp>1)
			return tmp;
	}
	SPI_TransferByte(0xff);
	
	tmp = SPI_TransferByte(cmd);
	tmp = SPI_TransferByte(address>>24);
	tmp = SPI_TransferByte(address>>16);
	tmp = SPI_TransferByte(address>>8);
	tmp = SPI_TransferByte(address);
	if(cmd == CMD0) crcc = 0x95;
	if(cmd == CMD8) crcc = 0x87;
	tmp = SPI_TransferByte(crcc);   
	
	if(cmd == CMD12) SPI_TransferByte(0xff);
	
	do{
		tmp = SPI_TransferByte(0xFF);
	}while((tmp&0x80)&&retry--);   //  等待返回或者计时时间到达
	if(cmd == CMD17)
		crcc = 0xff;
	if((cmd == CMD25)||(cmd == CMD24))
		crcc = 0xff;
	return(tmp);
}