wavelet_lifting_pld.map.summary

来自「小波提升Verilog代码」· SUMMARY 代码 · 共 10 行

Analysis & Synthesis Status : Successful - Tue Feb 12 13:21:03 2008
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Full Version
Revision Name : wavelet_lifting_pld
Top-level Entity Name : wavelet_lifting_pld
Family : FLEX10KE
Total logic elements : 418
Total pins : 98
Total memory bits : 0
Total PLLs : 0