fet140_ta10.c

msp430f14x 系列片内外设的实例代码

//******************************************************************************
//  MSP-FET430P140 Demo - Timer_A Toggle P1.1 With TA0 upmode, DCO SMCLK  
//
//  Description; Toggle P1.1 using hardware TA0 output. Timer_A is configured
//  in upmode with CCR0 defining period, TA0 also output on P1.1. In this 
//  example, CCR0 is loaded with 500-1 and TA0 will toggle P1.1 at TACLK/500.
//  Thus the ouput frequency on P1.1 will be the TACLK/1000.  No CPU or software
//  resources required.
//  ACLK = n/a, SMCLK = MCLK = TACLK = default DCO ~ 800kHz
//  As coded with TACLK = SMCLK, P1.1 output frequency ~ 800000/1000
//   
//           MSP430F149
//         -----------------
//     /|\|              XIN|-  
//      | |                 |
//      --|RST          XOUT|-
//        |                 |
//        |             P1.1|-->TA0 SMCLK/1000
//
//  M.Buccini
//  Texas Instruments, Inc
//  August 2003
//  Built with IAR Embedded Workbench Version: 1.26B
//  January 2004
//  Updated for IAR Embedded Workbench Version: 2.21B
//******************************************************************************

#include <msp430x14x.h>

void main(void)
{ 
  WDTCTL = WDTPW + WDTHOLD;             // Stop WDT
  P1DIR |= 0x02;                        // P1.1 output
  P1SEL |= 0x02;                        // P1.1 option select
  CCTL0 = OUTMOD_4;                     // CCR0 toggle mode
  CCR0 = 500-1;
  TACTL = TASSEL_2 + MC_1;              // SMCLK, upmode
 
  _BIS_SR(CPUOFF);                      // CPU off
}