sim_rtl1.log

Coms sensor 的USB 通信程序

file: ..//hdl/vcl/vcl_yuv.v
file: ..//hdl/vcl/vclout.v
file: ..//hdl/vcl/yuv420.v
file: ..//hdl/vcl/yuv422.v
file: ..//hdl/vcl/gamma.v
file: ..//hdl/vcl/detect_lowlight.v
file: ..//hdl/vcl/vcl_timing.v
file: ..//hdl/vcl/bt656_det.v
file: ..//hdl/vcl/spare_vcl.v
file: ..//hdl/vcl/ram48x24.v
file: ..//hdl/usb_bulk/bulk_ctrl.v
file: ..//hdl/usb_bulk/flash_cop.v
file: ..//hdl/usb_bulk/mp2_cop.v
file: ..//hdl/usb_bulk/mp2_du.v
file: ..//hdl/usb_bulk/sync_mp2.v
file: ..//hdl/usb_bulk/sync_dl.v
file: ..//hdl/usb_bulk/sync_ul.v
file: ./test/app_in_fifo.v
file: ./test/app_out_fifo.v
file: ..//hdl/i2c/i2c.v
file: ..//hdl/i2c/cntl_i2c.v
file: ..//hdl/i2c/i2c_lynx2a.v
file: ..//hdl/i2c/sdcrc.v
file: ..//hdl/spi/spiif.v
file: ..//hdl/spi/spi_top.v
file: ..//hdl/spi/spiif_8bit.v
file: ..//hdl/nf_ctl/nfctl.v
`define		IDLE			5'h00

       		    			     |
ncvlog: *W,MACRDF (..//hdl/nf_ctl/nfctl.v,81|21): text macro 'IDLE' redefined - replaced with new definition.
file: ..//hdl/nf_ctl/nfdmactl.v
file: ..//hdl/regfile/regfile.v
file: ..//lib/faraday/fs90a_b.lib
ncvlog: *W,LIBNOU: Library "..//lib/faraday/fs90a_bs.lib" given but not used.
	Total errors/warnings found outside modules and primitives:
		errors: 0, warnings: 1
		Caching library 'worklib' ....... Done
		Caching library 'fs90a_b' ....... Done
	Elaborating the design hierarchy:
    VEO_DW8051_BH_cpu_ram_2561_rom_addr_size13_extd_intr1_1 i_cpu ( .clk(clk), 
                                                                |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,26955|64): 1 port was not connected:
	int_rom_cs_n

    VEO_DW8051_BH_biu_rom_addr_size13_1 i_biu ( .clk(clk), .rst_n(rst_out_n), 
                                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,19373|44): 1 port was not connected:
	int_rom_cs_n

    GTECH_FD2 ale_neg_reg ( .D(n1058), .CP(N979), .CD(1'b1), .Q(ale_neg) );
                        |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2601|24): 1 port was not connected:
	QN

    GTECH_FD2 dec_md_reg ( .D(n1059), .CP(clk), .CD(rst_n), .Q(dec_md) );
                       |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2602|23): 1 port was not connected:
	QN

    GTECH_FD4 md_ld_n_reg ( .D(n1060), .CP(clk), .SD(rst_n), .Q(md_ld_n) );
                        |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2603|24): 1 port was not connected:
	QN

    GTECH_FD2 ram_16bit_access_reg ( .D(n1061), .CP(clk), .CD(rst_n), .Q(N376)
                                 |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2604|33): 1 port was not connected:
	QN

    GTECH_FD2 \bus_seq_reg[0]  ( .D(n1062), .CP(clk), .CD(rst_n), .Q(
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2606|29): 1 port was not connected:
	QN

    GTECH_FD2 \bus_seq_reg[1]  ( .D(n1063), .CP(clk), .CD(rst_n), .Q(
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2608|29): 1 port was not connected:
	QN

    GTECH_FD2 start_ram_seq_reg ( .D(n1064), .CP(clk), .CD(rst_n), .Q(
                              |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2610|30): 1 port was not connected:
	QN

    GTECH_FD2 ram_access_rdy_reg ( .D(n1065), .CP(clk), .CD(rst_n), .Q(
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2612|31): 1 port was not connected:
	QN

    GTECH_FD4 ale_pos_reg ( .D(n1101), .CP(clk), .SD(rst_n), .Q(ale_pos) );
                        |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,2684|24): 1 port was not connected:
	QN

    GTECH_FD2 div_res8_reg ( .D(\div_t_res[8] ), .CP(clk), .CD(1'b1), .Q(
                         |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4166|25): 1 port was not connected:
	QN

    VEO_DW8051_BH_alu_DW01_add_9_0 add_318 ( .A({1'b0, a[7], a[6], a[5], a[4], 
                                         |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4168|41): 1 port was not connected:
	CO

    VEO_DW8051_BH_alu_DW01_add_5_1 add_393 ( .A({1'b0, \asid_a[3] , \asid_a[2] , 
                                         |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4172|41): 1 port was not connected:
	CO

    VEO_DW8051_BH_alu_DW01_add_5_0 add_393_2 ( .A({N112, N111, N110, N109, N108}), 
                                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4176|43): 1 port was not connected:
	CO

    VEO_DW8051_BH_alu_DW01_cmp2_8_0 lt_413 ( .A(a), .B(b), .LEQ(1'b0), .TC(1'b0), 
                                         |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4180|41): 1 port was not connected:
	GE_GT

    VEO_DW8051_BH_updn_ctr_width16_1 i_pc ( .data({\result[15] , \result[14] , 
                                        |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,19415|40): 1 port was not connected:
	tercnt

    GTECH_FD2 \ctr_state_reg[0]  ( .D(n558), .CP(clk), .CD(reset), .Q(count[0]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4856|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[1]  ( .D(n559), .CP(clk), .CD(reset), .Q(count[1]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4858|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[2]  ( .D(n560), .CP(clk), .CD(reset), .Q(count[2]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4860|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[3]  ( .D(n561), .CP(clk), .CD(reset), .Q(count[3]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4862|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[4]  ( .D(n562), .CP(clk), .CD(reset), .Q(count[4]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4864|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[5]  ( .D(n563), .CP(clk), .CD(reset), .Q(count[5]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4866|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[6]  ( .D(n564), .CP(clk), .CD(reset), .Q(count[6]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4868|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[7]  ( .D(n565), .CP(clk), .CD(reset), .Q(count[7]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4870|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[8]  ( .D(n566), .CP(clk), .CD(reset), .Q(count[8]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4872|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[9]  ( .D(n567), .CP(clk), .CD(reset), .Q(count[9]
                               |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4874|31): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[10]  ( .D(n568), .CP(clk), .CD(reset), .Q(count
                                |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4876|32): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[11]  ( .D(n569), .CP(clk), .CD(reset), .Q(count
                                |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4878|32): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[12]  ( .D(n570), .CP(clk), .CD(reset), .Q(count
                                |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4880|32): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[13]  ( .D(n571), .CP(clk), .CD(reset), .Q(count
                                |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4882|32): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[14]  ( .D(n572), .CP(clk), .CD(reset), .Q(count
                                |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4884|32): 1 port was not connected:
	QN

    GTECH_FD2 \ctr_state_reg[15]  ( .D(n573), .CP(clk), .CD(reset), .Q(count
                                |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,4886|32): 1 port was not connected:
	QN

    GTECH_FD4 \i_ckcon_reg[0]  ( .D(n1366), .CP(clk), .SD(rst_n), .Q(ckcon[0])
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7886|29): 1 port was not connected:
	QN

    GTECH_FD2 \i_ckcon_reg[1]  ( .D(n1367), .CP(clk), .CD(rst_n), .Q(ckcon[1])
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7888|29): 1 port was not connected:
	QN

    GTECH_FD2 \i_ckcon_reg[2]  ( .D(n1368), .CP(clk), .CD(rst_n), .Q(ckcon[2])
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7890|29): 1 port was not connected:
	QN

    GTECH_FD2 \i_ckcon_reg[3]  ( .D(n1369), .CP(clk), .CD(rst_n), .Q(ckcon[3])
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7892|29): 1 port was not connected:
	QN

    GTECH_FD2 \i_ckcon_reg[4]  ( .D(n1370), .CP(clk), .CD(rst_n), .Q(ckcon[4])
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7894|29): 1 port was not connected:
	QN

    GTECH_FD2 \i_ckcon_reg[5]  ( .D(n1371), .CP(clk), .CD(rst_n), .Q(ckcon[5])
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7896|29): 1 port was not connected:
	QN

    GTECH_FD2 \i_ckcon_reg[6]  ( .D(n1372), .CP(clk), .CD(rst_n), .Q(ckcon[6])
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7898|29): 1 port was not connected:
	QN

    GTECH_FD2 \i_ckcon_reg[7]  ( .D(n1373), .CP(clk), .CD(rst_n), .Q(ckcon[7])
                             |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7900|29): 1 port was not connected:
	QN

    GTECH_FD2 \i_pcon_reg[0]  ( .D(n1374), .CP(clk), .CD(rst_n), .Q(pcon[0])
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7902|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_pcon_reg[1]  ( .D(n1375), .CP(clk), .CD(rst_n), .Q(pcon[1])
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7904|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_pcon_reg[2]  ( .D(n1376), .CP(clk), .CD(rst_n), .Q(pcon[2])
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7906|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_pcon_reg[3]  ( .D(n1377), .CP(clk), .CD(rst_n), .Q(pcon[3])
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7908|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_pcon_reg[4]  ( .D(n1378), .CP(clk), .CD(rst_n), .Q(pcon[6])
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7910|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_pcon_reg[5]  ( .D(n1379), .CP(clk), .CD(rst_n), .Q(pcon[7])
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7912|28): 1 port was not connected:
	QN

    GTECH_FD2 i_dps_reg ( .D(n1380), .CP(clk), .CD(rst_n), .Q(dps[0]) );
                      |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7914|22): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[0]  ( .D(n1381), .CP(clk), .CD(rst_n), .Q(\i_dp1[0] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7915|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[1]  ( .D(n1382), .CP(clk), .CD(rst_n), .Q(\i_dp1[1] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7917|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[2]  ( .D(n1383), .CP(clk), .CD(rst_n), .Q(\i_dp1[2] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7919|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[3]  ( .D(n1384), .CP(clk), .CD(rst_n), .Q(\i_dp1[3] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7921|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[4]  ( .D(n1385), .CP(clk), .CD(rst_n), .Q(\i_dp1[4] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7923|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[5]  ( .D(n1386), .CP(clk), .CD(rst_n), .Q(\i_dp1[5] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7925|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[6]  ( .D(n1387), .CP(clk), .CD(rst_n), .Q(\i_dp1[6] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7927|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[7]  ( .D(n1388), .CP(clk), .CD(rst_n), .Q(\i_dp1[7] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7929|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[8]  ( .D(n1389), .CP(clk), .CD(rst_n), .Q(\i_dp1[8] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7931|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[9]  ( .D(n1390), .CP(clk), .CD(rst_n), .Q(\i_dp1[9] )
                           |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7933|27): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[10]  ( .D(n1391), .CP(clk), .CD(rst_n), .Q(
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7935|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[11]  ( .D(n1392), .CP(clk), .CD(rst_n), .Q(
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7937|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[12]  ( .D(n1393), .CP(clk), .CD(rst_n), .Q(
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7939|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[13]  ( .D(n1394), .CP(clk), .CD(rst_n), .Q(
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7941|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[14]  ( .D(n1395), .CP(clk), .CD(rst_n), .Q(
                            |
ncelab: *W,CUVWSP (../mdl/mcu/mcu.v,7943|28): 1 port was not connected:
	QN

    GTECH_FD2 \i_dp1_reg[15]  ( .D(n1396), .CP(clk), .CD(rst_n), .Q(