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📄 initializes.c

📁 全国电子设计大赛:智能电动车的设计.实现功能:以AT89C52单片机为核心
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						//          011: The most significant 7-bits of the DAC1 Data Word is in DAC1H[6:0], 
						//               while the least significant 5-bits are in DAC1L[7:3].
						//          1xx: The most significant 8-bits of the DAC1 Data Word is in DAC1H[7:0], 
						//               while the least significant 4-bits are in DAC1L[7:4].

//-------------------------------------------------------------------------------------------------	
// Init Enable
//-------------------------------------------------------------------------------------------------
    EA = 1;             // Global interrupt enable

//	ET2 = 1;            // Enable Timer 2 Interrupt.     ( ) 
//	ES0 = 1;            // Enable UART0 Interrupt.       ( ) 
	ET1 = 1;            // Enable Timer 1 Interrupt.     ( ) 
//	EX1 = 1;            // Enable External Interrupt 1.  ( ) 
//	ET0 = 1;            // Enable Timer 0 Interrupt.     ( ) 
//	EX0 = 1;            // Enable External Interrupt 0.  ( ) 
    
//	EIE1 |= 0x80;       // ECP1R: Enable Comparator1 (CP1) Rising Edge Interrupt.
//	EIE1 |= 0x40;       // ECP1F: Enable Comparator1 (CP1) Falling Edge Interrupt.
//	EIE1 |= 0x20;       // ECP0R: Enable Comparator0 (CP0) Rising Edge Interrupt.
//	EIE1 |= 0x10;       // ECP0F: Enable Comparator0 (CP0) Falling Edge Interrupt.
//	EIE1 |= 0x08;       // EPCA0: Enable Programmable Counter Array (PCA0) Interrupt.
//	EIE1 |= 0x04;       // EWADC0:Enable Window Comparison ADC0 Interrupt.
//	EIE1 |= 0x02;       // ESMB0: Enable System Management Bus (SMBus0) Interrupt.
//	EIE1 |= 0x01;       // ESPI0: Enable Serial Peripheral Interface (SPI0) Interrupt.

//	EIE2 |= 0x80;       // EXVLD: Enable External Clock Source Valid (XTLVLD) Interrupt.
//	EIE2 |= 0x40;       // ES1:   Enable UART1 Interrupt.
//	EIE2 |= 0x20;       // EX7:   Enable External Interrupt 7.
	EIE2 |= 0x10;       // EX6:   Enable External Interrupt 6.
//	EIE2 |= 0x08;       // EADC1: Enable ADC1 End Of Conversion Interrupt.
//	EIE2 |= 0x04;       // ET4:   Enable Timer 4 Interrupt
//	EIE2 |= 0x02;       // EADC0: Enable ADC0 End of Conversion Interrupt.
//	EIE2 |= 0x01;       // ET3:   Enable Timer 3 Interrupt.

//-------------------------------------------------------------------------------------------------	
// Timer Init
//-------------------------------------------------------------------------------------------------	
// Clock Control Register
    CKCON  = 0x00;      // 0: Timer uses the system clock divided by 12.
                        // 1: Timer uses the system clock.
                        //-----------------------------------------------------
	                    // Bit6:    T4M: Timer 4 Clock Select.
	                    // Bit5:    T2M: Timer 2 Clock Select.
						// Bit4:    T1M: Timer 1 Clock Select.

						// Bit3:    T0M: Timer 0 Clock Select.
						// Bits2-0: Reserved. Read = 000b, Must Write = 000.

						
//------------------------------------------------------------------------------------
// Timer0_Init
//------------------------------------------------------------------------------------
// Configure Timer0 to auto-reload and generate an interrupt at interval
// using SYSCLK/12 as its time base.
// (For PCA)
    TMOD  |= 0x02;      // TMOD: Timer 0, Mode 2, 8-bit Reload.
	                    // 
	                    // Bit3   : GATE0    : Timer 0 Gate Control.
						// Bit2   : C/T0     : Counter/Timer 0 Select.
						// Bits1-0: T0M1-T0M0: Timer 0 Mode Select.
	TH0    = 100;

//	CKCON |= 0x08;      // (CKCON.3) Timer0 uses SYSCLK as time base

	TR0    = 1;         // Start Timer0

//------------------------------------------------------------------------------------
// Timer1_Init 
//------------------------------------------------------------------------------------
// Configure Timer1 to auto-reload and generate an interrupt at interval
// using SYSCLK/12 as its time base.
// ( For Car )
    TMOD  |= 0x60;      // TMOD: Counter 1, Mode 2, 8-bit Reload
	                    // 
	                    // Bit7   : GATE1    : Timer 1 Gate Control.
						// Bit6   : C/T1     : Counter/Timer 1 Select.
						// Bits5-4: T1M1-T1M0: Timer 1 Mode Select.
	TH1    = 255;       // 
	TL1    = 255; 

	PT1    = 1;         // Prior 

	TR1    = 1;         // Start Timer1


//------------------------------------------------------------------------------------
// Timer2_Init
//------------------------------------------------------------------------------------
// Configure Timer2 to auto-reload and generate an interrupt at interval
// using SYSCLK/12 as its time base.
// ( For UART0 )
    T2CON  = 0x30;        // Stop Timer2; Clear TF2; Baud rate generator for UART0 
	                      // 
                          // Bit7: TF2:   Timer 2 Overflow Flag.
						  // Bit6: EXF2:  Timer 2 External Flag.
						  // Bit5: RCLK0: Receive Clock Flag for UART0.
						  // Bit4: TCLK0: Transmit Clock Flag for UART0.
						  // Bit3: EXEN2: Timer 2 External Enable.
						  // Bit2: TR2:   Timer 2 Run Control.
						  // Bit1: C/T2:  Counter/Timer Select.
						  // Bit0: CP/RL2:Capture/Reload Select.
    RCAP2  = 0x0000;      // Init reload values , 65.536 ms 
	T2     = 0x0000;      // set to reload immediately

//------------------------------------------------------------------------------------
// Timer4_Init
//------------------------------------------------------------------------------------
// Configure Timer4 to Baud rate generator for UART1 
// Using SYSCLK/12 as its time base.
// ( For UART1 )
    T4CON  = 0x30;        // Stop Timer4; Clear TF4; Baud rate generator for UART1 
	                      // 
                          // Bit7: TF4:   Timer 4 Overflow Flag.
						  // Bit6: EXF4:  Timer 4 External Flag.
						  // Bit5: RCLK1: Receive Clock Flag for UART1.
						  // Bit4: TCLK1: Transmit Clock Flag for UART1.
						  // Bit3: EXEN4: Timer 4 External Enable.
						  // Bit2: TR4:   Timer 4 Run Control.
						  // Bit1: C/T4:  Counter/Timer Select.
						  // Bit0: CP/RL4:Capture/Reload Select.
    RCAP4  = 0x0000;      // Init reload values , 65.536 ms 
	T4     = 0x0000;      // set to reload immediately

//-------------------------------------------------------------------------------------------------	
// PCA Init 
//-------------------------------------------------------------------------------------------------
    PCA0MD  |= 0x04;    // Timebase : Timer 0 overflow, Idle Mode.
	                    // Bit 7:   CIDL: PCA0 Counter/Timer Idle Control.
	                    //           0: PCA0 continues to function normally while the system controller is in Idle Mode.
                        //           1: PCA0 operation is suspended while the system controller is in Idle Mode.
						// Bits3-1: CPS2-CPS0: PCA0 Counter/Timer Pulse Select.
						//           000: System clock divided by 12
						//           001: System clock divided by 4
						//           010: Timer 0 overflow
						//           011: High-to-low transitions on ECI
						//           100: System clock
						//           101: External clock divided by 8
						// Bit 0:   ECF: PCA Counter/Timer Overflow Interrupt Enable.
	PCA0CN  |= 0x40;    // PCA0 Counter/Timer Run 
	                    // Bit 7:   CF: PCA0 Counter/Timer Overflow Flag.
	                    // Bit 6:   CR: PCA0 Counter/Timer Run Control.
						// Bit 4:   CCF4: PCA0 Module 4 Capture/Compare Flag.
						// Bit 3:   CCF3: PCA0 Module 3 Capture/Compare Flag.
						// Bit 2:   CCF2: PCA0 Module 2 Capture/Compare Flag.
						// Bit 1:   CCF1: PCA0 Module 1 Capture/Compare Flag.
						// Bit 0:   CCF0: PCA0 Module 0 Capture/Compare Flag.
//	PCA0CPMn            //
	                    // Bit 7:   PWM16n: 16-bit Pulse Width Modulation Enable
						//           0: 8-bit PWM selected.
						//           1: 16-bit PWM selected.
						// Bit 6:   ECOMn: Comparator Function Enable.
						// Bit 5:   CAPPn: Capture Positive Function Enable.
						// Bit 4:   CAPNn: Capture Negative Function Enable.
						// Bit 3:   MATn: Match Function Enable.
						// Bit 2:   TOGn: Toggle Function Enable.
						// Bit 1:   PWMn: Pulse Width Modulation Mode Enable.
						// Bit 0:   ECCFn: Capture/Compare Flag Interrupt Enable.

}



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