📄 bulkloop.lst
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C51 COMPILER V7.50 BULKLOOP 11/01/2006 21:08:50 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE BULKLOOP
OBJECT MODULE PLACED IN bulkloop.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE bulkloop.c INCDIR(d:\cypress\usb\target\inc) DEBUG OBJECTEXTEND
line level source
1 #pragma NOIV // Do not generate interrupt vectors
2 //-----------------------------------------------------------------------------
3 // File: bulkloop.c
4 // Contents: Hooks required to implement USB peripheral function.
5 //
6 // Copyright (c) 2000 Cypress Semiconductor All rights reserved
7 //-----------------------------------------------------------------------------
8 #include "fx2.h"
9 #include "fx2regs.h"
10 #include "fx2sdly.h" // SYNCDELAY macro
11
12 extern BOOL GotSUD; // Received setup data flag
13 extern BOOL Sleep;
14 extern BOOL Rwuen;
15 extern BOOL Selfpwr;
16
17 BYTE Configuration; // Current configuration
18 BYTE AlternateSetting; // Alternate settings
19
20 #define VR_NAKALL_ON 0xD0
21 #define VR_NAKALL_OFF 0xD1
22
23 //-----------------------------------------------------------------------------
24 // Task Dispatcher hooks
25 // The following hooks are called by the task dispatcher.
26 //-----------------------------------------------------------------------------
27
28 void TD_Init(void) // Called once at startup
29 {
30 1 // set the CPU clock to 48MHz
31 1 CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1);
32 1 IFCONFIG |= 0x0B;//异步，从FIFO模式.
33 1 PORTACFG |= 0x00;//选择SLCSA功能脚。
34 1 FIFOPINPOLAR = 0x00; // set all slave FIFO interface pins as active low PKTEND OR SLOE SLWR LOW AVTIVE
35 1 SYNCDELAY;
36 1 REVCTL = 0x03; // enable the external master
37 1 SYNCDELAY;
38 1 //reset the fifos
39 1 FIFORESET = 0x80;
40 1 SYNCDELAY;
41 1 FIFORESET = 0x02;
42 1 SYNCDELAY;
43 1 FIFORESET = 0x04;
44 1 SYNCDELAY;
45 1 FIFORESET = 0x06;
46 1 SYNCDELAY;
47 1 FIFORESET = 0x08;
48 1 SYNCDELAY;
49 1 FIFORESET = 0x00;
50 1 SYNCDELAY;
51 1
52 1 //fix the slave fifo flags, only flagb and flagc
53 1 //PINFLAGSAB = 0x89; //F,FLAGB IS THE FIFO2 EMPTY FLAG,LAGA IS THE FIFO4 EMPTY FLAG
54 1 //SYNCDELAY;
55 1 PINFLAGSCD = 0x0E; //FLAGC IS THE FIFO6 FULL FLAG
C51 COMPILER V7.50 BULKLOOP 11/01/2006 21:08:50 PAGE 2
56 1 SYNCDELAY;
57 1 // config the endpoints direction
58 1 EP1OUTCFG = 0xA0;//enable and bulk type
59 1 EP1INCFG = 0xA0;
60 1 SYNCDELAY; // see TRM section 15.14
61 1 EP2CFG = 0xA2;
62 1 SYNCDELAY;
63 1 EP4CFG = 0xA2;
64 1 SYNCDELAY;
65 1 EP6CFG = 0xE0;//enable IN bulk 512 4x buffer
66 1 SYNCDELAY;
67 1 //config the endpoint6
68 1 EP6FIFOCFG = 0x0C;//EP6 IS AUTOOUT=0 AUTOIN =1 ZEROLEN=1 WORDIDE=0 配置EP6自动方式8位总
69 1 SYNCDELAY;
70 1
71 1 //-------------------------
72 1 INPKTEND = 0x06;
73 1 SYNCDELAY;
74 1 INPKTEND = 0x06;
75 1 SYNCDELAY;
76 1 INPKTEND = 0x06;
77 1 SYNCDELAY;
78 1 INPKTEND = 0x06;
79 1 SYNCDELAY;
80 1 //----------------------------------------
81 1 EP6AUTOINLENH = 0x02; //set the packet size 512
82 1 SYNCDELAY;
83 1 EP6AUTOINLENL = 0x00;
84 1 SYNCDELAY;
85 1 // arm EP2OUT by writing byte count w/skip.
86 1 // SYNCDELAY;
87 1 // since the defaults are double buffered we must write dummy byte counts twice
88 1 //SYNCDELAY;
89 1 EP2BCL = 0x80; // arm EP2OUT by writing byte count w/skip.
90 1 SYNCDELAY;
91 1 EP2BCL = 0x80;
92 1 SYNCDELAY;
93 1 EP4BCL = 0x80; // arm EP4OUT by writing byte count w/skip.
94 1 SYNCDELAY;
95 1 EP4BCL = 0x80;
96 1 }
97
98
99 void TD_Poll(void) // Called repeatedly while the device is idle
100 {
101 1
102 1 }
103
104 BOOL TD_Suspend(void) // Called before the device goes into suspend mode
105 {
106 1 return(TRUE);
107 1 }
108
109 BOOL TD_Resume(void) // Called after the device resumes
110 {
111 1 return(TRUE);
112 1 }
113
114 //-----------------------------------------------------------------------------
115 // Device Request hooks
116 // The following hooks are called by the end point 0 device request parser.
117 //-----------------------------------------------------------------------------
C51 COMPILER V7.50 BULKLOOP 11/01/2006 21:08:50 PAGE 3
118
119 BOOL DR_GetDescriptor(void)
120 {
121 1 return(TRUE);
122 1 }
123
124 BOOL DR_SetConfiguration(void) // Called when a Set Configuration command is received
125 {
126 1 Configuration = SETUPDAT[2];
127 1 return(TRUE); // Handled by user code
128 1 }
129
130 BOOL DR_GetConfiguration(void) // Called when a Get Configuration command is received
131 {
132 1 EP0BUF[0] = Configuration;
133 1 EP0BCH = 0;
134 1 EP0BCL = 1;
135 1 return(TRUE); // Handled by user code
136 1 }
137
138 BOOL DR_SetInterface(void) // Called when a Set Interface command is received
139 {
140 1 AlternateSetting = SETUPDAT[2];
141 1 return(TRUE); // Handled by user code
142 1 }
143
144 BOOL DR_GetInterface(void) // Called when a Set Interface command is received
145 {
146 1 EP0BUF[0] = AlternateSetting;
147 1 EP0BCH = 0;
148 1 EP0BCL = 1;
149 1 return(TRUE); // Handled by user code
150 1 }
151
152 BOOL DR_GetStatus(void)
153 {
154 1 return(TRUE);
155 1 }
156
157 BOOL DR_ClearFeature(void)
158 {
159 1 return(TRUE);
160 1 }
161
162 BOOL DR_SetFeature(void)
163 {
164 1 return(TRUE);
165 1 }
166
167 BOOL DR_VendorCmnd(void)
168 {
169 1 BYTE tmp;
170 1
171 1 switch (SETUPDAT[1])
172 1 {
173 2 case VR_NAKALL_ON:
174 2 tmp = FIFORESET;
175 2 tmp |= bmNAKALL;
176 2 SYNCDELAY;
177 2 FIFORESET = tmp;
178 2 break;
179 2 case VR_NAKALL_OFF:
C51 COMPILER V7.50 BULKLOOP 11/01/2006 21:08:50 PAGE 4
180 2 tmp = FIFORESET;
181 2 tmp &= ~bmNAKALL;
182 2 SYNCDELAY;
183 2 FIFORESET = tmp;
184 2 break;
185 2 default:
186 2 return(TRUE);
187 2 }
188 1
189 1 return(FALSE);
190 1 }
191
192 //-----------------------------------------------------------------------------
193 // USB Interrupt Handlers
194 // The following functions are called by the USB interrupt jump table.
195 //-----------------------------------------------------------------------------
196
197 // Setup Data Available Interrupt Handler
198 void ISR_Sudav(void) interrupt 0
199 {
200 1 GotSUD = TRUE; // Set flag
201 1 EZUSB_IRQ_CLEAR();
202 1 USBIRQ = bmSUDAV; // Clear SUDAV IRQ
203 1 }
204
205 // Setup Token Interrupt Handler
206 void ISR_Sutok(void) interrupt 0
207 {
208 1 EZUSB_IRQ_CLEAR();
209 1 USBIRQ = bmSUTOK; // Clear SUTOK IRQ
210 1 }
211
212 void ISR_Sof(void) interrupt 0
213 {
214 1 EZUSB_IRQ_CLEAR();
215 1 USBIRQ = bmSOF; // Clear SOF IRQ
216 1 }
217
218 void ISR_Ures(void) interrupt 0
219 {
220 1 // whenever we get a USB reset, we should revert to full speed mode
221 1 pConfigDscr = pFullSpeedConfigDscr;
222 1 ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
223 1 pOtherConfigDscr = pHighSpeedConfigDscr;
224 1 ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
225 1
226 1 EZUSB_IRQ_CLEAR();
227 1 USBIRQ = bmURES; // Clear URES IRQ
228 1 }
229
230 void ISR_Susp(void) interrupt 0
231 {
232 1 Sleep = TRUE;
233 1 EZUSB_IRQ_CLEAR();
234 1 USBIRQ = bmSUSP;
235 1 }
236
237 void ISR_Highspeed(void) interrupt 0
238 {
239 1 if (EZUSB_HIGHSPEED())
240 1 {
241 2 pConfigDscr = pHighSpeedConfigDscr;
C51 COMPILER V7.50 BULKLOOP 11/01/2006 21:08:50 PAGE 5
242 2 ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
243 2 pOtherConfigDscr = pFullSpeedConfigDscr;
244 2 ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
245 2
246 2 EP6AUTOINLENH = 0x02; //set the packet size
247 2 SYNCDELAY;
248 2 EP6AUTOINLENL = 0x00;
249 2 SYNCDELAY;
250 2 }
251 1
252 1 EZUSB_IRQ_CLEAR();
253 1 USBIRQ = bmHSGRANT;
254 1 }
255 void ISR_Ep0ack(void) interrupt 0
256 {
257 1 }
258 void ISR_Stub(void) interrupt 0
259 {
260 1 }
261 void ISR_Ep0in(void) interrupt 0
262 {
263 1 }
264 void ISR_Ep0out(void) interrupt 0
265 {
266 1 }
267 void ISR_Ep1in(void) interrupt 0
268 {
269 1 }
270 void ISR_Ep1out(void) interrupt 0
271 {
272 1 }
273 void ISR_Ep2inout(void) interrupt 0
274 {
275 1 }
276 void ISR_Ep4inout(void) interrupt 0
277 {
278 1 }
279 void ISR_Ep6inout(void) interrupt 0
280 {
281 1 }
282 void ISR_Ep8inout(void) interrupt 0
283 {
284 1 }
285 void ISR_Ibn(void) interrupt 0
286 {
287 1 }
288 void ISR_Ep0pingnak(void) interrupt 0
289 {
290 1 }
291 void ISR_Ep1pingnak(void) interrupt 0
292 {
293 1 }
294 void ISR_Ep2pingnak(void) interrupt 0
295 {
296 1 }
297 void ISR_Ep4pingnak(void) interrupt 0
298 {
299 1 }
300 void ISR_Ep6pingnak(void) interrupt 0
301 {
302 1 }
303 void ISR_Ep8pingnak(void) interrupt 0
C51 COMPILER V7.50 BULKLOOP 11/01/2006 21:08:50 PAGE 6
304 {
305 1 }
306 void ISR_Errorlimit(void) interrupt 0
307 {
308 1 }
309 void ISR_Ep2piderror(void) interrupt 0
310 {
311 1 }
312 void ISR_Ep4piderror(void) interrupt 0
313 {
314 1 }
315 void ISR_Ep6piderror(void) interrupt 0
316 {
317 1 }
318 void ISR_Ep8piderror(void) interrupt 0
319 {
320 1 }
321 void ISR_Ep2pflag(void) interrupt 0
322 {
323 1 }
324 void ISR_Ep4pflag(void) interrupt 0
325 {
326 1 }
327 void ISR_Ep6pflag(void) interrupt 0
328 {
329 1 }
330 void ISR_Ep8pflag(void) interrupt 0
331 {
332 1 }
333 void ISR_Ep2eflag(void) interrupt 0
334 {
335 1 }
336 void ISR_Ep4eflag(void) interrupt 0
337 {
338 1 }
339 void ISR_Ep6eflag(void) interrupt 0
340 {
341 1 }
342 void ISR_Ep8eflag(void) interrupt 0
343 {
344 1 }
345 void ISR_Ep2fflag(void) interrupt 0
346 {
347 1 }
348 void ISR_Ep4fflag(void) interrupt 0
349 {
350 1 }
351 void ISR_Ep6fflag(void) interrupt 0
352 {
353 1 }
354 void ISR_Ep8fflag(void) interrupt 0
355 {
356 1 }
357 void ISR_GpifComplete(void) interrupt 0
358 {
359 1 }
360 void ISR_GpifWaveform(void) interrupt 0
361 {
362 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
C51 COMPILER V7.50 BULKLOOP 11/01/2006 21:08:50 PAGE 7
CODE SIZE = 557 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = 2 ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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