vector.s

基于华邦W90P710 arm开发板的AC97模块测试程序

;******************************************************************************
;* 文件名		: vector.s
;* 版本			: 
;* 日期			: 
;* 概述			: 设置异常向量表
;******************************************************************************

AIC_IPER		EQU		0xFFF8210C		; Interrupt priority encoding register 
AIC_EOSCR		EQU		0xFFF82130		; End of service command register 

	IMPORT		Reset_Handler
	IMPORT  	Undefined_Handler
	IMPORT		SWI_Handler
	IMPORT		Prefetch_Handler
	IMPORT		Abort_Handler
    
	IMPORT		WDT_Handler			; Watch Dog Timer Interrupt
	IMPORT		nIRQ0_Handler		; External Interrupt 0
	IMPORT		nIRQ1_Handler		; External Interrupt 1
	IMPORT		nIRQ2_Handler		; External Interrupt 2
	IMPORT		nIRQ3_Handler		; External Interrupt 3
	IMPORT		AC97_Handler		; AC97 Interrupt
	IMPORT		LCD_Handler			; LCD Controller Interrupt
	IMPORT		RTC_Handler			; RTC Controller Interrupt
	IMPORT		UART0_Handler		; UART 0 Interrupt
	IMPORT		UART1_Handler		; UART 1 Interrupt
	IMPORT		UART2_Handler		; UART 2 Interrupt
	IMPORT		UART3_Handler		; UART 3 Interrupt
	IMPORT		TIMER0_Handler		; Timer Interrupt 0
	IMPORT		TIMER1_Handler		; Timer Interrupt 1
	IMPORT		USBH0_Handler		; USB Host Interrupt 0
	IMPORT		USBH1_Handler		; USB Host Interrupt 1
	IMPORT		EMCTX_Handler		; EMC TX Interrupt
	IMPORT		EMCRX_Handler		; EMC RX Interrupt
	IMPORT		GDMA0_Handler		; GDMA Channel Interrupt 0
	IMPORT		GDMA1_Handler		; GDMA Channel Interrupt 1
	IMPORT		SDIO_Handler		; SDIO Interrupt
	IMPORT		USBD_Handler		; USB Device Interrupt
	IMPORT		SC0_Handler			; SmartCard Interrupt 0
	IMPORT		SC1_Handler			; SmartCard Interrupt 1
	IMPORT		I2C0_Handler		; I2C Interrupt 0
	IMPORT		I2C1_Handler		; I2C Interrupt 1
	IMPORT		SSP_Handler			; SPI Interrupt
	IMPORT		PWM_Handler			; PWM Interrupt
	IMPORT		KPI_Handler			; KPI Interrupt
	IMPORT		PS2_Handler			; PS2 Interrupt
	IMPORT		IRQ45_Handler		; IRQ45 Interrupt
    
    
    AREA Vect, CODE, READONLY
        ENTRY
start       
        B		Reset_Handler
        B		Undefined_Addr 
        B		SWI_Addr
        B		Prefetch_Addr
        B		Abort_Addr
        B		.			 
        B		IRQ_Addr
        B		FIQ_Addr

        
        
Undefined_Addr
        STMFD	SP!,{R0-R12,lr}
		BL		Undefined_Handler
		LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR, #0 

SWI_Addr
        STMFD	SP!,{R0-R12,lr}
		BL		SWI_Handler
		LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR, #0

Prefetch_Addr
        STMFD	SP!,{R0-R12,lr}
		BL		Prefetch_Handler
		LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR, #4

Abort_Addr
        STMFD	SP!,{R0-R12,lr}
		BL		Abort_Handler
		LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR, #8

IRQ_Addr
        STMFD	SP!,{R0-R12,lr}        
        LDR		R0,=ISR_BASE  
        LDR		R1,=AIC_IPER
        LDR		R2,[R1]
        LDR		PC,[R2,R0]   
        
FIQ_Addr
        STMFD	SP!,{R0-R12,lr}        
        LDR		R0,=ISR_BASE  
        LDR		R1,=AIC_IPER
        LDR		R2,[R1]
        LDR		PC,[R2,R0] 

        
;Interrupt service routine block.
_ISR_FAKE
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}
        SUBS	PC, LR,#4
_ISR_INT1
        BL		WDT_Handler	      ; Watch Dog Timer Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4 
_ISR_INT2
        BL		nIRQ0_Handler       ; External Interrupt 0
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4 
_ISR_INT3
        BL		nIRQ1_Handler       ; External Interrupt 1
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4 
_ISR_INT4
        BL		nIRQ2_Handler       ; External Interrupt 2
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4 
_ISR_INT5
        BL		nIRQ3_Handler       ; External Interrupt 3
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4  
_ISR_INT6
        BL		AC97_Handler        ; AC97 Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4 
_ISR_INT7
        BL		LCD_Handler         ; LCD Controller Interrupt
		LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4 
_ISR_INT8
        BL		RTC_Handler         ; RTC Controller Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4 
_ISR_INT9
        BL		UART0_Handler       ; UART 0 Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4        
_ISR_INT10
        BL		UART1_Handler       ; UART 1 Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT11
        BL		UART2_Handler       ; UART 2 Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT12
        BL		UART3_Handler       ; UART 3 Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT13
        BL		TIMER0_Handler      ; Timer Interrupt 0
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT14
        BL		TIMER1_Handler      ; Timer Interrupt 1
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT15
        BL		USBH0_Handler       ; USB Host Interrupt 0
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT16
        BL		USBH1_Handler       ; USB Host Interrupt 1
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT17
        BL		EMCTX_Handler       ; EMC TX Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT18
        BL		EMCRX_Handler       ; EMC RX Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT19
        BL		GDMA0_Handler       ; GDMA Channel Interrupt 0
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT20
        BL		GDMA1_Handler       ; GDMA Channel Interrupt 1
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT21
        BL		SDIO_Handler        ; SDIO Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT22
        BL		USBD_Handler        ; USB Device Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT23
        BL		SC0_Handler         ; SmartCard Interrupt 0
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT24
        BL		SC1_Handler         ; SmartCard Interrupt 1
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT25
        BL		I2C0_Handler        ; I2C Interrupt 0
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT26
        BL		I2C1_Handler        ; I2C Interrupt 1
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT27
        BL		SSP_Handler         ; SPI Interrupt
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT28
        BL		PWM_Handler          ; PWM Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT29
        BL		KPI_Handler         ; KPI Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT30
        BL		PS2_Handler         ; PS2 Interrupt
        LDR		R1,=AIC_EOSCR
        STR		R0,[R1]
        LDMFD	SP!,{R0-R12,LR}       
        SUBS	PC, LR,#4
_ISR_INT31
		BL		IRQ45_Handler       ; IRQ45 Interrupt
		LDR		R1,=AIC_EOSCR
		STR		R0,[R1]
		LDMFD	SP!,{R0-R12,LR}       
		SUBS	PC, LR,#4


;interrupt service routine Entry_address definition
ISR_BASE
		DCD		_ISR_FAKE 
		DCD		_ISR_INT1 
		DCD		_ISR_INT2 
		DCD		_ISR_INT3 
		DCD		_ISR_INT4 
		DCD		_ISR_INT5 
		DCD		_ISR_INT6
		DCD		_ISR_INT7
		DCD		_ISR_INT8
		DCD		_ISR_INT9
		DCD		_ISR_INT10
		DCD		_ISR_INT11
		DCD		_ISR_INT12
		DCD		_ISR_INT13
		DCD		_ISR_INT14
		DCD		_ISR_INT15
		DCD		_ISR_INT16
		DCD		_ISR_INT17
		DCD		_ISR_INT18
		DCD		_ISR_INT19
		DCD		_ISR_INT20
		DCD		_ISR_INT21
		DCD		_ISR_INT22
		DCD		_ISR_INT23
		DCD		_ISR_INT24
		DCD		_ISR_INT25
		DCD		_ISR_INT26
		DCD		_ISR_INT27
		DCD		_ISR_INT28
		DCD		_ISR_INT29   
		DCD		_ISR_INT30
		DCD		_ISR_INT31


		END