_primary.vhd

来自「用Verilog实现8255芯片功能」· VHDL 代码 · 共 16 行

library verilog;
use verilog.vl_types.all;
entity cc_port is
    port(
        rst_n           : in     vl_logic;
        c_port          : in     vl_logic;
        r_w             : in     vl_logic;
        c_upper_io      : in     vl_logic;
        c_lower_io      : in     vl_logic;
        c_set_rst       : in     vl_logic_vector(4 downto 0);
        c_outbuf        : in     vl_logic_vector(7 downto 0);
        c_inbuf         : out    vl_logic_vector(7 downto 0);
        c_bus           : inout  vl_logic_vector(7 downto 0)
    );
end cc_port;