_primary.vhd

来自「用Verilog实现8255芯片功能」· VHDL 代码 · 共 12 行

library verilog;
use verilog.vl_types.all;
entity bb_port is
    port(
        b_port          : in     vl_logic;
        b_mode_io       : in     vl_logic;
        b_outbuf        : in     vl_logic_vector(7 downto 0);
        b_inbuf         : out    vl_logic_vector(7 downto 0);
        b_bus           : inout  vl_logic_vector(7 downto 0)
    );
end bb_port;