📄 s2443addr.h
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#define rMCAR (*(volatile unsigned char *)0x4980008C) //Memory Current Address Register
// chapter18 IIC - cha
#define rIICCON (*(volatile unsigned *)0x54000000) //IIC control
#define rIICSTAT (*(volatile unsigned *)0x54000004) //IIC control/status
#define rIICADD (*(volatile unsigned *)0x54000008) //IIC address
#define rIICDS (*(volatile unsigned *)0x5400000c) //IIC transmit/receive data shift
#define rIICLC (*(volatile unsigned *)0x54000010) //IIC-Bus multi-master line control register
// chapter19 SPI - cha
#define rSPCON0 (*(volatile unsigned *)0x52000000) //SPI0 control
#define rSPSTA0 (*(volatile unsigned *)0x52000004) //SPI0 status
#define rSPPIN0 (*(volatile unsigned *)0x52000008) //SPI0 pin control
#define rSPPRE0 (*(volatile unsigned *)0x5200000c) //SPI0 baud rate prescaler
#define rSPTDAT0 (*(volatile unsigned *)0x52000010) //SPI0 Tx data
#define rSPRDAT0 (*(volatile unsigned *)0x52000014) //SPI0 Rx data
#define rSPCON1 (*(volatile unsigned *)0x59000000) //SPI1 control
#define rSPSTA1 (*(volatile unsigned *)0x59000004) //SPI1 status
#define rSPPIN1 (*(volatile unsigned *)0x59000008) //SPI1 pin control
#define rSPPRE1 (*(volatile unsigned *)0x5900000c) //SPI1 baud rate prescaler
#define rSPTDAT1 (*(volatile unsigned *)0x59000000) //SPI1 Tx data
#define rSPRDAT1 (*(volatile unsigned *)0x59000004) //SPI1 Rx data// chapter20 HS_SPI Interface - gom
// chapter20 HS_SPI - gom
#define rCH_CFG (*(volatile unsigned *)0x52000000) //SPI configuration
#define rCLK_CFG (*(volatile unsigned *)0x52000004) //Clock configuration
#define rMODE_CFG (*(volatile unsigned *)0x52000008) //SPI FIFO control
#define rSLAVE_SEL (*(volatile unsigned *)0x5200000C) //Slave selection
#define rSPI_INT_EN (*(volatile unsigned *)0x52000010) //SPI interrupt enable
#define rSPI_STATUS (*(volatile unsigned *)0x52000014) //SPI status
#define rSPI_TX_DATA (*(volatile unsigned *)0x52000018) //SPI TX data
#define rSPI_RX_DATA (*(volatile unsigned *)0x5200001C) //SPI RX data
#define rPACKET_CNT (*(volatile unsigned *)0x52000020) //count how many data master gets
#define rPENDING_CLR (*(volatile unsigned *)0x52000024) //Pending clear
// chapter21 TFT LCD CONTROLLER - oh
#define rVIDCON0 (*(volatile unsigned *)0x4c800000) //VIDEO CONTROL REGTISTER 0
#define rVIDCON1 (*(volatile unsigned *)0x4c800004) //VIDEO CONTROL REGTISTER 1
#define rVIDTCON0 (*(volatile unsigned *)0x4c800008) //VIDEO CONTROL REGTISTER 0
#define rVIDTCON1 (*(volatile unsigned *)0x4c80000C) //VIDEO TIME CONTROL REGTISTER 1
#define rVIDTCON2 (*(volatile unsigned *)0x4c800010) //VIDEO TIME CONTROL REGTISTER 2
#define rWINCON0 (*(volatile unsigned *)0x4c800014) //WINDOW CONTROL REGTISTER 0
#define rWINCON1 (*(volatile unsigned *)0x4c800018) //WINDOW CONTROL REGTISTER 1
#define rVIDOSD0A (*(volatile unsigned *)0x4c800028) //VIDEO WIDOW 0'S POSITION CONTROL REGTISTER
#define rVIDOSD0B (*(volatile unsigned *)0x4c80002C) //VIDEO WIDOW 0'S POSITION CONTROL REGTISTER
#define rVIDOSD0C (*(volatile unsigned *)0x4c800030) //VIDEO WIDOW 0'S POSITION CONTROL REGTISTER
#define rVIDOSD1A (*(volatile unsigned *)0x4c800034) //VIDEO WIDOW 1'S POSITION CONTROL REGTISTER
#define rVIDOSD1B (*(volatile unsigned *)0x4c800038) //VIDEO WIDOW 1'S POSITION CONTROL REGTISTER
#define rVIDOSD1C (*(volatile unsigned *)0x4c80003C) //VIDEO WIDOW 1'S POSITION CONTROL REGTISTER
#define rVIDW00ADD0B0 (*(volatile unsigned *)0x4c800064) //WIDOW 0'S BUFFER START ADDR,
#define rVIDW00ADD0B1 (*(volatile unsigned *)0x4c800068) //WIDOW 0'S BUFFER START ADDR,
#define rVIDW01ADD0 (*(volatile unsigned *)0x4c80006C) //WIDOW 1'S BUFFER START ADDR,
#define rVIDW00ADD1B0 (*(volatile unsigned *)0x4c80007C) //WIDOW 0'S BUFFER START ADDR,
#define rVIDW00ADD1B1 (*(volatile unsigned *)0x4c800080) //WIDOW 0'S BUFFER START ADDR,
#define rVIDW01ADD1 (*(volatile unsigned *)0x4c800084) //WIDOW 1'S BUFFER START ADDR,
#define rVIDW00ADD2B0 (*(volatile unsigned *)0x4c800094) //WIDOW 0'S BUFFER START ADDR,
#define rVIDW00ADD2B1 (*(volatile unsigned *)0x4c800098) //WIDOW 0'S BUFFER START ADDR,
#define rVIDW01ADD2 (*(volatile unsigned *)0x4c80009C) //WIDOW 1'S BUFFER START ADDR,
#define rVIDINTCON (*(volatile unsigned *)0x4c8000AC) //INDICATE THE VIDEO INTER. CONTROL
#define rW1KEYCON0 (*(volatile unsigned *)0x4c8000B0) //COLOR KEY CONTROL REG.
#define rW1KEYCON1 (*(volatile unsigned *)0x4c8000B4) //COLOR KEY CONTROL REG.
#define rW2KEYCON0 (*(volatile unsigned *)0x4c8000B8) //COLOR KEY CONTROL REG.
#define rW2KEYCON1 (*(volatile unsigned *)0x4c8000BC) //COLOR KEY CONTROL REG.
#define rW3KEYCON0 (*(volatile unsigned *)0x4c8000C0) //COLOR KEY CONTROL REG.
#define rW3KEYCON1 (*(volatile unsigned *)0x4c8000C4) //COLOR KEY CONTROL REG.
#define rW4KEYCON0 (*(volatile unsigned *)0x4c8000C8) //COLOR KEY CONTROL REG.
#define rW4KEYCON1 (*(volatile unsigned *)0x4c8000CC) //COLOR KEY CONTROL REG.
#define rWIN0MAP (*(volatile unsigned *)0x4c8000D0) //WINDOW COLOR CONTROL
#define rWIN1MAP (*(volatile unsigned *)0x4c8000D4) //WINDOW COLOR CONTROL
#define rWPALCON (*(volatile unsigned *)0x4c8000E4) //WINDOW PALLETTE CONTROL
#define rSYSIFCON0 (*(volatile unsigned *)0x4c800130) //SYSTEM INTERFACE MAIN LDI
#define rSYSIFCON1 (*(volatile unsigned *)0x4c800134) //SYSTEM INTERFACE SUB LDI
#define rDITHMODE1 (*(volatile unsigned *)0x4c800138) //DITHERING MODE
#define rSIFCCON0 (*(volatile unsigned *)0x4c80013C) //SYSTEM INTERFACE COMMAND CONTROL
#define rSIFCCON1 (*(volatile unsigned *)0x4c800140) //SYSTEM IF COMMAND DATA WRITE CONTROL
#define rSIFCCON2 (*(volatile unsigned *)0x4c800144) //SYSTEM IF COMMAND DATA READ CONTROL
#define rCPUTRIGCON1 (*(volatile unsigned *)0x4c80015C) //CPU TRIGGER SOURCE MASK
#define rCPUTRIGCON2 (*(volatile unsigned *)0x4c800160) //SOFTWARE BSED TRIGGER CONTROL
#define rVIDW00ADD0B1 (*(volatile unsigned *)0x4c800068) //WIDOW 0'S BUFFER START ADDR,
#define rVIDW01ADD0 (*(volatile unsigned *)0x4c80006C) //WIDOW 1'S BUFFER START ADDR,
#define WIN0_PALETTE_START (0x4c800400)
#define WIN1_PALETTE_START (0x4c800800)
// chapter22 CSTN CONTROLLER - oh
#define rLCDCON1 (*(volatile unsigned *)0x4d000000) //LCD control 1
#define rLCDCON2 (*(volatile unsigned *)0x4d000004) //LCD control 2
#define rLCDCON3 (*(volatile unsigned *)0x4d000008) //LCD control 3
#define rLCDCON4 (*(volatile unsigned *)0x4d00000c) //LCD control 4
#define rLCDCON5 (*(volatile unsigned *)0x4d000010) //LCD control 5
#define rLCDCON6 (*(volatile unsigned *)0x4d000034) //LCD control 6
#define rLCDCON7 (*(volatile unsigned *)0x4d000038) //LCD control 7
#define rLCDCON8 (*(volatile unsigned *)0x4d00003C) //LCD control 8
#define rLCDCON9 (*(volatile unsigned *)0x4d000040) //LCD control 9
#define rLCDSADDR1 (*(volatile unsigned *)0x4d000014) //STN/TFT Frame buffer start address 1
#define rLCDSADDR2 (*(volatile unsigned *)0x4d000018) //STN/TFT Frame buffer start address 2
#define rLCDSADDR3 (*(volatile unsigned *)0x4d00001c) //STN/TFT Virtual screen address set
#define rREDLUT (*(volatile unsigned *)0x4d000020) //STN : RED LOOKUP TABLE REGISTER
#define rGREENLUT (*(volatile unsigned *)0x4d000024) //STN Green lookup table
#define rBLUELUT (*(volatile unsigned *)0x4d000028) //STN Blue lookup table
#define rDITHMODE (*(volatile unsigned *)0x4d00004c) //STN Dithering mode
//#define rTPAL (*(volatile unsigned *)0x4d000050) //TFT Temporary palette
#define rLCDINTPND (*(volatile unsigned *)0x4d000024) //LCD Interrupt pending
#define rLCDSRCPND (*(volatile unsigned *)0x4d000028) //LCD Interrupt source
#define rLCDINTMSK (*(volatile unsigned *)0x4d00002c) //LCD Interrupt mask
// chapter23 Camera Interface - jcs
#define rCISRCFMT (*(volatile unsigned *)0x4D800000) //Input Source Format
#define rCIWDOFST (*(volatile unsigned *)0x4D800004) //Window offset
#define rCIGCTRL (*(volatile unsigned *)0x4D800008) //Global control
//#define rCIFCTRL1 (*(volatile unsigned *)0x4D80000C) //flash control 1
//#define rCIFCTRL2 (*(volatile unsigned *)0x4D800010) //flash control 2
#define rCIDOWSFT2 (*(volatile unsigned *)0x4D800014) //Window option 2
#define rCICOYSA1 (*(volatile unsigned *)0x4D800018) //Y1 frame start address for codec DMA
#define rCICOYSA2 (*(volatile unsigned *)0x4D80001C) //Y2 frame start address for codec DMA
#define rCICOYSA3 (*(volatile unsigned *)0x4D800020) //Y3 frame start address for codec DMA
#define rCICOYSA4 (*(volatile unsigned *)0x4D800024) //Y4 frame start address for codec DMA
#define rCICOCBSA1 (*(volatile unsigned *)0x4D800028) //Cb1 frame start address for codec DMA
#define rCICOCBSA2 (*(volatile unsigned *)0x4D80002C) //Cb2 frame start address for codec DMA
#define rCICOCBSA3 (*(volatile unsigned *)0x4D800030) //Cb3 frame start address for codec DMA
#define rCICOCBSA4 (*(volatile unsigned *)0x4D800034) //Cb4 frame start address for codec DMA
#define rCICOCRSA1 (*(volatile unsigned *)0x4D800038) //Cr1 frame start address for codec DMA
#define rCICOCRSA2 (*(volatile unsigned *)0x4D80003C) //Cr2 frame start address for codec DMA
#define rCICOCRSA3 (*(volatile unsigned *)0x4D800040) //Cr3 frame start address for codec DMA
#define rCICOCRSA4 (*(volatile unsigned *)0x4D800044) //Cr4 frame start address for codec DMA
#define rCICOTRGFMT (*(volatile unsigned *)0x4D800048) //Target image format of codex DMA
#define rCICOCTRL (*(volatile unsigned *)0x4D80004C) //Codec DMA comtrol
#define rCICOSCPRERATIO (*(volatile unsigned *)0x4D800050) //Codec pre-scaler ratio control
#define rCICOSCPREDST (*(volatile unsigned *)0x4D800054) //Codec pre-scaler desitination format
#define rCICOSCCTRL (*(volatile unsigned *)0x4D800058) //Codec main-scaler control
#define rCICOTAREA (*(volatile unsigned *)0x4D80005C) //Codec pre-scaler desination format
#define rCICOSTATUS (*(volatile unsigned *)0x4D800064) //Codec path status
#define rCIPRCLRSA1 (*(volatile unsigned *)0x4D80006C) //RGB 1st frame start address for preview DMA
#define rCIPRCLRSA2 (*(volatile unsigned *)0x4D800070) //RGB 1st frame start address for preview DMA
#define rCIPRCLRSA3 (*(volatile unsigned *)0x4D800074) //RGB 1st frame start address for preview DMA
#define rCIPRCLRSA4 (*(volatile unsigned *)0x4D800078) //RGB 1st frame start address for preview DMA
#define rCIPRTRGFMT (*(volatile unsigned *)0x4D80007C) //Target image format of Preview DMA
#define rCIPRCTRL (*(volatile unsigned *)0x4D800080) //Codec DMA comtrol
#define rCIPRSCPRERATIO (*(volatile unsigned *)0x4D800084) //Codec pre-scaler ratio control
#define rCIPRSCPREDST (*(volatile unsigned *)0x4D800088) //Codec pre-scaler desitination format
#define rCIPRSCCTRL (*(volatile unsigned *)0x4D80008C) //Codec main-scaler control
#define rCIPRTAREA (*(volatile unsigned *)0x4D800090) //Codec pre-scaler desination format
#define rCIPRSTATUS (*(volatile unsigned *)0x4D800098) //Codec path status
#define rCIIMGCPT (*(volatile unsigned *)0x4D8000A0) //Imahe capture enable command
#define rCICOCPTSEQ (*(volatile unsigned *)0x4D8000A4) //Codec dma capture sequence related
#define rCICOSCOS (*(volatile unsigned *)0x4D8000A8) //Codec scan line offset related
#define rCIIMGEFF (*(volatile unsigned *)0x4D8000B0) //Imahe Effects related
#define rCIMSYSA (*(volatile unsigned *)0x4D8000B4) //MSDMA Y start address related
#define rCIMSCBSA (*(volatile unsigned *)0x4D8000B8) //MSDMA Cb start address related
#define rCIMSCRSA (*(volatile unsigned *)0x4D8000BC) //MSDMA Cr start address related
#define rCIMSYEND (*(volatile unsigned *)0x4D8000C0) //MSDMA Y end address related
#define rCIMSCBEND (*(volatile unsigned *)0x4D8000C4) //MSDMA Cb end address related
#define rCIMSCREND (*(volatile unsigned *)0x4D8000C8) //MSDMA Cr end address related
#define rCIMSYOFF (*(volatile unsigned *)0x4D8000CC) //MSDMA Y offset related
#define rCIMSCBOFF (*(volatile unsigned *)0x4D8000D0) //MSDMA Cb offset related
#define rCIMSCROFF (*(volatile unsigned *)0x4D8000D4) //MSDMA Cr offset related
#define rCIMSWIDTH (*(volatile unsigned *)0x4D8000D8) //MSDMA source image width related
#define rCIMSCTRL (*(volatile unsigned *)0x4D8000DC) //MSDMA cotrol
// chapter24 ADC - gom
#define rADCCON (*(volatile unsigned *)0x58000000) //ADC control
#define rADCTSC (*(volatile unsigned *)0x58000004) //ADC touch screen control
#define rADCDLY (*(volatile unsigned *)0x58000008) //ADC start or Interval Delay
#define rADCDAT0 (*(volatile unsigned *)0x5800000c) //ADC conversion data 0
#define rADCDAT1 (*(volatile unsigned *)0x58000010) //ADC conversion data 1
#define rADCUPDN (*(volatile unsigned *)0x58000014) //Stylus Up/Down interrupt status
#define rADCMUX (*(volatile unsigned *)0x58000018) //Stylus Up/Down interrupt status
// chapter25 IIS - junon
#define rIISCON (*(volatile unsigned *)0x55000000) //IIS Control
#define rIISMOD (*(volatile unsigned *)0x55000004) //IIS Mode
#define rIISFIC (*(volatile unsigned *)0x55000008) //IIS FIFO control
#define rIISPSR (*(volatile unsigned *)0x5500000c) //IIS clock divider control
#define rIISTXD (*(volatile unsigned *)0x55000010) //IIS tracsmit data
#define rIISRXD (*(volatile unsigned *)0x55000014) //IIS recelve data
// chpater26 AC97 - junon
#define rAC_GLBCTRL (*(volatile unsigned *)0x5B000000)
#define rAC_GLBSTAT (*(volatile unsigned *)0x5B000004)
#define rAC_CODEC_CMD (*(volatile unsigned *)0x5B000008)
#define rAC_CODEC_STAT (*(volatile unsigned *)0x5B00000C)
#define rAC_PCMADDR (*(volatile unsigned *)0x5B000010) // edited by junon
#define rAC_MICADDR (*(volatile unsigned *)0x5B000014)
#define rAC_PCMDATA (*(volatile unsigned *)0x5B000018)
#define rAC_MICDATA (*(volatile unsigned *)0x5B00001C)
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