📄 main.c
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else if (!dwStartAddr && !dwLength)
{
OALMSG(TRUE, (TEXT("Don't support raw image\r\n")));
g_ImageType = IMAGE_TYPE_RAWBIN;
return FALSE;
}
// HACKHACK: get around MXIP images with funky addresses
OALMSG(TRUE, (TEXT("BIN image type unknow\r\n")));
OALMSG(OAL_FUNC, (TEXT("_OEMVerifyMemory.\r\n")));
return FALSE;
}
/*
@func void | OEMMultiBINNotify | Called by blcommon to nofity the OEM code of the number, size, and location of one or more BIN regions,
this routine collects the information and uses it when temporarily caching a flash image in RAM prior to final storage.
@rdesc N/A.
@comm
@xref
*/
void OEMMultiBINNotify(const PMultiBINInfo pInfo)
{
BYTE nCount;
DWORD g_dwMinImageStart;
OALMSG(OAL_FUNC, (TEXT("+OEMMultiBINNotify.\r\n")));
if (!pInfo || !pInfo->dwNumRegions)
{
OALMSG(OAL_WARN, (TEXT("WARNING: OEMMultiBINNotify: Invalid BIN region descriptor(s).\r\n")));
return;
}
if (!pInfo->Region[0].dwRegionStart && !pInfo->Region[0].dwRegionLength)
{
return;
}
g_dwMinImageStart = pInfo->Region[0].dwRegionStart;
OALMSG(TRUE, (TEXT("\r\nDownload BIN file information:\r\n")));
OALMSG(TRUE, (TEXT("-----------------------------------------------------\r\n")));
for (nCount = 0 ; nCount < pInfo->dwNumRegions ; nCount++)
{
OALMSG(TRUE, (TEXT("[%d]: Base Address=0x%x Length=0x%x\r\n"),
nCount, pInfo->Region[nCount].dwRegionStart, pInfo->Region[nCount].dwRegionLength));
if (pInfo->Region[nCount].dwRegionStart < g_dwMinImageStart)
{
g_dwMinImageStart = pInfo->Region[nCount].dwRegionStart;
if (g_dwMinImageStart == 0)
{
OALMSG(OAL_WARN, (TEXT("WARNING: OEMMultiBINNotify: Bad start address for region (%d).\r\n"), nCount));
return;
}
}
}
memcpy((LPBYTE)&g_BINRegionInfo, (LPBYTE)pInfo, sizeof(MultiBINInfo));
OALMSG(TRUE, (TEXT("-----------------------------------------------------\r\n")));
OALMSG(OAL_FUNC, (TEXT("_OEMMultiBINNotify.\r\n")));
}
/////////////////////// START - Stubbed functions - START //////////////////////////////
/*
@func void | SC_WriteDebugLED | Write to debug LED.
@rdesc N/A.
@comm
@xref
*/
void SC_WriteDebugLED(USHORT wIndex, ULONG dwPattern)
{
// Stub - needed by NE2000 EDBG driver...
//
}
ULONG HalSetBusDataByOffset(IN BUS_DATA_TYPE BusDataType,
IN ULONG BusNumber,
IN ULONG SlotNumber,
IN PVOID Buffer,
IN ULONG Offset,
IN ULONG Length)
{
return(0);
}
ULONG
HalGetBusDataByOffset(IN BUS_DATA_TYPE BusDataType,
IN ULONG BusNumber,
IN ULONG SlotNumber,
IN PVOID Buffer,
IN ULONG Offset,
IN ULONG Length)
{
return(0);
}
BOOLEAN HalTranslateBusAddress(IN INTERFACE_TYPE InterfaceType,
IN ULONG BusNumber,
IN PHYSICAL_ADDRESS BusAddress,
IN OUT PULONG AddressSpace,
OUT PPHYSICAL_ADDRESS TranslatedAddress)
{
// All accesses on this platform are memory accesses...
//
if (AddressSpace)
*AddressSpace = 0;
// 1:1 mapping...
//
if (TranslatedAddress)
{
*TranslatedAddress = BusAddress;
return(TRUE);
}
return(FALSE);
}
PVOID MmMapIoSpace(IN PHYSICAL_ADDRESS PhysicalAddress,
IN ULONG NumberOfBytes,
IN BOOLEAN CacheEnable)
{
DWORD dwAddr = PhysicalAddress.LowPart;
if (CacheEnable)
dwAddr &= ~CACHED_TO_UNCACHED_OFFSET;
else
dwAddr |= CACHED_TO_UNCACHED_OFFSET;
return((PVOID)dwAddr);
}
VOID MmUnmapIoSpace(IN PVOID BaseAddress,
IN ULONG NumberOfBytes)
{
}
VOID WINAPI SetLastError(DWORD dwErrCode)
{
}
/////////////////////// END - Stubbed functions - END //////////////////////////////
/*
@func PVOID | GetKernelExtPointer | Locates the kernel region's extension area pointer.
@rdesc Pointer to the kernel's extension area.
@comm
@xref
*/
PVOID GetKernelExtPointer(DWORD dwRegionStart, DWORD dwRegionLength)
{
DWORD dwCacheAddress = 0;
ROMHDR *pROMHeader;
DWORD dwNumModules = 0;
TOCentry *pTOC;
if (dwRegionStart == 0 || dwRegionLength == 0)
return(NULL);
if (*(LPDWORD) OEMMapMemAddr (dwRegionStart, dwRegionStart + ROM_SIGNATURE_OFFSET) != ROM_SIGNATURE)
return NULL;
// A pointer to the ROMHDR structure lives just past the ROM_SIGNATURE (which is a longword value). Note that
// this pointer is remapped since it might be a flash address (image destined for flash), but is actually cached
// in RAM.
//
dwCacheAddress = *(LPDWORD) OEMMapMemAddr (dwRegionStart, dwRegionStart + ROM_SIGNATURE_OFFSET + sizeof(ULONG));
pROMHeader = (ROMHDR *) OEMMapMemAddr (dwRegionStart, dwCacheAddress);
// Make sure sure are some modules in the table of contents.
//
if ((dwNumModules = pROMHeader->nummods) == 0)
return NULL;
// Locate the table of contents and search for the kernel executable and the TOC immediately follows the ROMHDR.
//
pTOC = (TOCentry *)(pROMHeader + 1);
while(dwNumModules--) {
LPBYTE pFileName = OEMMapMemAddr(dwRegionStart, (DWORD)pTOC->lpszFileName);
if (!strcmp((const char *)pFileName, "nk.exe")) {
return ((PVOID)(pROMHeader->pExtensions));
}
++pTOC;
}
return NULL;
}
/*
@func BOOL | OEMDebugInit | Initializes the serial port for debug output message.
@rdesc TRUE == Success and FALSE == Failure.
@comm
@xref
*/
BOOL OEMDebugInit(void)
{
// Set up function callbacks used by blcommon.
//
g_pOEMVerifyMemory = OEMVerifyMemory; // Verify RAM.
g_pOEMMultiBINNotify = OEMMultiBINNotify;
// Call serial initialization routine (shared with the OAL).
//
OEMInitDebugSerial();
return(TRUE);
}
/*
@func void | SaveEthernetAddress | Save Ethernet Address on IMAGE_SHARE_ARGS_UA_START for Ethernet KITL
@rdesc
@comm
@xref
*/
void SaveEthernetAddress()
{
memcpy(pBSPArgs->kitl.mac, g_pBootCfg->EdbgAddr.wMAC, 6);
if (!(g_pBootCfg->ConfigFlags & CONFIG_FLAGS_DHCP))
{
// Static IP address.
pBSPArgs->kitl.ipAddress = g_pBootCfg->EdbgAddr.dwIP;
pBSPArgs->kitl.ipMask = g_pBootCfg->SubnetMask;
pBSPArgs->kitl.flags &= ~OAL_KITL_FLAGS_DHCP;
}
else
{
pBSPArgs->kitl.ipAddress = g_DeviceAddr.dwIP;
pBSPArgs->kitl.flags |= OAL_KITL_FLAGS_DHCP;
}
}
//------------------------------------------------
// MAX1718 ARM core, internal regulator setting added 06.07.03 JJG
//------------------------------------------------
void Max1718_Set(int pwr, int voltage) // add 060624
{
// volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)(S3C2443_BASE_REG_PA_IOPORT);
int vtg;
//////////////////////////////////////////////
// GPF3 GPF4 GPF5 GPF6 GPF7
// D4 D3 D2 D1 D0
// 0 0 0 0 0 // 1.75V
// 0 0 0 0 1 // 1.70V
// 0 0 0 1 0 // 1.65V
// 0 0 0 1 1 // 1.60V
// 0 0 1 0 0 // 1.55V
// 0 0 1 0 1 // 1.50V
// 0 0 1 1 0 // 1.45V, Max. voltage of S3C2443 VDDarm
// 0 0 1 1 1 // 1.40V
// 0 1 0 0 0 // 1.35V
// 0 1 0 0 1 // 1.30V
// 0 1 0 1 0 // 1.25V
// 0 1 0 1 1 // 1.20V
// 0 1 1 0 0 // 1.15V
// 0 1 1 0 1 // 1.10V
// 0 1 1 1 0 // 1.05V
// 0 1 1 1 1 // 1.00V
// 1 0 0 0 1 // 0.95V
// 1 0 0 1 1 // 0.90V
// 1 0 1 0 1 // 0.85V
// 1 0 1 1 1 // 0.80V
vtg=voltage;
/*
s2443IOP->GPFCON = s2443IOP->GPFCON & ~(0x3ff<<6)|(0x155<<6); // GPF3 ~ 7(Data5 ~ 1): OUTPUT
s2443IOP->GPFUDP = s2443IOP->GPFUDP & ~(0x3ff<<6)|(0x2aa<<6); // pull down disable
s2443IOP->GPGCON = s2443IOP->GPGCON & ~(0xf<<12)|(0x5<<12); // GPG6(nARM_REG_LE), GPG7(CORE_REG_OE): OUTPUT
s2443IOP->GPGUDP = s2443IOP->GPGUDP & ~(0xf<<12)|(0xa<<12); // pull down disable
s2443IOP->GPBCON = s2443IOP->GPBCON & ~(0x3<<4)|(0x1<<4); // GPB2(nINT_REG_LE): OUTPUT
s2443IOP->GPBUDP = s2443IOP->GPBUDP & ~(0x3<<4)|(0x2<<4); // pull down disable
*/
switch (vtg)
{
case 175:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(0<<4)|(0<<5)|(0<<6)|(0<<7); //D4~0
break;
case 170:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(0<<4)|(0<<5)|(0<<6)|(1<<7); //D4~0
break;
case 165:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(0<<4)|(0<<5)|(1<<6)|(0<<7); //D4~0
break;
case 160:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(0<<4)|(0<<5)|(1<<6)|(1<<7); //D4~0
break;
case 155:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(0<<4)|(1<<5)|(0<<6)|(0<<7); //D4~0
break;
case 150:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(0<<4)|(1<<5)|(0<<6)|(1<<7); //D4~0
break;
case 145:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(0<<4)|(1<<5)|(1<<6)|(0<<7); //D4~0
break;
case 140:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(0<<4)|(1<<5)|(1<<6)|(1<<7); //D4~0
break;
case 135:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(0<<5)|(0<<6)|(0<<7); //D4~0
break;
case 130:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(0<<5)|(0<<6)|(1<<7); //D4~0
break;
case 125:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(0<<5)|(1<<6)|(0<<7); //D4~0
break;
case 120:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(0<<5)|(1<<6)|(1<<7); //D4~0
break;
case 115:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(1<<5)|(0<<6)|(0<<7); //D4~0
break;
case 110:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(1<<5)|(0<<6)|(1<<7); //D4~0
break;
case 105:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(1<<5)|(1<<6)|(0<<7); //D4~0
break;
case 100:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7); //D4~0
break;
case 95:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(1<<3)|(0<<4)|(0<<5)|(0<<6)|(1<<7); //D4~0
break;
case 90:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(1<<3)|(0<<4)|(0<<5)|(1<<6)|(1<<7); //D4~0
break;
case 85:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(1<<3)|(0<<4)|(1<<5)|(0<<6)|(1<<7); //D4~0
break;
case 80:
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(1<<3)|(0<<4)|(1<<5)|(1<<6)|(1<<7); //D4~0
break;
default: // 1.35V
s2443IOP->GPFDAT=(s2443IOP->GPFDAT&~(0x1f<<3))|(0<<3)|(1<<4)|(0<<5)|(0<<6)|(0<<7); //D4~0
break;
}
if(pwr) s2443IOP->GPGDAT&=~(1<<6); //Arm Latch enable
else s2443IOP->GPBDAT&=~(1<<2); //Int Latch enable
s2443IOP->GPGDAT|=(1<<7); //Output enable
if(pwr) s2443IOP->GPGDAT|=(1<<6); //Arm Latch disable
else s2443IOP->GPBDAT|=(1<<2); //Int Latch diaable
}
void Max1718_Init() // add 060624
{
// volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
volatile S3C2443_IOPORT_REG *s2443IOP = (S3C2443_IOPORT_REG *)(S3C2443_BASE_REG_PA_IOPORT);
// int vtg,i;
//////////////////////////////////////////////
// GPF3 GPF4 GPF5 GPF6 GPF7
// D4 D3 D2 D1 D0
// 0 0 0 0 0 // 1.75V
// 0 0 0 0 1 // 1.70V
// 0 0 0 1 0 // 1.65V
// 0 0 0 1 1 // 1.60V
// 0 0 1 0 0 // 1.55V
// 0 0 1 0 1 // 1.50V
// 0 0 1 1 0 // 1.45V, Max. voltage of S3C2443 VDDarm
// 0 0 1 1 1 // 1.40V
// 0 1 0 0 0 // 1.35V
// 0 1 0 0 1 // 1.30V
// 0 1 0 1 0 // 1.25V
// 0 1 0 1 1 // 1.20V
// 0 1 1 0 0 // 1.15V
// 0 1 1 0 1 // 1.10V
// 0 1 1 1 0 // 1.05V
// 0 1 1 1 1 // 1.00V
// 1 0 0 0 1 // 0.95V
// 1 0 0 1 1 // 0.90V
// 1 0 1 0 1 //⌨️ 快捷键说明
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