globalparams.inc

电容感应程序

; Generated by PSoC Designer ver 4.3  b1884 : 23 June, 2006
;
;=============================================================================
;  FILENAME:   GlobalParams.inc
;  DATE:       31 January 2006
;
;  DESCRIPTION:
;  Constants describing many of the global parameter settings.
;  This file contains equates to support oscillator register initialization
;  for the CY8C20434-12LFXC
;
;  Copyright (C) Cypress MicroSystems 2000-2006. All rights reserved.
;
; NOTES:
; Do not modify this file. It is generated by PSoC Designer each time the
; generate application function is run. The values of the parameters in this
; file can be modified by changing the values of the global parameters in the
; device editor.
;=============================================================================
;

POWER_SETTING:			equ	10h

CPU_CLOCK:				equ	3h	;CPU clock value
CPU_CLOCK_MASK:			equ	7h	;CPU clock mask
CPU_CLOCK_JUST:			equ	3h	;CPU clock value justified

SLEEP_TIMER:			equ	0h	;Sleep Timer value
SLEEP_TIMER_MASK:		equ	18h	;Sleep Timer mask
SLEEP_TIMER_JUST:		equ	0h	;Sleep Timer value justified

SYSCLK_SOURCE:			equ	(0h | 0h)	;SysClk Source setting
SYSCLK_SOURCE_MASK:		equ	(4h | 2h)	;SysClk Source setting mask
SYSCLK_SOURCE_JUST:		equ	(0h | 0h)	;SysClk Source setting justified

TRIP_VOLTAGE:           equ 7h  ;Trip Voltage value
TRIP_VOLTAGE_MASK:      equ 7h  ;Trip Voltage mask
TRIP_VOLTAGE_JUST:      equ 7h  ;Trip Voltage justified
                              
LVD_TBEN:               equ 0   ;Low Voltage Throttle-back enable value
LVD_TBEN_MASK:          equ 8   ;Low Voltage Throttle-back enable mask
LVD_TBEN_JUST:          equ 0   ;Low Voltage Throttle-back enable justified

WATCHDOG_ENABLE:		equ 0	;Watchdog Enable 1 = Enable
INTERRUPT_MODE:         equ 0   ;Interrupt Mode, 0 = Low, 1 = ChangeFromRead

P1_0_DATA_OUTPUT:		equ	(0h | 0h)	;P1[0] Data Output setting
P1_0_DATA_OUTPUT_MASK:	equ	(2h | 1h)	;P1[0] Data Output setting mask
P1_0_DATA_OUTPUT_JUST:	equ	(0h | 0h)	;P1[0] Data Output justified

P1_2_DATA_OUTPUT:		equ	(0h | 0h)	;P1[2] Data Output setting
P1_2_DATA_OUTPUT_MASK:	equ	(8h | 4h)	;P1[2] Data Output setting mask
P1_2_DATA_OUTPUT_JUST:	equ	(0h | 0h)	;P1[2] Data Output justified

P1_4_DATA_OUTPUT:		equ	(0h | 0h)	;P1[4] Data Output setting
P1_4_DATA_OUTPUT_MASK:	equ	(20h | 10h)	;P1[4] Data Output setting mask
P1_4_DATA_OUTPUT_JUST:	equ	(0h | 0h)	;P1[4] Data Output justified

P1_6_DATA_OUTPUT:		equ	(0h | 0h)	;P1[6] Data Output setting
P1_6_DATA_OUTPUT_MASK:	equ	(80h | 40h)	;P1[6] Data Output setting mask
P1_6_DATA_OUTPUT_JUST:	equ	(0h | 0h)	;P1[6] Data Output justified


POWER_SET_5V0:          equ 10h  ; MASK for 5.0V operation, fast and slow 
POWER_SET_5V0_12MHZ:    equ 10h  ; Power Setting value for 5.0V fast      
POWER_SET_5V0_6MHZ:     equ 11h  ; Power Setting value for 5.0V slow      
POWER_SET_3V3:          equ 08h  ; MASK for 3.3V operation, fast and slow 
POWER_SET_3V3_12MHZ:    equ 08h	 ; Power Setting value for 3.3V fast      
POWER_SET_3V3_6MHZ:     equ 09h	 ; Power Setting value for 3.3V slow      
POWER_SET_2V7:          equ 06h  ; MASK for 2.7V operation, fast and slow
POWER_SET_2V7_12MHZ:    equ 04h	 ; MASK for 2.7V, 12MHZ operation
POWER_SET_2V7_6MHZ:     equ 02h	 ; MASK for 2.7V,  6MHZ operation
POWER_SET_SLOW_IMO:     equ 01h  ; MASK for slow Internal Main Oscillator (IMO) 


;
; register initial values
;
PORT_0_DRIVE_0:			equ 0h	;Port 0 drive mode 0 register (PRT0DM0)
PORT_0_DRIVE_1:			equ ffh	;Port 0 drive mode 1 register (PRT0DM1)
PORT_0_INTENABLE:		equ 0h	;Port 0 interrupt enable register (PRT0IE)

PORT_1_DRIVE_0:			equ 0h	;Port 1 drive mode 0 register (PRT1DM0)
PORT_1_DRIVE_1:			equ ffh	;Port 1 drive mode 1 register (PRT1DM1)
PORT_1_INTENABLE:		equ 0h	;Port 1 interrupt enable register (PRT1IE)

PORT_2_DRIVE_0:			equ 7fh	;Port 2 drive mode 0 register (PRT2DM0)
PORT_2_DRIVE_1:			equ 80h	;Port 2 drive mode 1 register (PRT2DM1)
PORT_2_INTENABLE:		equ 0h	;Port 2 interrupt enable register (PRT2IE)

PORT_3_DRIVE_0:			equ 0h	;Port 3 drive mode 0 register (PRT3DM0)
PORT_3_DRIVE_1:			equ fh	;Port 3 drive mode 1 register (PRT3DM1)
PORT_3_INTENABLE:		equ 0h	;Port 3 interrupt enable register (PRT3IE)

; end of file GlobalParams.inc