📄 adc.lst
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0248: 62 D9 00 MOV REG[217],0 (0105) mov reg[d9h], 00h ; Port_1_MUXBusCtrl register (MUX_CR1)
024B: 62 DA 00 MOV REG[218],0 (0106) mov reg[dah], 00h ; Port_2_MUXBusCtrl register (MUX_CR2)
024E: 62 DB 00 MOV REG[219],0 (0107) mov reg[dbh], 00h ; Port_3_MUXBusCtrl register (MUX_CR3)
(0108) ; Instance name ADC10_1, User Module ADC10
(0109) ; Instance name ADC10_1, Block Name ADC(ACE00)
(0110) ; Instance name ADC10_1, Block Name CNT(DBB00)
0251: 62 20 21 MOV REG[32],33 (0111) mov reg[20h], 21h ;ADC10_1_CNT_FN(DBB00FN)
0254: 62 21 45 MOV REG[33],69 (0112) mov reg[21h], 45h ;ADC10_1_CNT_IN(DBB00IN)
0257: 62 22 40 MOV REG[34],64 (0113) mov reg[22h], 40h ;ADC10_1_CNT_OUT(DBB00OU)
(0114) ; Instance name ADC10_1, Block Name RAMP(ASE10)
025A: 62 E5 00 MOV REG[229],0 (0115) mov reg[e5h], 00h ;ADC10_1_ADC_TR(ADC0_TR)
025D: 62 63 00 MOV REG[99],0 (0116) mov reg[63h], 00h ;ADC10_1_(AMD_CR0)
(0117) ; Instance name TX8_1, User Module TX8
(0118) ; Instance name TX8_1, Block Name TX8(DCB02)
0260: 62 28 1D MOV REG[40],29 (0119) mov reg[28h], 1dh ;TX8_1_FUNC_REG (DCB02FN)
0263: 62 29 06 MOV REG[41],6 (0120) mov reg[29h], 06h ;TX8_1_INPUT_REG (DCB02IN)
0266: 62 2A 45 MOV REG[42],69 (0121) mov reg[2ah], 45h ;TX8_1_OUTPUT_REG (DCB02OU)
0269: 70 EF AND F,239 (0122) M8C_SetBank0
026B: 7F RET (0123) ret
FILE: lib\psocconfig.asm
(0001) ; Generated by PSoC Designer ver 4.4 b1884 : 14 Jan, 2007
(0002) ;
(0003) ;==========================================================================
(0004) ; PSoCConfig.asm
(0005) ; @PSOC_VERSION
(0006) ;
(0007) ; Version: 0.85
(0008) ; Revised: June 22, 2004
(0009) ; Copyright Cypress MicroSystems 2000-2004. All Rights Reserved.
(0010) ;
(0011) ; This file is generated by the Device Editor on Application Generation.
(0012) ; It contains code which loads the configuration data table generated in
(0013) ; the file PSoCConfigTBL.asm
(0014) ;
(0015) ; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
(0016) ; Edits to this file will not be preserved.
(0017) ;==========================================================================
(0018) ;
(0019) include "m8c.inc"
(0020) include "memory.inc"
(0021) include "GlobalParams.inc"
(0022)
(0023) export LoadConfigInit
(0024) export _LoadConfigInit
(0025) export LoadConfig_adc
(0026) export _LoadConfig_adc
(0027)
(0028) export NO_SHADOW
(0029) export _NO_SHADOW
(0030)
(0031) FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask
(0032) END_CONFIG_TABLE: equ ffh ;end of config table indicator
(0033)
(0034) AREA psoc_config(rom, rel)
(0035)
(0036)
(0037) ;---------------------------------------------------------------------------
(0038) ; LoadConfigInit - Establish the start-up configuration (except for a few
(0039) ; parameters handled by boot code, like CPU speed). This
(0040) ; function can be called from user code, but typically it
(0041) ; is only called from boot.
(0042) ;
(0043) ; INPUTS: None.
(0044) ; RETURNS: Nothing.
(0045) ; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified!
(0046) ; In the large memory model currently only the page
(0047) ; pointer registers listed below are modified. This does
(0048) ; not guarantee that in future implementations of this
(0049) ; function other page pointer registers will not be
(0050) ; modified.
(0051) ;
(0052) ; Page Pointer Registers Modified:
(0053) ; CUR_PP
(0054) ;
(0055) _LoadConfigInit:
(0056) LoadConfigInit:
(0057) RAM_PROLOGUE RAM_USE_CLASS_4
(0058)
026C: 7C 02 70 LCALL 0x0270 (0059) lcall LoadConfig_adc
(0060)
(0061)
(0062) RAM_EPILOGUE RAM_USE_CLASS_4
026F: 7F RET (0063) ret
(0064)
(0065) ;---------------------------------------------------------------------------
(0066) ; Load Configuration adc
(0067) ;
(0068) ; Load configuration registers for adc.
(0069) ; IO Bank 0 registers a loaded first,then those in IO Bank 1.
(0070) ;
(0071) ; INPUTS: None.
(0072) ; RETURNS: Nothing.
(0073) ; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be
(0074) ; modified as may the Page Pointer registers!
(0075) ; In the large memory model currently only the page
(0076) ; pointer registers listed below are modified. This does
(0077) ; not guarantee that in future implementations of this
(0078) ; function other page pointer registers will not be
(0079) ; modified.
(0080) ;
(0081) ; Page Pointer Registers Modified:
(0082) ; CUR_PP
(0083) ;
(0084) _LoadConfig_adc:
(0085) LoadConfig_adc:
(0086) RAM_PROLOGUE RAM_USE_CLASS_4
0270: 7C 01 52 LCALL 0x0152 (0087) lcall LoadConfigTBL_adc ; Call load config table routine
(0088)
(0089)
0273: 70 EF AND F,239 (0090) M8C_SetBank0 ; Force return to bank 0
(0091) RAM_EPILOGUE RAM_USE_CLASS_4
0275: 7F RET (0092) ret
FILE: lib\tx8_1int.asm
(0001) ;;*****************************************************************************
(0002) ;;*****************************************************************************
(0003) ;; FILENAME: TX8_1INT.asm
(0004) ;; Version: 3.3, Updated on 2006/01/14 at 16:09:12
(0005) ;; Generated by PSoC Designer ver 4.4 b1884 : 14 Jan, 2007
(0006) ;;
(0007) ;; DESCRIPTION: TX8 Interrupt Service Rountine.
(0008) ;;-----------------------------------------------------------------------------
(0009) ;; Copyright (c) Cypress MicroSystems 2000-2003. All Rights Reserved.
(0010) ;;*****************************************************************************
(0011) ;;*****************************************************************************
(0012)
(0013) include "m8c.inc"
(0014) include "memory.inc"
(0015) include "TX8_1.inc"
(0016)
(0017)
(0018) ;-----------------------------------------------
(0019) ; Global Symbols
(0020) ;-----------------------------------------------
(0021) export _TX8_1_ISR
(0022)
(0023)
(0024) AREA InterruptRAM (RAM,REL,CON)
(0025)
(0026) ;@PSoC_UserCode_INIT@ (Do not change this line.)
(0027) ;---------------------------------------------------
(0028) ; Insert your custom declarations below this banner
(0029) ;---------------------------------------------------
(0030)
(0031) ;------------------------
(0032) ; Includes
(0033) ;------------------------
(0034)
(0035)
(0036) ;------------------------
(0037) ; Constant Definitions
(0038) ;------------------------
(0039)
(0040)
(0041) ;------------------------
(0042) ; Variable Allocation
(0043) ;------------------------
(0044)
(0045)
(0046) ;---------------------------------------------------
(0047) ; Insert your custom declarations above this banner
(0048) ;---------------------------------------------------
(0049) ;@PSoC_UserCode_END@ (Do not change this line.)
(0050)
(0051)
(0052) AREA UserModules (ROM, REL)
(0053)
(0054) ;-----------------------------------------------------------------------------
(0055) ; FUNCTION NAME: _TX8_1_ISR
(0056) ;
(0057) ; DESCRIPTION: Unless modified, this implements only a null handler stub.
(0058) ;
(0059) ;-----------------------------------------------------------------------------
(0060) ;
(0061)
(0062) _TX8_1_ISR:
(0063)
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