📄 tx8_1.asm
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;;*****************************************************************************
;;*****************************************************************************
;; FILENAME: TX8_1.asm
;; Version: 3.3, Updated on 2006/01/14 at 16:09:12
;; Generated by PSoC Designer ver 4.4 b1884 : 14 Jan, 2007
;;
;; DESCRIPTION: TX8 User Module software implementation file
;; for 22/24/25/26/27xxx PSoc family of devices.
;;
;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling
;; arguments and observe the associated "Registers are volatile" policy.
;; This means it is the caller's responsibility to preserve any values
;; in the X and A registers that are still needed after the API functions
;; returns. For Large Memory Model devices it is also the caller's
;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and
;; MVW_PP registers. Even though some of these registers may not be modified
;; now, there is no guarantee that will remain the case in future releases.
;;-----------------------------------------------------------------------------
;; Copyright (c) Cypress MicroSystems 2000-2003. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************
;-----------------------------------------------
; include instance specific register definitions
;-----------------------------------------------
include "m8c.inc"
include "memory.inc"
include "TX8_1.inc"
area UserModules (ROM, REL)
;-----------------------------------------------
; Global Symbols
;-----------------------------------------------
export TX8_1_SetTxIntMode
export _TX8_1_SetTxIntMode
export TX8_1_EnableInt
export _TX8_1_EnableInt
export TX8_1_DisableInt
export _TX8_1_DisableInt
export TX8_1_Start
export _TX8_1_Start
export TX8_1_Stop
export _TX8_1_Stop
export TX8_1_SendData
export _TX8_1_SendData
export TX8_1_bReadTxStatus
export _TX8_1_bReadTxStatus
// Old labels, will be removed in future release
// Do Not Use.
export bTX8_1_ReadTxStatus
export _bTX8_1_ReadTxStatus
;-----------------------------------------------
; High Level TX functions
;-----------------------------------------------
export TX8_1_PutSHexByte
export _TX8_1_PutSHexByte
export TX8_1_PutSHexInt
export _TX8_1_PutSHexInt
export TX8_1_CPutString
export _TX8_1_CPutString
export TX8_1_PutString
export _TX8_1_PutString
export TX8_1_PutChar
export _TX8_1_PutChar
export TX8_1_Write
export _TX8_1_Write
export TX8_1_CWrite
export _TX8_1_CWrite
export TX8_1_PutCRLF
export _TX8_1_PutCRLF
;-----------------------------------------------
; EQUATES
;-----------------------------------------------
bfCONTROL_REG_START_BIT: equ 1 ; Control register start bit
bfFUNCTION_REG_TX_INT_MODE_BIT: equ 0x10 ; the TX Int Mode bit
AREA UserModules (ROM, REL)
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: TX8_1_EnableInt
;
; DESCRIPTION:
; Enables this Transmitter's interrupt by setting the interrupt enable mask
; bit associated with this User Module. Remember to call the global interrupt
; enable function by using the macro: M8C_EnableGInt.
;
;-----------------------------------------------------------------------------
;
; ARGUMENTS: none
;
; RETURNS: none
;
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
TX8_1_EnableInt:
_TX8_1_EnableInt:
RAM_PROLOGUE RAM_USE_CLASS_1
M8C_EnableIntMask TX8_1_INT_REG, TX8_1_bINT_MASK
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: TX8_1_DisableInt
;
; DESCRIPTION:
; Disables this TX8's interrupt by clearing the interrupt enable mask bit
; associated with this User Module.
;
;-----------------------------------------------------------------------------
;
; ARGUMENTS: none
;
; RETURNS: none
;
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
TX8_1_DisableInt:
_TX8_1_DisableInt:
RAM_PROLOGUE RAM_USE_CLASS_1
M8C_DisableIntMask TX8_1_INT_REG, TX8_1_bINT_MASK
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: TX8_1_SetTxIntMode(BYTE bTxIntMode)
;
; DESCRIPTION:
; Sets the Tx Interrupt Mode bit in the Function Register.
;
; ARGUMENTS:
; BYTE bTxIntMode - The TX Interrupt mode setting. Use defined masks.
; Passed in the A register
;
; RETURNS:
; none.
;
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
; THEORY of OPERATION OR PROCEDURE:
; Sets the TX interrupt mode bit to define whether the interrupt occurs
; on TX register empty or TX transmit complete
;
TX8_1_SetTxIntMode:
_TX8_1_SetTxIntMode:
RAM_PROLOGUE RAM_USE_CLASS_1
M8C_SetBank1
and A, TX8_1_INT_MODE_TX_COMPLETE
jz .SetModeRegEmpty
or REG[TX8_1_FUNC_REG], bfFUNCTION_REG_TX_INT_MODE_BIT
M8C_SetBank0
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.SetModeRegEmpty:
and REG[TX8_1_FUNC_REG], ~bfFUNCTION_REG_TX_INT_MODE_BIT
M8C_SetBank0
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: TX8_1_Start(BYTE bParity)
;
; DESCRIPTION:
; Sets the start bit and parity in the Control register of this user module.
; The transmitter will begin transmitting if a byte has been written into the
; transmit buffer.
;
;-----------------------------------------------------------------------------
;
; ARGUMENTS:
; BYTE bParity - parity of transmitted data. Use defined masks.
;
; RETURNS: none
;
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
TX8_1_Start:
_TX8_1_Start:
RAM_PROLOGUE RAM_USE_CLASS_1
or A, bfCONTROL_REG_START_BIT
mov REG[TX8_1_CONTROL_REG], A
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: TX8_1_Stop
;
; DESCRIPTION:
; Disables TX8 operation.
;
;-----------------------------------------------------------------------------
;
; ARGUMENTS: none
;
; RETURNS: none
;
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
TX8_1_Stop:
_TX8_1_Stop:
RAM_PROLOGUE RAM_USE_CLASS_1
and REG[TX8_1_CONTROL_REG], ~bfCONTROL_REG_START_BIT
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: TX8_1_SendData
;
; DESCRIPTION:
; Sends one byte through serial port.
;
;-----------------------------------------------------------------------------
;
; ARGUMENTS:
; BYTE TxData - data to transmit.
;
; RETURNS:
;
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
TX8_1_SendData:
_TX8_1_SendData:
RAM_PROLOGUE RAM_USE_CLASS_1
mov REG[TX8_1_TX_BUFFER_REG], A
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: TX8_1_bReadTxStatus
;
; DESCRIPTION:
; Reads the Tx Status bits in the Control/Status register.
;
;-----------------------------------------------------------------------------
;
; ARGUMENTS:
;
; RETURNS:
; BYTE bTxStatus - transmit status data. Use the following defined bits
; masks: TX_COMPLETE and TX_BUFFER_EMPTY
;
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
TX8_1_bReadTxStatus:
_TX8_1_bReadTxStatus:
bTX8_1_ReadTxStatus:
_bTX8_1_ReadTxStatus:
RAM_PROLOGUE RAM_USE_CLASS_1
mov A, REG[TX8_1_CONTROL_REG]
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: TX8_1_PutSHexByte
;
; DESCRIPTION:
; Print a byte in Hex (two characters) to the UART Tx
;
; ARGUMENTS:
; A => (BYTE) Data/char to be printed
;
; RETURNS:
; none.
;
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
.LITERAL
TX8_1_HEX_STR:
DS "0123456789ABCDEF"
.ENDLITERAL
.SECTION
TX8_1_PutSHexByte:
_TX8_1_PutSHexByte:
RAM_PROLOGUE RAM_USE_CLASS_1
push A ; Save lower nibble
asr A ; Shift high nibble to right
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