📄 adc10_1int.lis
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0000 or F, FLAG_PGMODE_01b
0000 ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
0000 macro RAM_X_POINTS_TO_INDEXPAGE
0000 IF ( SYSTEM_LARGE_MEMORY_MODEL )
0000 and F, ~FLAG_PGMODE_01b
0000 ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
0000 macro RAM_PROLOGUE( ACTUAL_CLASS )
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_1 )
0000 ; Nothing to do
0000 ENDIF ; RAM_USE_CLASS_1
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_2 )
0000 IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
0000 RAM_X_POINTS_TO_STACKPAGE ; exit native paging mode!
0000 ENDIF
0000 ENDIF ; RAM_USE_CLASS_2
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_3 )
0000 IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
0000 RAM_X_POINTS_TO_INDEXPAGE ; exit native paging mode!
0000 ENDIF
0000 ENDIF ; RAM_USE_CLASS_3
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_4 )
0000 ; Nothing to do
0000 ENDIF ; RAM_USE_CLASS_4
0000
0000 macro RAM_EPILOGUE( ACTUAL_CLASS )
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_1 )
0000 ; Nothing to do
0000 ENDIF ; RAM_USE_CLASS_1
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_2 )
0000 RAM_RESTORE_NATIVE_PAGING
0000 ENDIF ; RAM_USE_CLASS_2
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_3 )
0000 RAM_RESTORE_NATIVE_PAGING
0000 ENDIF ; RAM_USE_CLASS_3
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_4 )
0000 ; Nothing to do
0000 ENDIF ; RAM_USE_CLASS_4
0000
0000 macro REG_PRESERVE( IOReg )
0000 mov A, reg[ @IOReg ]
0000 push A
0000 macro REG_RESTORE( IOReg )
0000 pop A
0000 mov reg[ @IOReg ], A
0000 macro ISR_PRESERVE_PAGE_POINTERS
0000 IF ( SYSTEM_LARGE_MEMORY_MODEL )
0000 REG_PRESERVE CUR_PP
0000 REG_PRESERVE IDX_PP
0000 REG_PRESERVE MVR_PP
0000 REG_PRESERVE MVW_PP
0000 ENDIF
0000 macro ISR_RESTORE_PAGE_POINTERS
0000 IF ( SYSTEM_LARGE_MEMORY_MODEL )
0000 REG_RESTORE MVW_PP
0000 REG_RESTORE MVR_PP
0000 REG_RESTORE IDX_PP
0000 REG_RESTORE CUR_PP
0000 ENDIF
0008 PWM_High: equ 8h
0002 PWM_Low: equ 2h
0000
00E0 ADC10_1_ADCIntReg: equ 0e0h
00DA ADC10_1_ADCClrIntReg: equ 0dah
0002 ADC10_1_ADCMask: equ 02h
00E1 ADC10_1_CNTIntReg: equ 0e1h
00DB ADC10_1_CNTClrIntReg: equ 0dbh
0001 ADC10_1_CNTMask: equ 01h
0000
0000 ADC10_1_OFF: equ 0
0001 ADC10_1_ON: equ 1
0000
0000 ;--------------------------------------------------
0000 ; Registers Address Constants for ADC10_1
0000 ;--------------------------------------------------
0000
0001 ADC10_1_LOWRANGE: equ 01h
0003 ADC10_1_FULLRANGE: equ 03h
0000
0000 ;--------------------------------------------------
0000 ; Deprecated:
0001 ADC10_1_LOWPOWER: equ 01h
0003 ADC10_1_FULLPOWER: equ 03h
0000 ;--------------------------------------------------
0000
0003 ADC10_1_CAL_VBG: equ 03h
0007 ADC10_1_CAL_AMUXBUS: equ 07h
0010 ADC10_1_CAL_P0_0: equ 10h
0090 ADC10_1_CAL_P0_1: equ 90h
0014 ADC10_1_CAL_P0_2: equ 14h
0091 ADC10_1_CAL_P0_3: equ 91h
0018 ADC10_1_CAL_P0_4: equ 18h
0092 ADC10_1_CAL_P0_5: equ 92h
001C ADC10_1_CAL_P0_6: equ 1Ch
0093 ADC10_1_CAL_P0_7: equ 93h
0000
0000
0080 ADC10_1_ASE_CR0: equ 80h
0072 ADC10_1_ACE_CR1: equ 72h
0073 ADC10_1_ACE_CR2: equ 73h
0068 ADC10_1_ADC_CR: equ 68h
00E5 ADC10_1_ADC_TR: equ e5h
0000
0020 ADC10_1_CNT_FN: equ 20h
0021 ADC10_1_CNT_IN: equ 21h
0022 ADC10_1_CNT_OUT: equ 22h
0020 ADC10_1_CNT_DR0: equ 20h
0021 ADC10_1_CNT_DR1: equ 21h
0022 ADC10_1_CNT_DR2: equ 22h
0023 ADC10_1_CNT_CR0: equ 23h
0000
0000
0000
export _ADC10_1_ADC_ISR
export _ADC10_1_CNT_ISR
export ADC10_1_bTempMSB
export _ADC10_1_iResult
export ADC10_1_iResult
export _ADC10_1_bfStatus
export ADC10_1_bfStatus
AREA InterruptRAM (RAM, REL)
0000 ADC10_1_bTempMSB: BLK 1
0001 _ADC10_1_iResult:
0001 ADC10_1_iResult: BLK 2 ;A/D value
0003 _ADC10_1_bfStatus:
0003 ADC10_1_bfStatus: BLK 1 ;Data Valid Flag
AREA UserModules (ROM, REL)
0000 _ADC10_1_ADC_ISR:
0000 ; ISR ,including jmptable takes 156 cpu cycles.)
0000 49DB01 tst reg[ADC10_1_CNTClrIntReg],ADC10_1_CNTMask
0003 A006 jz NoPendingInterrupt; Make sure counter has been serviced
0005 7600 inc [ADC10_1_bTempMSB]
0007 41DBFE and reg[ADC10_1_CNTClrIntReg],~(ADC10_1_CNTMask)
000A NoPendingInterrupt:
000A 08 push A
000B 496880 tst reg[ADC10_1_ADC_CR],80h
000E A009 jz .InRange
0010
0010 ; Read Counter
0010 .OverRange:
0010 5501FF mov [ADC10_1_iResult],ffh
0013 5502FF mov [ADC10_1_iResult + 1],ffh
0016 800B jmp .Done
0018
0018 .InRange:
0018 5F0100 mov [ADC10_1_iResult],[ADC10_1_bTempMSB]
001B 5D20 mov A,reg[ADC10_1_CNT_DR0]
001D 5D22 mov A,reg[ADC10_1_CNT_DR2] ;A contains next prev value
001F 73 cpl A
0020 5302 mov [ADC10_1_iResult+1],A
0022 .Done:
0022 4123FE and reg[ADC10_1_CNT_CR0], ~ADC10_1_ON
0025 6221FF mov reg[ADC10_1_CNT_DR1], 0xFF
0028 432301 or reg[ADC10_1_CNT_CR0], ADC10_1_ON
002B
002B 550301 mov [ADC10_1_bfStatus],01h
002E 550000 mov [ADC10_1_bTempMSB], 00h
0031
0031 ;@PSoC_UserCode_BODY_1@ (Do not change this line.)
0031 ;---------------------------------------------------
0031 ; Insert your custom code below this banner
0031 ;---------------------------------------------------
0031 ; NOTE: interrupt service routines must preserve
0031 ; the values of the A and X CPU registers.
0031
0031 ;---------------------------------------------------
0031 ; Insert your custom code above this banner
0031 ;---------------------------------------------------
0031 ;@PSoC_UserCode_END@ (Do not change this line.)
0031
0031 18 pop A
0032 7E reti
0033
0033 _ADC10_1_CNT_ISR:
0033 7600 inc [ADC10_1_bTempMSB]
0035
0035 ;@PSoC_UserCode_BODY_2@ (Do not change this line.)
0035 ;---------------------------------------------------
0035 ; Insert your custom code below this banner
0035 ;---------------------------------------------------
0035 ; NOTE: interrupt service routines must preserve
0035 ; the values of the A and X CPU registers.
0035
0035 ;---------------------------------------------------
0035 ; Insert your custom code above this banner
0035 ;---------------------------------------------------
0035 ;@PSoC_UserCode_END@ (Do not change this line.)
0035 7E reti
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