📄 adc10_1.lis
字号:
0000
0000 ADC10_1_OFF: equ 0
0001 ADC10_1_ON: equ 1
0000
0000 ;--------------------------------------------------
0000 ; Registers Address Constants for ADC10_1
0000 ;--------------------------------------------------
0000
0001 ADC10_1_LOWRANGE: equ 01h
0003 ADC10_1_FULLRANGE: equ 03h
0000
0000 ;--------------------------------------------------
0000 ; Deprecated:
0001 ADC10_1_LOWPOWER: equ 01h
0003 ADC10_1_FULLPOWER: equ 03h
0000 ;--------------------------------------------------
0000
0003 ADC10_1_CAL_VBG: equ 03h
0007 ADC10_1_CAL_AMUXBUS: equ 07h
0010 ADC10_1_CAL_P0_0: equ 10h
0090 ADC10_1_CAL_P0_1: equ 90h
0014 ADC10_1_CAL_P0_2: equ 14h
0091 ADC10_1_CAL_P0_3: equ 91h
0018 ADC10_1_CAL_P0_4: equ 18h
0092 ADC10_1_CAL_P0_5: equ 92h
001C ADC10_1_CAL_P0_6: equ 1Ch
0093 ADC10_1_CAL_P0_7: equ 93h
0000
0000
0080 ADC10_1_ASE_CR0: equ 80h
0072 ADC10_1_ACE_CR1: equ 72h
0073 ADC10_1_ACE_CR2: equ 73h
0068 ADC10_1_ADC_CR: equ 68h
00E5 ADC10_1_ADC_TR: equ e5h
0000
0020 ADC10_1_CNT_FN: equ 20h
0021 ADC10_1_CNT_IN: equ 21h
0022 ADC10_1_CNT_OUT: equ 22h
0020 ADC10_1_CNT_DR0: equ 20h
0021 ADC10_1_CNT_DR1: equ 21h
0022 ADC10_1_CNT_DR2: equ 22h
0023 ADC10_1_CNT_CR0: equ 23h
0000
0000
0000 ;-----------------------------------------------
0000 ; Global Symbols
0000 ;-----------------------------------------------
0000
export _ADC10_1_Start
export ADC10_1_Start
export _ADC10_1_Stop
export ADC10_1_Stop
export _ADC10_1_StartADC
export ADC10_1_StartADC
export _ADC10_1_StopADC
export ADC10_1_StopADC
export _ADC10_1_fIsDataAvailable
export ADC10_1_fIsDataAvailable
export _ADC10_1_iGetData
export ADC10_1_iGetData
export _ADC10_1_ClearFlag
export ADC10_1_ClearFlag
export _ADC10_1_iGetDataClearFlag
export ADC10_1_iGetDataClearFlag
export _ADC10_1_iCal
export ADC10_1_iCal
AREA UserModules (ROM, REL)
0000 .SECTION
0000 ;-----------------------------------------------------------------------------
0000 ; FUNCTION NAME: ADC10_1_Start
0000 ;
0000 ; DESCRIPTION:
0000 ; Applies power setting to the module's analog blocks
0000 ;
0000 ;-----------------------------------------------------------------------------
0000 ;
0000 ; ARGUMENTS: A:= Range Informatio
0000 ;
0000 ; RETURNS: Nothing
0000 ;
0000 ;-----------------------------------------------------------------------------
0000 ADC10_1_Start:
0000 _ADC10_1_Start:
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
or F, FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_3 )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
//Turn on Power to analog block
0000 6073 mov reg[ADC10_1_ACE_CR2],A
0002 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
0002 ; This code check to see if the Column clock should be set to SysClk Direct
0002 7110 or F, FLAG_XIO_MASK
0004 492280 tst reg[ADC10_1_CNT_OUT],80h
0007 A004 jz SkipSetClock
0009 436B04 or reg[6Bh], ((ADC10_1_ACE_CR1 - 72h)* 0fh)+ 04h
000C SkipSetClock:
000C 70EF and F, ~FLAG_XIO_MASK
000E 626411 mov reg[CMP_CR0],(((ADC10_1_ACE_CR1 -72h)/4)*11h)+11h;specify column interrupt
0011 62E611 mov reg[DEC_CR0],(((ADC10_1_ACE_CR1 -72h)/4)*11h)+11h;gate the comp1
0014
0014 62620A mov reg[PWM_CR], (PWM_High+PWM_Low)
0017 //Turn on Power to ADC Control
0017 436801 or reg[ADC10_1_ADC_CR], ADC10_1_ON
001A
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_2 )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_11b
ENDIF
ENDIF ; PGMODE LOCKED
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_10b
ENDIF
ENDIF ; PGMODE FREE
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_3 )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_11b
ENDIF
ENDIF ; PGMODE LOCKED
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_10b
ENDIF
ENDIF ; PGMODE FREE
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
001A 7F ret
001B .ENDSECTION
001B
001B .SECTION
001B ;-----------------------------------------------------------------------------
001B ; FUNCTION NAME: ADC10_1_Stop
001B ;
001B ; DESCRIPTION:
001B ; Removes power setting to the module's analog blocks.
001B ;
001B ;-----------------------------------------------------------------------------
001B ;
001B ; ARGUMENTS: None
001B ;
001B ; RETURNS: Nothing
001B ;
001B ;-----------------------------------------------------------------------------
001B ADC10_1_Stop:
001B _ADC10_1_Stop:
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
or F, FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_3 )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
//Turn off Power to analog block
001B 4173FE and reg[ADC10_1_ACE_CR2],~ADC10_1_ON
001E //Turn off Power to ADC Control
001E 4168FE and reg[ADC10_1_ADC_CR], ~ADC10_1_ON
0021 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
0021 7110 or F, FLAG_XIO_MASK
0023 492280 tst reg[ADC10_1_CNT_OUT],80h
0026 A004 jz SkipClearClock
0028 416BFB and reg[6Bh], ~(((ADC10_1_ACE_CR1 - 72h)* 0fh)+ 04h)
002B SkipClearClock:
002B 70EF and F, ~FLAG_XIO_MASK
002D ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_1 & RAM_USE_CLASS_2 )
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