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📄 matroxfb_misc.c

📁 内核linux2.4.20,可跟rtlinux3.2打补丁 组成实时linux系统,编译内核
💻 C
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/* * * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400 * * (c) 1998,1999,2000 Petr Vandrovec <vandrove@vc.cvut.cz> * * Version: 1.54 2001/09/09 * * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org> * * Contributors: "menion?" <menion@mindless.com> *                     Betatesting, fixes, ideas * *               "Kurt Garloff" <garloff@suse.de> *                     Betatesting, fixes, ideas, videomodes, videomodes timmings * *               "Tom Rini" <trini@kernel.crashing.org> *                     MTRR stuff, PPC cleanups, betatesting, fixes, ideas * *               "Bibek Sahu" <scorpio@dodds.net> *                     Access device through readb|w|l and write b|w|l *                     Extensive debugging stuff * *               "Daniel Haun" <haund@usa.net> *                     Testing, hardware cursor fixes * *               "Scott Wood" <sawst46+@pitt.edu> *                     Fixes * *               "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de> *                     Betatesting * *               "Kelly French" <targon@hazmat.com> *               "Fernando Herrera" <fherrera@eurielec.etsit.upm.es> *                     Betatesting, bug reporting * *               "Pablo Bianucci" <pbian@pccp.com.ar> *                     Fixes, ideas, betatesting * *               "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es> *                     Fixes, enhandcements, ideas, betatesting * *               "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp> *                     PPC betatesting, PPC support, backward compatibility * *               "Paul Womar" <Paul@pwomar.demon.co.uk> *               "Owen Waller" <O.Waller@ee.qub.ac.uk> *                     PPC betatesting * *               "Thomas Pornin" <pornin@bolet.ens.fr> *                     Alpha betatesting * *               "Pieter van Leuven" <pvl@iae.nl> *               "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de> *                     G100 testing * *               "H. Peter Arvin" <hpa@transmeta.com> *                     Ideas * *               "Cort Dougan" <cort@cs.nmt.edu> *                     CHRP fixes and PReP cleanup * *               "Mark Vojkovich" <mvojkovi@ucsd.edu> *                     G400 support * *               "David C. Hansen" <haveblue@us.ibm.com> *                     Fixes * * (following author is not in any relation with this code, but his code *  is included in this driver) * * Based on framebuffer driver for VBE 2.0 compliant graphic boards *     (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> * * (following author is not in any relation with this code, but his ideas *  were used when writting this driver) * *		 FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> * *//* make checkconfig does not check includes for this... */#include <linux/config.h>#include "matroxfb_misc.h"#include <linux/interrupt.h>#include <linux/matroxfb.h>void matroxfb_createcursorshape(WPMINFO struct display* p, int vmode) {	unsigned int h;	unsigned int cu, cd;	h = fontheight(p);	if (vmode & FB_VMODE_DOUBLE)		h *= 2;	cd = h;	if (cd >= 10)		cd--;	switch (ACCESS_FBINFO(cursor.type) = (p->conp->vc_cursor_type & CUR_HWMASK)) {		case CUR_NONE:				cu = cd;				break;		case CUR_UNDERLINE:				cu = cd - 2;				break;		case CUR_LOWER_THIRD:				cu = (h * 2) / 3;				break;		case CUR_LOWER_HALF:				cu = h / 2;				break;		case CUR_TWO_THIRDS:				cu = h / 3;				break;		case CUR_BLOCK:		default:				cu = 0;				cd = h;				break;	}	ACCESS_FBINFO(cursor.w) = fontwidth(p);	ACCESS_FBINFO(cursor.u) = cu;	ACCESS_FBINFO(cursor.d) = cd;}void matroxfb_DAC_out(CPMINFO int reg, int val) {	DBG_REG("outDAC");	mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);	mga_outb(M_RAMDAC_BASE+M_X_DATAREG, val);}int matroxfb_DAC_in(CPMINFO int reg) {	DBG_REG("inDAC");	mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);	return mga_inb(M_RAMDAC_BASE+M_X_DATAREG);}void matroxfb_var2my(struct fb_var_screeninfo* var, struct my_timming* mt) {	unsigned int pixclock = var->pixclock;	DBG("var2my")	if (!pixclock) pixclock = 10000;	/* 10ns = 100MHz */	mt->pixclock = 1000000000 / pixclock;	if (mt->pixclock < 1) mt->pixclock = 1;	mt->dblscan = var->vmode & FB_VMODE_DOUBLE;	mt->interlaced = var->vmode & FB_VMODE_INTERLACED;	mt->HDisplay = var->xres;	mt->HSyncStart = mt->HDisplay + var->right_margin;	mt->HSyncEnd = mt->HSyncStart + var->hsync_len;	mt->HTotal = mt->HSyncEnd + var->left_margin;	mt->VDisplay = var->yres;	mt->VSyncStart = mt->VDisplay + var->lower_margin;	mt->VSyncEnd = mt->VSyncStart + var->vsync_len;	mt->VTotal = mt->VSyncEnd + var->upper_margin;	mt->sync = var->sync;}int matroxfb_PLL_calcclock(const struct matrox_pll_features* pll, unsigned int freq, unsigned int fmax,		unsigned int* in, unsigned int* feed, unsigned int* post) {	unsigned int bestdiff = ~0;	unsigned int bestvco = 0;	unsigned int fxtal = pll->ref_freq;	unsigned int fwant;	unsigned int p;	DBG("PLL_calcclock")	fwant = freq;#ifdef DEBUG	printk(KERN_ERR "post_shift_max: %d\n", pll->post_shift_max);	printk(KERN_ERR "ref_freq: %d\n", pll->ref_freq);	printk(KERN_ERR "freq: %d\n", freq);	printk(KERN_ERR "vco_freq_min: %d\n", pll->vco_freq_min);	printk(KERN_ERR "in_div_min: %d\n", pll->in_div_min);	printk(KERN_ERR "in_div_max: %d\n", pll->in_div_max);	printk(KERN_ERR "feed_div_min: %d\n", pll->feed_div_min);	printk(KERN_ERR "feed_div_max: %d\n", pll->feed_div_max);	printk(KERN_ERR "fmax: %d\n", fmax);#endif	for (p = 1; p <= pll->post_shift_max; p++) {		if (fwant * 2 > fmax)			break;		fwant *= 2;	}	if (fwant < pll->vco_freq_min) fwant = pll->vco_freq_min;	if (fwant > fmax) fwant = fmax;	for (; p-- > 0; fwant >>= 1, bestdiff >>= 1) {		unsigned int m;		if (fwant < pll->vco_freq_min) break;		for (m = pll->in_div_min; m <= pll->in_div_max; m++) {			unsigned int diff, fvco;			unsigned int n;			n = (fwant * (m + 1) + (fxtal >> 1)) / fxtal - 1;			if (n > pll->feed_div_max)				break;			if (n < pll->feed_div_min)				n = pll->feed_div_min;			fvco = (fxtal * (n + 1)) / (m + 1);			if (fvco < fwant)				diff = fwant - fvco;			else				diff = fvco - fwant;			if (diff < bestdiff) {				bestdiff = diff;				*post = p;				*in = m;				*feed = n;				bestvco = fvco;			}		}	}	dprintk(KERN_ERR "clk: %02X %02X %02X %d %d %d\n", *in, *feed, *post, fxtal, bestvco, fwant);	return bestvco;}int matroxfb_vgaHWinit(CPMINFO struct matrox_hw_state* hw, struct my_timming* m, struct display* p) {	unsigned int hd, hs, he, hbe, ht;	unsigned int vd, vs, ve, vt;	unsigned int wd;	unsigned int divider;	int i;	int text = p->type == FB_TYPE_TEXT;	int fwidth;	if (text) {		fwidth = fontwidth(p);		if (!fwidth) fwidth = 8;	} else		fwidth = 8;	DBG("vgaHWinit")	hw->SEQ[0] = 0x00;	if (fwidth == 9)		hw->SEQ[1] = 0x00;	else		hw->SEQ[1] = 0x01;	/* or 0x09 */	hw->SEQ[2] = 0x0F;	/* bitplanes */	hw->SEQ[3] = 0x00;	if (text)		hw->SEQ[4] = 0x02;	else		hw->SEQ[4] = 0x0E;	/* CRTC 0..7, 9, 16..19, 21, 22 are reprogrammed by Matrox Millennium code... Hope that by MGA1064 too */	if (m->dblscan) {		m->VTotal <<= 1;		m->VDisplay <<= 1;		m->VSyncStart <<= 1;		m->VSyncEnd <<= 1;	}	if (m->interlaced) {		m->VTotal >>= 1;		m->VDisplay >>= 1;		m->VSyncStart >>= 1;		m->VSyncEnd >>= 1;	}	/* GCTL is ignored when not using 0xA0000 aperture */	hw->GCTL[0] = 0x00;	hw->GCTL[1] = 0x00;	hw->GCTL[2] = 0x00;	hw->GCTL[3] = 0x00;	hw->GCTL[4] = 0x00;	if (text) {		hw->GCTL[5] = 0x10;		hw->GCTL[6] = 0x02;	} else {		hw->GCTL[5] = 0x40;		hw->GCTL[6] = 0x05;	}	hw->GCTL[7] = 0x0F;	hw->GCTL[8] = 0xFF;	/* Whole ATTR is ignored in PowerGraphics mode */	for (i = 0; i < 16; i++)		hw->ATTR[i] = i;	if (text) {		hw->ATTR[16] = 0x04;	} else {		hw->ATTR[16] = 0x41;	}	hw->ATTR[17] = 0xFF;	hw->ATTR[18] = 0x0F;	if (fwidth == 9)		hw->ATTR[19] = 0x08;	else		hw->ATTR[19] = 0x00;	hw->ATTR[20] = 0x00;	if (text) {		hd = m->HDisplay / fwidth;		hs = m->HSyncStart / fwidth;		he = m->HSyncEnd / fwidth;		ht = m->HTotal / fwidth;		divider = 8;	} else {		hd = m->HDisplay >> 3;		hs = m->HSyncStart >> 3;		he = m->HSyncEnd >> 3;		ht = m->HTotal >> 3;		/* standard timmings are in 8pixels, but for interleaved we cannot */		/* do it for 4bpp (because of (4bpp >> 1(interleaved))/4 == 0) */		/* using 16 or more pixels per unit can save us */		divider = ACCESS_FBINFO(curr.final_bppShift);	}	while (divider & 3) {		hd >>= 1;		hs >>= 1;		he >>= 1;		ht >>= 1;		divider <<= 1;	}	divider = divider / 4;	/* divider can be from 1 to 8 */	while (divider > 8) {		hd <<= 1;		hs <<= 1;		he <<= 1;		ht <<= 1;		divider >>= 1;	}	hd = hd - 1;	hs = hs - 1;	he = he - 1;	ht = ht - 1;	vd = m->VDisplay - 1;	vs = m->VSyncStart - 1;

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