init.c

内核linux2.4.20,可跟rtlinux3.2打补丁 组成实时linux系统,编译内核

	/*if(HwDeviceExtension->jChipType > SIS_315H) */
	if (HwDeviceExtension->jChipType > SIS_315PRO) {
		if (!HwDeviceExtension->bIntegratedMMEnabled)
			return (FALSE);	/* alan  */
	}
#endif

	SiS_MemoryCopy (VBIOSVersion, HwDeviceExtension->szVBIOSVer, 4);

	VBIOSVersion[4] = 0x0;
	/* 09/07/99 modify by domao */

#ifdef CONFIG_FB_SIS_315
	if ((HwDeviceExtension->jChipType == SIS_315H) ||
	    (HwDeviceExtension->jChipType == SIS_315PRO) ||
	    (HwDeviceExtension->jChipType == SIS_550) ||	/* 05/02/01 ynlai for 550 */
	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
	    (HwDeviceExtension->jChipType == SIS_740))	/* 09/03/01 chiawen for 650 */
		InitTo310Pointer ();
#endif

#ifdef CONFIG_FB_SIS_300
	if ((HwDeviceExtension->jChipType == SIS_540) ||
	    (HwDeviceExtension->jChipType == SIS_630) ||
	    (HwDeviceExtension->jChipType == SIS_730) ||
	    (HwDeviceExtension->jChipType == SIS_300))
		InitTo300Pointer ();
#endif

	SiS_P3c4 = BaseAddr + 0x14;
	SiS_P3d4 = BaseAddr + 0x24;
	SiS_P3c0 = BaseAddr + 0x10;
	SiS_P3ce = BaseAddr + 0x1e;
	SiS_P3c2 = BaseAddr + 0x12;
	SiS_P3ca = BaseAddr + 0x1a;
	SiS_P3c6 = BaseAddr + 0x16;
	SiS_P3c7 = BaseAddr + 0x17;
	SiS_P3c8 = BaseAddr + 0x18;
	SiS_P3c9 = BaseAddr + 0x19;
	SiS_P3da = BaseAddr + 0x2A;
	SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
	SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
	SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
	SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
	SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
	SiS_Set_LVDS_TRUMPION (HwDeviceExtension);	/*2/29/00 by Mars Wen for LVDS and Trumpion  */

	SiS_SetReg1 (SiS_P3c4, 0x05, 0x86);	/* 1.Openkey  */

#ifdef LINUX_KERNEL
#ifdef CONFIG_FB_SIS_300	/* add to set SR14 */
	if ((HwDeviceExtension->jChipType == SIS_540) ||
	    (HwDeviceExtension->jChipType == SIS_630) ||
	    (HwDeviceExtension->jChipType == SIS_730)) {
		base = 0x80000060;
		OutPortLong (base, 0xcf8);
		temp1 = InPortLong (0xcfc);
		temp1 = temp1 >> (16 + 8 + 4);
		temp1 = temp1 & (0x07);
		temp1 = temp1 + 1;
		temp1 = 1 << temp1;
		SR14 = temp1 - 1;
		base = 0x80000064;
		OutPortLong (base, 0xcf8);
		temp1 = InPortLong (0xcfc);
		temp1 = temp1 & (0x00000020);
		if (temp1)
			SR14 = (0x10000000) | SR14;
		else
			SR14 = (0x01000000) | SR14;
	}
#endif

#ifdef CONFIG_FB_SIS_315	/* add to set SR14 */
	if ((HwDeviceExtension->jChipType == SIS_550)) {
		base = 0x80000060;
		OutPortLong (base, 0xcf8);
		temp1 = InPortLong (0xcfc);
		temp1 = temp1 >> (16 + 8 + 4);
		temp1 = temp1 & (0x07);
		temp1 = temp1 + 1;
		temp1 = 1 << temp1;
		SR14 = temp1 - 1;
		base = 0x80000064;
		OutPortLong (base, 0xcf8);
		temp1 = InPortLong (0xcfc);
		temp1 = temp1 & (0x00000020);
		if (temp1)
			SR14 = (0x10000000) | SR14;
		else
			SR14 = (0x01000000) | SR14;
	}

	if ((HwDeviceExtension->jChipType == SIS_640)
	    || (HwDeviceExtension->jChipType == SIS_740)) {
		base = 0x80000064;
		OutPortLong (base, 0xcf8);
		temp1 = InPortLong (0xcfc);
		temp1 = temp >> 4;
		temp1 = temp1 & (0x07);
		if (temp1 > 2) {
			temp = temp1;
			switch (temp) {
			case 3:
				temp1 = 0x07;
				break;
			case 4:
				temp1 = 0x0F;
				break;
			case 5:
				temp1 = 0x1F;
				break;
			case 6:
				temp1 = 0x05;
				break;
			case 7:
				temp1 = 0x17;
				break;
			case 8:
				break;
			case 9:
				break;
			}
		}
		SR14 = temp1;
		base = 0x8000007C;
		OutPortLong (base, 0xcf8);
		temp1 = InPortLong (0xcfc);
		temp1 = temp1 & (0x00000020);
		if (temp1)
			SR14 = (0x10000000) | SR14;
	}
#endif

#endif

#ifdef CONFIG_FB_SIS_300
	if ((HwDeviceExtension->jChipType == SIS_540) ||
	    (HwDeviceExtension->jChipType == SIS_630) ||
	    (HwDeviceExtension->jChipType == SIS_730)) {
		SR12 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x12);
		SR13 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x13);
		SR14 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x14);
		SR16 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x16);
		SR17 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x17);
		SR18 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x18);
		SR19 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x19);
		SR1A = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x1A);
	} else {
		SR13 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x13);
		SR14 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x14);
	}
#endif
#ifdef CONFIG_FB_SIS_315
	if ((HwDeviceExtension->jChipType == SIS_550)) {
		CR39 = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x39);
		CR3A = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3A);
		CR3B = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3B);
		CR3C = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3C);
		CR3D = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3D);
		CR3E = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3E);
		CR3F = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3F);
		CR79 = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x79);
		CR7A = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x7A);
		CR7B = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x7B);
		CR7C = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x7C);
	} else if ((HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
		   (HwDeviceExtension->jChipType == SIS_740)) {
		SR12 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x12);
		SR13 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x13);
		SR14 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x14);
		SR16 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x16);
		SR17 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x17);
		SR18 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x18);
		SR19 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x19);
		SR1A = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x1A);
	}
#endif
/* ResetExtReg begin */
	for (i = 0x06; i < 0x20; i++)
		SiS_SetReg1 (SiS_P3c4, i, 0);	/* 2.Reset Extended register */
	for (i = 0x21; i <= 0x27; i++)
		SiS_SetReg1 (SiS_P3c4, i, 0);	/*   Reset Extended register */
	for (i = 0x31; i <= 0x3D; i++)
		SiS_SetReg1 (SiS_P3c4, i, 0);

#ifdef CONFIG_FB_SIS_300H
	for (i = 0x38; i <= 0x3F; i++)
		SiS_SetReg1 (SiS_P3d4, i, 0);
#endif

#ifdef CONFIG_FB_SIS_315
	for (i = 0x37; i <= 0x3F; i++)
		SiS_SetReg1 (SiS_P3d4, i, 0);
	for (i = 0x79; i <= 0x7C; i++)
		SiS_SetReg1 (SiS_P3d4, i, 0);
#endif
/* ResetExtReg end */
#ifdef CONFIG_FB_SIS_300
	if ((HwDeviceExtension->jChipType == SIS_540) ||
	    (HwDeviceExtension->jChipType == SIS_630) ||
	    (HwDeviceExtension->jChipType == SIS_730)) {
		SiS_SetReg1 (SiS_P3c4, 0x12, SR12);
		SiS_SetReg1 (SiS_P3c4, 0x13, SR13);
		SiS_SetReg1 (SiS_P3c4, 0x14, SR14);
		SiS_SetReg1 (SiS_P3c4, 0x16, SR16);
		SiS_SetReg1 (SiS_P3c4, 0x17, SR17);
		SiS_SetReg1 (SiS_P3c4, 0x18, SR18);
		SiS_SetReg1 (SiS_P3c4, 0x19, SR19);
		SiS_SetReg1 (SiS_P3c4, 0x1A, SR1A);
	}
#endif
#ifdef CONFIG_FB_SIS_315
	if ((HwDeviceExtension->jChipType == SIS_550)) {
		SiS_SetReg1 (SiS_P3d4, 0x39, CR39);
		SiS_SetReg1 (SiS_P3d4, 0x3A, CR3A);
		SiS_SetReg1 (SiS_P3d4, 0x3B, CR3B);
		SiS_SetReg1 (SiS_P3d4, 0x3C, CR3C);
		SiS_SetReg1 (SiS_P3d4, 0x3D, CR3D);
		SiS_SetReg1 (SiS_P3d4, 0x3E, CR3E);
		SiS_SetReg1 (SiS_P3d4, 0x3F, CR3F);
		SiS_SetReg1 (SiS_P3d4, 0x79, CR79);
		SiS_SetReg1 (SiS_P3d4, 0x7A, CR7A);
		SiS_SetReg1 (SiS_P3d4, 0x7B, CR7B);
		SiS_SetReg1 (SiS_P3d4, 0x7C, CR7C);
	} else if ((HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
		   (HwDeviceExtension->jChipType == SIS_740)) {
		SiS_SetReg1 (SiS_P3c4, 0x12, SR12);
		SiS_SetReg1 (SiS_P3c4, 0x13, SR13);
		SiS_SetReg1 (SiS_P3c4, 0x14, SR14);
		SiS_SetReg1 (SiS_P3c4, 0x16, SR16);
		SiS_SetReg1 (SiS_P3c4, 0x17, SR17);
		SiS_SetReg1 (SiS_P3c4, 0x18, SR18);
		SiS_SetReg1 (SiS_P3c4, 0x19, SR19);
		SiS_SetReg1 (SiS_P3c4, 0x1A, SR1A);
	}
#endif

/* detect ExtChip Type */
	SiS_Set_LVDS_TRUMPION (HwDeviceExtension);	/*2/29/00 by Mars Wen for LVDS and Trumpion  */

#ifdef CONFIG_FB_SIS_300
	if ((HwDeviceExtension->jChipType == SIS_540) ||
	    (HwDeviceExtension->jChipType == SIS_630) ||
	    (HwDeviceExtension->jChipType == SIS_730)) {
		temp = (UCHAR) SR1A;
	} else
#endif
	{
		if ((*pSiS_SoftSetting & SoftDRAMType) == 0) {
			temp = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x3A);
		}
	}

	SiS_RAMType = temp & 0x03;
	SiS_SetMemoryClock (ROMAddr);

/* SetDefExt1Regs  begin */
	SiS_SetReg1 (SiS_P3c4, 0x07, *pSiS_SR07);
	if ((HwDeviceExtension->jChipType != SIS_540) &&
	    (HwDeviceExtension->jChipType != SIS_630) &&
	    (HwDeviceExtension->jChipType != SIS_730)) {
		for (i = 0x15; i < 0x1C; i++) {
			SiS_SetReg1 (SiS_P3c4, i,
				     SiS_SR15[i - 0x15][SiS_RAMType]);
		}
	}
#ifdef CONFIG_FB_SIS_315
	if ((HwDeviceExtension->jChipType == SIS_315H) ||
	    (HwDeviceExtension->jChipType == SIS_315PRO)) {
		for (i = 0x40; i <= 0x44; i++) {
			SiS_SetReg1 (SiS_P3d4, i,
				     SiS_CR40[i - 0x40][SiS_RAMType]);
		}
		SiS_SetReg1 (SiS_P3d4, 0x48, 0x23);
		SiS_SetReg1 (SiS_P3d4, 0x49, SiS_CR49[0]);
		/* /SiS_SetReg1(SiS_P3c4,0x25,SiS_SR25[0]);  */
	}
#endif

	SiS_SetReg1 (SiS_P3c4, 0x1F, *pSiS_SR1F);
	/*SiS_SetReg1(SiS_P3c4,0x20,0x20); */
	SiS_SetReg1 (SiS_P3c4, 0x20, 0xA0);	/* alan, 2001/6/26 Frame buffer can read/write */
	SiS_SetReg1 (SiS_P3c4, 0x23, *pSiS_SR23);
	SiS_SetReg1 (SiS_P3c4, 0x24, *pSiS_SR24);
	SiS_SetReg1 (SiS_P3c4, 0x25, SiS_SR25[0]);
#ifdef CONFIG_FB_SIS_300
	if (HwDeviceExtension->jChipType == SIS_300) {
		SiS_SetReg1 (SiS_P3c4, 0x21, 0x84);
		SiS_SetReg1 (SiS_P3c4, 0x22, 0x00);
	}
#endif
	SR11 = 0x0F;
	SiS_SetReg1 (SiS_P3c4, 0x11, SR11);

	SiS_UnLockCRT2 (HwDeviceExtension, BaseAddr);
	SiS_SetReg1 (SiS_Part1Port, 0x00, 0x00);
	SiS_SetReg1 (SiS_Part1Port, 0x02, *pSiS_CRT2Data_1_2);
#ifdef CONFIG_FB_SIS_315	/* 05/02/01 ynlai  for sis550 */
	if ((HwDeviceExtension->jChipType == SIS_315H) ||
	    (HwDeviceExtension->jChipType == SIS_315PRO) ||
	    (HwDeviceExtension->jChipType == SIS_550) ||
	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
	    (HwDeviceExtension->jChipType == SIS_740))
		/* 09/03/01 chiawen for 650 */
		SiS_SetReg1 (SiS_Part1Port, 0x2E, 0x08);	/* use VB */
#endif

	temp = *pSiS_SR32;
	if (SiS_BridgeIsOn (BaseAddr)) {
		temp = temp & 0xEF;
	}
	SiS_SetReg1 (SiS_P3c4, 0x32, temp);

#ifdef CONFIG_FB_SIS_315
	if ((HwDeviceExtension->jChipType == SIS_315H) ||
	    (HwDeviceExtension->jChipType == SIS_315PRO)) {
		HwDeviceExtension->pQueryVGAConfigSpace (HwDeviceExtension,
							 0x50, 0, &Temp);	/* Get */

		Temp >>= 20;
		Temp &= 0xF;
		if (Temp != 1) {
			SiS_SetReg1 (SiS_P3c4, 0x25, SiS_SR25[1]);
			SiS_SetReg1 (SiS_P3d4, 0x49, SiS_CR49[1]);
		}

		SiS_SetReg1 (SiS_P3c4, 0x27, 0x1F);

		SiS_SetReg1 (SiS_P3c4, 0x31, *pSiS_SR31);
		SiS_SetReg1 (SiS_P3c4, 0x32, *pSiS_SR32);
		SiS_SetReg1 (SiS_P3c4, 0x33, *pSiS_SR33);
	}
#endif

	if (SiS_BridgeIsOn (BaseAddr) == 1) {
		if (SiS_IF_DEF_LVDS == 0) {
			SiS_SetReg1 (SiS_Part2Port, 0x00, 0x1C);
			SiS_SetReg1 (SiS_Part4Port, 0x0D, *pSiS_CRT2Data_4_D);
			SiS_SetReg1 (SiS_Part4Port, 0x0E, *pSiS_CRT2Data_4_E);
			SiS_SetReg1 (SiS_Part4Port, 0x10, *pSiS_CRT2Data_4_10);
			SiS_SetReg1 (SiS_Part4Port, 0x0F, 0x3F);
		}
		SiS_LockCRT2 (HwDeviceExtension, BaseAddr);
	}
	SiS_SetReg1 (SiS_P3d4, 0x83, 0x00);
/*   SetDefExt1Regs end */

#ifdef CONFIG_FB_SIS_315
	if ((HwDeviceExtension->jChipType == SIS_315H) ||
	    (HwDeviceExtension->jChipType == SIS_315PRO)
	    ) {			/* 05/02/01 ynlai */
		/* For SiS 300,310 Chip  */
		if (HwDeviceExtension->bSkipDramSizing == TRUE) {
			SiS_SetDRAMModeRegister (ROMAddr);
			pSR = HwDeviceExtension->pSR;
			if (pSR != NULL) {
				while (pSR->jIdx != 0xFF) {
					SiS_SetReg1 (SiS_P3c4, pSR->jIdx,
						     pSR->jVal);
					pSR++;
				}
			}
		} else
			SiS_SetDRAMSize_310 (HwDeviceExtension);
	}
#endif
#ifdef CONFIG_FB_SIS_315
	if ((HwDeviceExtension->jChipType == SIS_550)) {	/* 05/02/01 ynlai For SiS 550 */
		/* SetDRAMConfig begin */
/*     SiS_SetReg1(SiS_P3c4,0x12,SR12);
       SiS_SetReg1(SiS_P3c4,0x13,SR13);
       SiS_SetReg1(SiS_P3c4,0x14,SR14);
       SiS_SetReg1(SiS_P3c4,0x16,SR16);
       SiS_SetReg1(SiS_P3c4,0x17,SR17);
       SiS_SetReg1(SiS_P3c4,0x18,SR18);
       SiS_SetReg1(SiS_P3c4,0x19,SR19);
       SiS_SetReg1(SiS_P3c4,0x1A,SR1A);   */
		/* SetDRAMConfig end */
	}
#endif
#ifdef CONFIG_FB_SIS_300
	if (HwDeviceExtension->jChipType == SIS_300) {	/* For SiS 300 Chip  */
		if (HwDeviceExtension->bSkipDramSizing == TRUE) {
/*       SiS_SetDRAMModeRegister(ROMAddr);
         temp = (HwDeviceExtension->pSR)->jVal;
         SiS_SetReg1(SiS_P3c4,0x13,temp);
         temp = (HwDeviceExtension->pSR)->jVal;
         SiS_SetReg1(SiS_P3c4,0x14,temp);   */
		} else {
#ifdef TC
			SiS_SetReg1 (SiS_P3c4, 0x13, SR13);
			SiS_SetReg1 (SiS_P3c4, 0x14, SR14);
			SiS_SetRegANDOR (SiS_P3c4, 0x15, 0xFF, 0x04);
#else
			SiS_SetDRAMSize_300 (HwDeviceExtension);
			SiS_SetDRAMSize_300 (HwDeviceExtension);
#endif
		}
	}
	if ((HwDeviceExtension->jChipType == SIS_540) ||	/* For SiS 630/540/730 Chip  */
	    (HwDeviceExtension->jChipType == SIS_630) ||
	    (HwDeviceExtension->jChipType == SIS_730)) {
		/* SetDRAMConfig begin */
/*     SiS_SetReg1(SiS_P3c4,0x12,SR12);
       SiS_SetReg1(SiS_P3c4,0x13,SR13);
       SiS_SetReg1(SiS_P3c4,0x14,SR14);
       SiS_SetReg1(SiS_P3c4,0x16,SR16);
       SiS_SetReg1(SiS_P3c4,0x17,SR17);
       SiS_SetReg1(SiS_P3c4,0x18,SR18);
       SiS_SetReg1(SiS_P3c4,0x19,SR19);
       SiS_SetReg1(SiS_P3c4,0x1A,SR1A);    */
		/* SetDRAMConfig end */
	}
/* SetDRAMSize end */
#endif

/*   SetDefExt2Regs begin  */
/* AGP=1;
   temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x3A);
   temp=temp&0x30;
   if(temp==0x30) AGP=0;
   if(AGP==0) *pSiS_SR21=*pSiS_SR21&0xEF;
   SiS_SetReg1(SiS_P3c4,0x21,*pSiS_SR21);
   if(AGP==1) *pSiS_SR22=*pSiS_SR22&0x20;
   SiS_SetReg1(SiS_P3c4,0x22,*pSiS_SR22);  */

	SiS_SetReg1 (SiS_P3c4, 0x21, *pSiS_SR21);
	SiS_SetReg1 (SiS_P3c4, 0x22, *pSiS_SR22);
/*   SetDefExt2Regs end  */

/* SiS_SetReg3(SiS_P3c6,0xff);
   SiS_ClearDAC(SiS_P3c8);        [ynlai] 05/22/01            */

	SiS_DetectMonitor (HwDeviceExtension, BaseAddr);
	SiS_GetSenseStatus (HwDeviceExtension, ROMAddr);	/* sense CRT2 */