📄 fault-armv.c
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newaddr += nr_regs; if (!LDST_U_BIT(instr)) eaddr = newaddr; if (LDST_P_EQ_U(instr)) /* U = P */ eaddr += 4; /* * This is a "hint" - we already have eaddr worked out by the * processor for us. */ if (addr != eaddr) { printk(KERN_ERR "LDMSTM: PC = %08lx, instr = %08lx, " "addr = %08lx, eaddr = %08lx\n", instruction_pointer(regs), instr, addr, eaddr); show_regs(regs); } for (regbits = REGMASK_BITS(instr), rd = 0; regbits; regbits >>= 1, rd += 1) if (regbits & 1) { if (LDST_L_BIT(instr)) get32_unaligned_check(regs->uregs[rd], eaddr); else put32_unaligned_check(regs->uregs[rd], eaddr); eaddr += 4; } if (LDST_W_BIT(instr)) regs->uregs[rn] = newaddr; if (!LDST_L_BIT(instr) || !(REGMASK_BITS(instr) & (1 << 15))) regs->ARM_pc -= correction; return TYPE_DONE;fault: regs->ARM_pc -= correction; return TYPE_FAULT;bad: printk(KERN_ERR "Alignment trap: not handling ldm with s-bit set\n"); return TYPE_ERROR;}static intdo_alignment(unsigned long addr, int error_code, struct pt_regs *regs){ union offset_union offset; unsigned long instr, instrptr; int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); unsigned int type; if (user_mode(regs)) goto user; ai_sys += 1; instrptr = instruction_pointer(regs); instr = *(unsigned long *)instrptr; regs->ARM_pc += 4; switch (CODING_BITS(instr)) { case 0x00000000: /* ldrh or strh */ if (LDSTH_I_BIT(instr)) offset.un = (instr & 0xf00) >> 4 | (instr & 15); else offset.un = regs->uregs[RM_BITS(instr)]; handler = do_alignment_ldrhstrh; break; case 0x04000000: /* ldr or str immediate */ offset.un = OFFSET_BITS(instr); handler = do_alignment_ldrstr; break; case 0x06000000: /* ldr or str register */ offset.un = regs->uregs[RM_BITS(instr)]; if (IS_SHIFT(instr)) { unsigned int shiftval = SHIFT_BITS(instr); switch(SHIFT_TYPE(instr)) { case SHIFT_LSL: offset.un <<= shiftval; break; case SHIFT_LSR: offset.un >>= shiftval; break; case SHIFT_ASR: offset.sn >>= shiftval; break; case SHIFT_RORRRX: if (shiftval == 0) { offset.un >>= 1; if (regs->ARM_cpsr & CC_C_BIT) offset.un |= 1 << 31; } else offset.un = offset.un >> shiftval | offset.un << (32 - shiftval); break; } } handler = do_alignment_ldrstr; break; case 0x08000000: /* ldm or stm */ handler = do_alignment_ldmstm; break; default: goto bad; } type = handler(addr, instr, regs); if (type == TYPE_ERROR || type == TYPE_FAULT) goto bad_or_fault; if (type == TYPE_LDST) do_alignment_finish_ldst(addr, instr, regs, offset); return 0;bad_or_fault: if (type == TYPE_ERROR) goto bad; regs->ARM_pc -= 4; /* * We got a fault - fix it up, or die. */ do_bad_area(current, current->mm, addr, error_code, regs); return 0;bad: /* * Oops, we didn't handle the instruction. */ printk(KERN_ERR "Alignment trap: not handling instruction " "%08lx at [<%08lx>]\n", instr, instrptr); ai_skipped += 1; return 1;user: set_cr(cr_no_alignment); ai_user += 1; return 0;}#else#define do_alignment NULL#endif/* * Some section permission faults need to be handled gracefully, for * instance, when they happen due to a __{get,put}_user during an oops). */static intdo_sect_fault(unsigned long addr, int error_code, struct pt_regs *regs){ struct task_struct *tsk = current; do_bad_area(tsk, tsk->active_mm, addr, error_code, regs); return 0;}/* * Hook for things that need to trap external faults. Note that * we don't guarantee that this will be the final version of the * interface. */int (*external_fault)(unsigned long addr, struct pt_regs *regs);static intdo_external_fault(unsigned long addr, int error_code, struct pt_regs *regs){ if (external_fault) return external_fault(addr, regs); return 1;}static const struct fsr_info { int (*fn)(unsigned long addr, int error_code, struct pt_regs *regs); int sig; char *name;} fsr_info[] = { { NULL, SIGSEGV, "vector exception" }, { do_alignment, SIGILL, "alignment exception" }, { NULL, SIGKILL, "terminal exception" }, { do_alignment, SIGILL, "alignment exception" }, { do_external_fault, SIGBUS, "external abort on linefetch" }, { do_translation_fault, SIGSEGV, "section translation fault" }, { do_external_fault, SIGBUS, "external abort on linefetch" }, { do_page_fault, SIGSEGV, "page translation fault" }, { do_external_fault, SIGBUS, "external abort on non-linefetch" }, { NULL, SIGSEGV, "section domain fault" }, { do_external_fault, SIGBUS, "external abort on non-linefetch" }, { NULL, SIGSEGV, "page domain fault" }, { NULL, SIGBUS, "external abort on translation" }, { do_sect_fault, SIGSEGV, "section permission fault" }, { NULL, SIGBUS, "external abort on translation" }, { do_page_fault, SIGSEGV, "page permission fault" }};/* * Currently dropped down to debug level */asmlinkage voiddo_DataAbort(unsigned long addr, int error_code, struct pt_regs *regs, int fsr){ const struct fsr_info *inf = fsr_info + (fsr & 15);#if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) || defined(CONFIG_DEBUG_ERRORS) if (addr == regs->ARM_pc) goto sa1_weirdness;#endif if (!inf->fn) goto bad; if (!inf->fn(addr, error_code, regs)) return;bad: printk(KERN_ALERT "Unhandled fault: %s (%X) at 0x%08lx\n", inf->name, fsr, addr); show_pte(current->mm, addr); force_sig(inf->sig, current); die_if_kernel("Oops", regs, 0); return;#if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) || defined(CONFIG_DEBUG_ERRORS)sa1_weirdness: if (user_mode(regs)) { static int first = 1; if (first) { printk(KERN_DEBUG "Fixing up bad data abort at %08lx\n", addr);#ifdef CONFIG_DEBUG_ERRORS show_pte(current->mm, addr);#endif } first = 0; return; } if (!inf->fn || inf->fn(addr, error_code, regs)) goto bad; return;#endif}asmlinkage voiddo_PrefetchAbort(unsigned long addr, struct pt_regs *regs){ do_translation_fault(addr, 0, regs);}/* * We take the easy way out of this problem - we make the * PTE uncacheable. However, we leave the write buffer on. */static void adjust_pte(struct vm_area_struct *vma, unsigned long address){ pgd_t *pgd; pmd_t *pmd; pte_t *pte, entry; pgd = pgd_offset(vma->vm_mm, address); if (pgd_none(*pgd)) return; if (pgd_bad(*pgd)) goto bad_pgd; pmd = pmd_offset(pgd, address); if (pmd_none(*pmd)) return; if (pmd_bad(*pmd)) goto bad_pmd; pte = pte_offset(pmd, address); entry = *pte; /* * If this page isn't present, or is already setup to * fault (ie, is old), we can safely ignore any issues. */ if (pte_present(entry) && pte_val(entry) & L_PTE_CACHEABLE) { flush_cache_page(vma, address); pte_val(entry) &= ~L_PTE_CACHEABLE; set_pte(pte, entry); flush_tlb_page(vma, address); } return;bad_pgd: pgd_ERROR(*pgd); pgd_clear(pgd); return;bad_pmd: pmd_ERROR(*pmd); pmd_clear(pmd); return;}/* * Take care of architecture specific things when placing a new PTE into * a page table, or changing an existing PTE. Basically, there are two * things that we need to take care of: * * 1. If PG_dcache_dirty is set for the page, we need to ensure * that any cache entries for the kernels virtual memory * range are written back to the page. * 2. If we have multiple shared mappings of the same space in * an object, we need to deal with the cache aliasing issues. * * Note that the page_table_lock will be held. */void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte){ struct page *page = pte_page(pte); struct vm_area_struct *mpnt; struct mm_struct *mm; unsigned long pgoff; int aliases; if (!VALID_PAGE(page) || !page->mapping) return; if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) { unsigned long kvirt = (unsigned long)page_address(page); cpu_cache_clean_invalidate_range(kvirt, kvirt + PAGE_SIZE, 0); } mm = vma->vm_mm; pgoff = (addr - vma->vm_start) >> PAGE_SHIFT; aliases = 0; /* * If we have any shared mappings that are in the same mm * space, then we need to handle them specially to maintain * cache coherency. */ for (mpnt = page->mapping->i_mmap_shared; mpnt; mpnt = mpnt->vm_next_share) { unsigned long off; /* * If this VMA is not in our MM, we can ignore it. * Note that we intentionally don't mask out the VMA * that we are fixing up. */ if (mpnt->vm_mm != mm && mpnt != vma) continue; /* * If the page isn't in this VMA, we can also ignore it. */ if (pgoff < mpnt->vm_pgoff) continue; off = pgoff - mpnt->vm_pgoff; if (off >= (mpnt->vm_end - mpnt->vm_start) >> PAGE_SHIFT) continue; /* * Ok, it is within mpnt. Fix it up. */ adjust_pte(mpnt, mpnt->vm_start + (off << PAGE_SHIFT)); aliases ++; } if (aliases) adjust_pte(vma, addr);}
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