📄 lcdlib.c
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//====================================================================
// File Name : LCDlib.c
// Function : S3C2440 LCD configuration low-level codes
// Program :
// Date : March 13, 2002
// Version : 0.0
// History
// -2410
// 0.0 : Programming start ????
// -2440
// R0.0 (20030421): Modified for 2440. -> Junon
//====================================================================
#include <stdio.h>
#include <stdlib.h>
#include "def.h"
#include "2413addr.h"
#include "lcdlib.h"
#define LCD_DEN (1<<2) //GPG2, nSS
#define LCD_DSERI (1<<12) //GPE12, SPIMOSI
#define LCD_DCLK (1<<13) //GPE13, SPICLK
#define LCD_RESET (0)
#define LCD_DEN_Lo (rGPGDAT&= ~LCD_DEN)
#define LCD_DEN_Hi (rGPGDAT |= LCD_DEN)
#define LCD_DCLK_Lo (rGPEDAT &= ~LCD_DCLK)
#define LCD_DCLK_Hi (rGPEDAT |= LCD_DCLK)
#define LCD_DSERI_Lo (rGPEDAT &= ~LCD_DSERI)
#define LCD_DSERI_Hi (rGPEDAT |= LCD_DSERI)
#define LCD_RESET_Lo (0)
#define LCD_RESET_Hi (1)
//Mono STN
U32 (*frameBuffer1Bit)[SCR_XSIZE_STN/32];
//Gray
U32 (*frameBuffer2Bit)[SCR_XSIZE_STN/16];
U32 (*frameBuffer4Bit)[SCR_XSIZE_STN/8];
//Color STN
U32 (*frameBuffer8Bit)[SCR_XSIZE_CSTN/4];
U32 (*frameBuffer12Bit)[SCR_XSIZE_CSTN/2];
U32 (*frameBuffer16Bit)[SCR_XSIZE_CSTN/2]; // for 2440A
//TFT 240320
U32 (*frameBuffer8BitTft240320)[SCR_XSIZE_TFT_240320/4];
U32 (*frameBuffer16BitTft240320)[SCR_XSIZE_TFT_240320/2];
U32 (*frameBuffer24BitTft240320)[SCR_XSIZE_TFT_240320];
//TFT 320240
U32 (*frameBuffer8BitTft320240)[SCR_XSIZE_TFT_320240/4];
U32 (*frameBuffer16BitTft320240)[SCR_XSIZE_TFT_320240/2];
U32 (*frameBuffer24BitTft320240)[SCR_XSIZE_TFT_320240];
//TFT 640480
U32 (*frameBuffer1BitTft640480)[SCR_XSIZE_TFT_640480/32];
U32 (*frameBuffer8BitTft640480)[SCR_XSIZE_TFT_640480/4];
U32 (*frameBuffer16BitTft640480)[SCR_XSIZE_TFT_640480/2];
U32 (*frameBuffer24BitTft640480)[SCR_XSIZE_TFT_640480];
//TFT 800600
U32 (*frameBuffer1BitTft800600)[SCR_XSIZE_TFT_800600/32];
U32 (*frameBuffer8BitTft800600)[SCR_XSIZE_TFT_800600/4];
U32 (*frameBuffer16BitTft800600)[SCR_XSIZE_TFT_800600/2];
void Lcd_Init(int type)
{
switch(type)
{
/* case MODE_STN_1BIT:
frameBuffer1Bit=(U32 (*)[SCR_XSIZE_STN/32])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_STN_MONO<<8)|(MVAL_USED<<7)|(1<<5)|(0<<1)|0;
// 4-bit single scan,1bpp STN,ENVID=off
rLCDCON2=(0<<24)|(LINEVAL_STN<<14)|(0<<6)|(0<<0); // It is not TFT LCD. So,.....
rLCDCON3=(WDLY_STN<<19)|(HOZVAL_STN<<8)|(LINEBLANK_MONO<<0);
rLCDCON4=(MVAL<<8)|(WLH_STN<<0);
rLCDCON5=0;
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:x,INVVFRAME:x,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer1Bit>>22)<<21)|M5D((U32)frameBuffer1Bit>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer1Bit+(SCR_XSIZE_STN*LCD_YSIZE_STN/8))>>1 );
rLCDSADDR3=(((SCR_XSIZE_STN-LCD_XSIZE_STN)/16)<<11)|(LCD_XSIZE_STN/16);
break;
case MODE_STN_2BIT:
frameBuffer2Bit=(U32 (*)[SCR_XSIZE_STN/16])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_STN_GRAY<<8)|(MVAL_USED<<7)|(1<<5)|(1<<1)|0;
// 4-bit single scan,2bpp STN,ENVID=off
rLCDCON2=(0<<24)|(LINEVAL_STN<<14)|(0<<6)|(0<<0);
rLCDCON3=(WDLY_STN<<19)|(HOZVAL_STN<<8)|(LINEBLANK_GRAY<<0);
rLCDCON4=(MVAL<<8)|(WLH_STN<<0);
rLCDCON5=0;
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:x,INVVFRAME:x,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer2Bit>>22)<<21)|M5D((U32)frameBuffer2Bit>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer2Bit+(SCR_XSIZE_STN*LCD_YSIZE_STN/4))>>1);
rLCDSADDR3=(((SCR_XSIZE_STN-LCD_XSIZE_STN)/8)<<11)|(LCD_XSIZE_STN/8);
rDITHMODE=0x0;
rBLUELUT =0xf950; // 4-Gray only
break;
case MODE_STN_4BIT:
frameBuffer4Bit=(U32 (*)[SCR_XSIZE_STN/8])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_STN_GRAY<<8)|(MVAL_USED<<7)|(1<<5)|(2<<1)|0;
// 4-bit single scan,4bpp STN,ENVID=off
rLCDCON2=(0<<24)|(LINEVAL_STN<<14)|(0<<6)|(0<<0);
rLCDCON3=(WDLY_STN<<19)|(HOZVAL_STN<<8)|(LINEBLANK_GRAY<<0);
rLCDCON4=(MVAL<<8)|(WLH_STN<<0);
rLCDCON5=0;
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:x,INVVFRAME:x,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer4Bit>>22)<<21)|M5D((U32)frameBuffer4Bit>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer4Bit+(SCR_XSIZE_STN*LCD_YSIZE_STN/2))>>1 );
rLCDSADDR3=(((SCR_XSIZE_STN-LCD_XSIZE_STN)/4)<<11)|(LCD_XSIZE_STN/4);
rDITHMODE=0x0;
break;
case MODE_CSTN_8BIT:
frameBuffer8Bit=(U32 (*)[SCR_XSIZE_CSTN/4])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_CSTN<<8)|(MVAL_USED<<7)|(2<<5)|(3<<1)|0;
// 8-bit single scan,8bpp CSTN,ENVID=off
rLCDCON2=(0<<24)|(LINEVAL_CSTN<<14)|(0<<6)|(0<<0);
rLCDCON3=(WDLY_CSTN<<19)|(HOZVAL_CSTN<<8)|(LINEBLANK_CSTN<<0);
rLCDCON4=(MVAL<<8)|(WLH_CSTN<<0);
rLCDCON5=0;
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:x,INVVFRAME:x,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer8Bit>>22)<<21 )|M5D((U32)frameBuffer8Bit>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer8Bit+(SCR_XSIZE_CSTN*LCD_YSIZE_CSTN/1))>>1 );
rLCDSADDR3=(((SCR_XSIZE_CSTN-LCD_XSIZE_CSTN)/2)<<11)|(LCD_XSIZE_CSTN/2);
rDITHMODE=0x0;
rREDLUT =0xfdb96420;
rGREENLUT=0xfdb96420;
rBLUELUT =0xfb40;
break;
case MODE_CSTN_12BIT:
frameBuffer12Bit=(U32 (*)[SCR_XSIZE_CSTN*3/8])LCDFRAMEBUFFER;
// Packed Type : The L.C.M of 12 and 32 is 96.
rLCDCON1=(CLKVAL_CSTN<<8)|(MVAL_USED<<7)|(2<<5)|(4<<1)|0;
// 8-bit single scan,12bpp CSTN,ENVID=off
rLCDCON2=(0<<24)|(LINEVAL_CSTN<<14)|(0<<6)|0;
rLCDCON3=(WDLY_CSTN<<19)|(HOZVAL_CSTN<<8)|(LINEBLANK_CSTN<<0);
rLCDCON4=(MVAL<<8)|(WLH_CSTN<<0);
rLCDCON5=0;
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:x,INVVFRAME:x,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer12Bit>>22)<<21)|M5D((U32)frameBuffer12Bit>>1);
rLCDSADDR2=M5D(((U32)frameBuffer12Bit+((SCR_XSIZE_CSTN*3/2)*LCD_YSIZE_CSTN))>>1);
rLCDSADDR3=(((SCR_XSIZE_CSTN-LCD_XSIZE_CSTN)*3/4)<<11)|(LCD_XSIZE_CSTN*3/4);
rDITHMODE=0;
break;
case MODE_CSTN_12BIT_UP: // for 2440A
frameBuffer16Bit=(U32 (*)[SCR_XSIZE_CSTN/2])LCDFRAMEBUFFER;
// Unpacked Type : 12
rLCDCON1=(CLKVAL_CSTN<<8)|(MVAL_USED<<7)|(2<<5)|(5<<1)|0;
// 8-bit single scan,16bpp CSTN,ENVID=off
rLCDCON2=(0<<24)|(LINEVAL_CSTN<<14)|(0<<6)|0;
rLCDCON3=(WDLY_CSTN<<19)|(HOZVAL_CSTN<<8)|(LINEBLANK_CSTN<<0);
rLCDCON4=(MVAL<<8)|(WLH_CSTN<<0);
rLCDCON5=0;
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:x,INVVFRAME:x,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer16Bit>>22)<<21)|M5D((U32)frameBuffer16Bit>>1);
rLCDSADDR2=M5D(((U32)frameBuffer16Bit+(SCR_XSIZE_CSTN*LCD_YSIZE_CSTN*2))>>1);
rLCDSADDR3=((SCR_XSIZE_CSTN-LCD_XSIZE_CSTN)<<11)|(LCD_XSIZE_CSTN);
rDITHMODE=0;
break;
case MODE_CSTN_16BIT: // for 2440A
frameBuffer16Bit=(U32 (*)[SCR_XSIZE_CSTN/2])LCDFRAMEBUFFER;
// Packed Type : 16.
rLCDCON1=(CLKVAL_CSTN<<8)|(MVAL_USED<<7)|(2<<5)|(6<<1)|0;
// 8-bit single scan,16bpp CSTN,ENVID=off
rLCDCON2=(0<<24)|(LINEVAL_CSTN<<14)|(0<<6)|0;
rLCDCON3=(WDLY_CSTN<<19)|(HOZVAL_CSTN<<8)|(LINEBLANK_CSTN<<0);
rLCDCON4=(MVAL<<8)|(WLH_CSTN<<0);
rLCDCON5=0;
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:x,INVVFRAME:x,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer16Bit>>22)<<21)|M5D((U32)frameBuffer16Bit>>1);
rLCDSADDR2=M5D(((U32)frameBuffer16Bit+(SCR_XSIZE_CSTN*LCD_YSIZE_CSTN*2))>>1);
rLCDSADDR3=((SCR_XSIZE_CSTN-LCD_XSIZE_CSTN)<<11)|(LCD_XSIZE_CSTN);
rDITHMODE=0;
break;
case MODE_TFT_8BIT_240320:
frameBuffer8BitTft240320=(U32 (*)[SCR_XSIZE_TFT_240320/4])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_240320<<8)|(MVAL_USED<<7)|(3<<5)|(11<<1)|0;
// TFT LCD panel,8bpp TFT,ENVID=off
rLCDCON2=(VBPD_240320<<24)|(LINEVAL_TFT_240320<<14)|(VFPD_240320<<6)|(VSPW_240320);
rLCDCON3=(HBPD_240320<<19)|(HOZVAL_TFT_240320<<8)|(HFPD_240320);
rLCDCON4=(MVAL<<8)|(HSPW_240320);
rLCDCON5=(1<<11)|(1<<9)|(1<<8); //FRM5:6:5,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer8BitTft240320>>22)<<21)|M5D((U32)frameBuffer8BitTft240320>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer8BitTft240320+(SCR_XSIZE_TFT_240320*LCD_YSIZE_TFT_240320/1))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_240320-LCD_XSIZE_TFT_240320)/2)<<11)|(LCD_XSIZE_TFT_240320/2);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_16BIT_240320:
frameBuffer16BitTft240320=(U32 (*)[SCR_XSIZE_TFT_240320/2])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_240320<<8)|(MVAL_USED<<7)|(3<<5)|(12<<1)|0;
// TFT LCD panel,12bpp TFT,ENVID=off
rLCDCON2=(VBPD_240320<<24)|(LINEVAL_TFT_240320<<14)|(VFPD_240320<<6)|(VSPW_240320);
rLCDCON3=(HBPD_240320<<19)|(HOZVAL_TFT_240320<<8)|(HFPD_240320);
rLCDCON4=(MVAL<<8)|(HSPW_240320);
rLCDCON5=(1<<11)|(1<<9)|(1<<8); //FRM5:6:5,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer16BitTft240320>>22)<<21)|M5D((U32)frameBuffer16BitTft240320>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer16BitTft240320+(SCR_XSIZE_TFT_240320*LCD_YSIZE_TFT_240320*2))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_240320-LCD_XSIZE_TFT_240320)/1)<<11)|(LCD_XSIZE_TFT_240320/1);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_24BIT_240320:
frameBuffer24BitTft240320=(U32 (*)[SCR_XSIZE_TFT_240320])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_240320<<8)|(MVAL_USED<<7)|(3<<5)|(13<<1)|0;
// TFT LCD panel,12bpp TFT,ENVID=off
rLCDCON2=(VBPD_240320<<24)|(LINEVAL_TFT_240320<<14)|(VFPD_240320<<6)|(VSPW_240320);
rLCDCON3=(HBPD_240320<<19)|(HOZVAL_TFT_240320<<8)|(HFPD_240320);
rLCDCON4=(MVAL<<8)|(HSPW_240320);
rLCDCON5=(0<12)|(1<<9)|(1<<8); //BPP24:MSB,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer24BitTft240320>>22)<<21)|M5D((U32)frameBuffer24BitTft240320>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer24BitTft240320+(SCR_XSIZE_TFT_240320*LCD_YSIZE_TFT_240320*4))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_240320-LCD_XSIZE_TFT_240320)*2)<<11)|(LCD_XSIZE_TFT_240320*2);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_1BIT_640480:
frameBuffer1BitTft640480=(U32 (*)[SCR_XSIZE_TFT_640480/32])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_640480<<8)|(MVAL_USED<<7)|(3<<5)|(8<<1)|0;
rLCDCON2=(VBPD_640480<<24)|(LINEVAL_TFT_640480<<14)|(VFPD_640480<<6)|(VSPW_640480);
rLCDCON3=(HBPD_640480<<19)|(HOZVAL_TFT_640480<<8)|(HFPD_640480);
rLCDCON4=(MVAL<<8)|(HSPW_640480);
rLCDCON5=(1<<11)|(1<<9)|(1<<8); //FRM5:6:5,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer1BitTft640480>>22)<<21)|M5D((U32)frameBuffer1BitTft640480>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer1BitTft640480+(SCR_XSIZE_TFT_640480*LCD_YSIZE_TFT_640480/8))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_640480-LCD_XSIZE_TFT_640480)/16)<<11)|(LCD_XSIZE_TFT_640480/16);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_8BIT_640480:
frameBuffer8BitTft640480=(U32 (*)[SCR_XSIZE_TFT_640480/4])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_640480<<8)|(MVAL_USED<<7)|(3<<5)|(11<<1)|0;
// TFT LCD panel,8bpp TFT,ENVID=off
rLCDCON2=(VBPD_640480<<24)|(LINEVAL_TFT_640480<<14)|(VFPD_640480<<6)|(VSPW_640480);
rLCDCON3=(HBPD_640480<<19)|(HOZVAL_TFT_640480<<8)|(HFPD_640480);
rLCDCON4=(MVAL<<8)|(HSPW_640480);
rLCDCON5=(1<<11)|(1<<9)|(1<<8); //FRM5:6:5,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer8BitTft640480>>22)<<21)|M5D((U32)frameBuffer8BitTft640480>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer8BitTft640480+(SCR_XSIZE_TFT_640480*LCD_YSIZE_TFT_640480/1))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_640480-LCD_XSIZE_TFT_640480)/2)<<11)|(LCD_XSIZE_TFT_640480/2);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_16BIT_640480:
frameBuffer16BitTft640480=(U32 (*)[SCR_XSIZE_TFT_640480/2])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_640480<<8)|(MVAL_USED<<7)|(3<<5)|(12<<1)|0;
// TFT LCD panel,16bpp TFT,ENVID=off
rLCDCON2=(VBPD_640480<<24)|(LINEVAL_TFT_640480<<14)|(VFPD_640480<<6)|(VSPW_640480);
rLCDCON3=(HBPD_640480<<19)|(HOZVAL_TFT_640480<<8)|(HFPD_640480);
rLCDCON4=(MVAL<<8)|(HSPW_640480);
rLCDCON5=(1<<11)|(1<<9)|(1<<8); //FRM5:6:5,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer16BitTft640480>>22)<<21)|M5D((U32)frameBuffer16BitTft640480>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer16BitTft640480+(SCR_XSIZE_TFT_640480*LCD_YSIZE_TFT_640480*2))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_640480-LCD_XSIZE_TFT_640480)/1)<<11)|(LCD_XSIZE_TFT_640480/1);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_24BIT_640480:
frameBuffer24BitTft640480=(U32 (*)[SCR_XSIZE_TFT_640480])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_640480<<8)|(MVAL_USED<<7)|(3<<5)|(13<<1)|0;
// TFT LCD panel,24bpp TFT,ENVID=off
rLCDCON2=(VBPD_640480<<24)|(LINEVAL_TFT_640480<<14)|(VFPD_640480<<6)|(VSPW_640480);
rLCDCON3=(HBPD_640480<<19)|(HOZVAL_TFT_640480<<8)|(HFPD_640480);
rLCDCON4=(MVAL<<8)|(HSPW_640480);
rLCDCON5=(1<<12)|(1<<9)|(1<<8); // BPP24:MSB,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer24BitTft640480>>22)<<21)|M5D((U32)frameBuffer24BitTft640480>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer24BitTft640480+(SCR_XSIZE_TFT_640480*LCD_YSIZE_TFT_640480*4))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_640480-LCD_XSIZE_TFT_640480)*2)<<11)|(LCD_XSIZE_TFT_640480*2);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_1BIT_800600:
frameBuffer1BitTft800600=(U32 (*)[SCR_XSIZE_TFT_800600/32])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_800600<<8)|(MVAL_USED<<7)|(3<<5)|(8<<1)|0;
// TFT LCD panel,1bpp TFT,ENVID=off
rLCDCON2=(VBPD_800600<<24)|(LINEVAL_TFT_800600<<14)|(VFPD_800600<<6)|(VSPW_800600);
rLCDCON3=(HBPD_800600<<19)|(HOZVAL_TFT_800600<<8)|(HFPD_800600);
rLCDCON4=(MVAL<<8)|(HSPW_800600);
rLCDCON5=(1<<9)|(1<<8);
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:o,INVVFRAME:o,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer1BitTft800600>>22)<<21)|M5D((U32)frameBuffer1BitTft800600>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer1BitTft800600+(SCR_XSIZE_TFT_800600*LCD_YSIZE_TFT_800600/8))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_800600-LCD_XSIZE_TFT_800600)/16)<<11)|(LCD_XSIZE_TFT_800600/16);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_8BIT_800600:
frameBuffer8BitTft800600=(U32 (*)[SCR_XSIZE_TFT_800600/4])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_800600<<8)|(MVAL_USED<<7)|(3<<5)|(11<<1)|0;
// TFT LCD panel,8bpp TFT,ENVID=off
rLCDCON2=(VBPD_800600<<24)|(LINEVAL_TFT_800600<<14)|(VFPD_800600<<6)|(VSPW_800600);
rLCDCON3=(HBPD_800600<<19)|(HOZVAL_TFT_800600<<8)|(HFPD_800600);
rLCDCON4=(MVAL<<8)|(HSPW_800600);
rLCDCON5=(1<<9)|(1<<8);
//BPP24BL:x,FRM565:x,INVVCLK:x,INVVLINE:o,INVVFRAME:o,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer8BitTft800600>>22)<<21)|M5D((U32)frameBuffer8BitTft800600>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer8BitTft800600+(SCR_XSIZE_TFT_800600*LCD_YSIZE_TFT_800600/1))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_800600-LCD_XSIZE_TFT_800600)/2)<<11)|(LCD_XSIZE_TFT_800600/2);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_16BIT_800600:
frameBuffer16BitTft800600=(U32 (*)[SCR_XSIZE_TFT_800600/2])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_800600<<8)|(MVAL_USED<<7)|(3<<5)|(12<<1)|0;
// TFT LCD panel,16bpp TFT,ENVID=off
rLCDCON2=(VBPD_800600<<24)|(LINEVAL_TFT_800600<<14)|(VFPD_800600<<6)|(VSPW_800600);
rLCDCON3=(HBPD_800600<<19)|(HOZVAL_TFT_800600<<8)|(HFPD_800600);
rLCDCON4=(MVAL<<8)|(HSPW_800600);
rLCDCON5=(1<<11)|(1<<10)|(1<<9)|(1<<8);
//BPP24BL:x,FRM565:o,INVVCLK:x,INVVLINE:o,INVVFRAME:o,INVVD:x,
//INVVDEN:x,INVPWREN:x,INVLEND:x,PWREN:x,ENLEND:x,BSWP:x,HWSWP:x
rLCDSADDR1=(((U32)frameBuffer16BitTft800600>>22)<<21)|M5D((U32)frameBuffer16BitTft800600>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer16BitTft800600+(SCR_XSIZE_TFT_800600*LCD_YSIZE_TFT_800600*2))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_800600-LCD_XSIZE_TFT_800600)/1)<<11)|(LCD_XSIZE_TFT_800600/1);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
break;
*/
case MODE_TFT_16BIT_240320:
frameBuffer16BitTft240320=(U32 (*)[SCR_XSIZE_TFT_240320/2])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_240320<<8)|(MVAL_USED<<7)|(3<<5)|(12<<1)|0;
// TFT LCD panel,12bpp TFT,ENVID=off
rLCDCON2=(VBPD_240320<<24)|(LINEVAL_TFT_240320<<14)|(VFPD_240320<<6)|(VSPW_240320);
rLCDCON3=(HBPD_240320<<19)|(HOZVAL_TFT_240320<<8)|(HFPD_240320);
rLCDCON4=(MVAL<<8)|(HSPW_240320);
rLCDCON5=(1<<11)|(1<<9)|(1<<8); //FRM5:6:5,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer16BitTft240320>>22)<<21)|M5D((U32)frameBuffer16BitTft240320>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer16BitTft240320+(SCR_XSIZE_TFT_240320*LCD_YSIZE_TFT_240320*2))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_240320-LCD_XSIZE_TFT_240320)/1)<<11)|(LCD_XSIZE_TFT_240320/1);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~7); // Disable LPC3600
rTPAL=0; // Disable Temp Palette
printf("x:%d|y:%d\n", SCR_XSIZE_TFT_240320, SCR_YSIZE_TFT_240320);
break;
case MODE_TFT_24BIT_320240:
frameBuffer24BitTft320240=(U32 (*)[SCR_XSIZE_TFT_320240])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_320240<<8)|(3<<5)|(13<<1)|0;
// TFT LCD panel,12bpp TFT,ENVID=off
rLCDCON2=(VBPD_320240<<24)|(LINEVAL_TFT_320240<<14)|(VFPD_320240<<6)|(VSPW_320240);
rLCDCON3=(HBPD_320240<<19)|(HOZVAL_TFT_320240<<8)|(HFPD_320240);
rLCDCON4=(MVAL<<8)|(HSPW_320240);
rLCDCON5=(0<12)|(1<<9)|(1<<8); //BPP24:MSB,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer24BitTft320240>>22)<<21)|M5D((U32)frameBuffer24BitTft320240>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer24BitTft320240+(SCR_XSIZE_TFT_320240*LCD_YSIZE_TFT_320240*4))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_320240-LCD_XSIZE_TFT_320240)*2)<<11)|(LCD_XSIZE_TFT_320240*2);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~0x1f); // Disable LPC3600, LCC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_TFT_16BIT_320240:
frameBuffer16BitTft320240=(U32 (*)[SCR_XSIZE_TFT_320240/2])LCDFRAMEBUFFER;
rLCDCON1=(CLKVAL_TFT_320240<<8)|(3<<5)|(12<<1)|0;
// TFT LCD panel,12bpp TFT,ENVID=off
rLCDCON2=(VBPD_320240<<24)|(LINEVAL_TFT_320240<<14)|(VFPD_320240<<6)|(VSPW_320240);
rLCDCON3=(HBPD_320240<<19)|(HOZVAL_TFT_320240<<8)|(HFPD_320240);
rLCDCON4=(MVAL<<8)|(HSPW_320240);
rLCDCON5=(1<<11)|(1<<9)|(1<<8); //FRM5:6:5,HSYNC and VSYNC are inverted
rLCDSADDR1=(((U32)frameBuffer16BitTft320240>>22)<<21)|M5D((U32)frameBuffer16BitTft320240>>1);
rLCDSADDR2=M5D( ((U32)frameBuffer16BitTft320240+(SCR_XSIZE_TFT_320240*LCD_YSIZE_TFT_320240*2))>>1 );
rLCDSADDR3=(((SCR_XSIZE_TFT_320240-LCD_XSIZE_TFT_320240)/1)<<11)|(LCD_XSIZE_TFT_320240/1);
rLCDINTMSK|=(3); // MASK LCD Sub Interrupt
rTCONSEL&=(~0x7); // Disable LPC3600, LCC3600
rTPAL=0; // Disable Temp Palette
break;
case MODE_CSTN_8BIT:
frameBuffer8Bit=(U32 (*)[SCR_XSIZE_CSTN/4])LCDFRAMEBUFFER;
LutSetting(MODE_CSTN_8BIT);
FrcSetting();
CstnCommonSetting();
rLCDCON1=(CLKVAL_CSTN<<8)|(0<<7)|(2<<5)|(4<<1)|0;
rLCDCON5=(1<<11)|(0);
rLCDSADDR1=0x19c00000;
rLCDSADDR2=0x9600;
//rLCDSADDR1=(((U32)frameBuffer12Bit>>22)<<21)|M5D((U32)frameBuffer12Bit>>1);
//rLCDSADDR2=M5D(((U32)frameBuffer12Bit+((LCD_XSIZE_CSTN/2)*LCD_YSIZE_CSTN))>>1);
rLCDSADDR3=(0<<11)|(LCD_XSIZE_CSTN);
break;
case MODE_CSTN_12BIT:
frameBuffer12Bit=(U32 (*)[SCR_XSIZE_CSTN/2])LCDFRAMEBUFFER;
LutSetting(MODE_CSTN_12BIT);
FrcSetting();
CstnCommonSetting();
rLCDCON1=(CLKVAL_CSTN<<8)|(0<<7)|(2<<5)|(5<<1)|0;
rLCDCON5=(1<<11)|(1);
rLCDSADDR1=0x19c00000;
rLCDSADDR2=0x12c00;
//rLCDSADDR1=(((U32)frameBuffer12Bit>>22)<<21)|M5D((U32)frameBuffer12Bit>>1);
//rLCDSADDR2=M5D(((U32)frameBuffer12Bit+((LCD_XSIZE_CSTN/2)*LCD_YSIZE_CSTN))>>1);
rLCDSADDR3=(0<<11)|(LCD_XSIZE_CSTN);
break;
case MODE_CSTN_16BIT:
frameBuffer16Bit=(U32 (*)[SCR_XSIZE_CSTN/2])LCDFRAMEBUFFER;
LutSetting(MODE_CSTN_16BIT);
FrcSetting();
CstnCommonSetting();
rLCDCON1=(CLKVAL_CSTN<<8)|(0<<7)|(2<<5)|(6<<1)|0;
rLCDCON5=(1<<11)|(1);
rLCDSADDR1=0x19c00000;
rLCDSADDR2=0x12c00;
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