t_mmu.s

GM8120 linux driver.

;/*************************************************************************
;   Copyright ARM Limited 1998 - 2000.  All rights reserved.
;**************************************************************************/

	SUBT	MMU setup support > PLAT/initmmu.s
	; -----------------------------------------------------------------
	; This file contains basic system initialization for the MMU/MPU
	; for uHAL applications and Angel.
	; It is expected that this file is included in target.s.
	;
	; $Revision: 1.1.1.1 $
	;	$Author: bruce $
	;	$Date: 2002/12/06 05:23:02 $
	;
	; The only 'target-specific' part of these macros are the labels
	; uHAL_AddressTable & uHAL_MappingTable, which are uHAL 'must-haves'
	; and so not really very specific :-)
	;
	; -----------------------------------------------------------------

  
 IF :DEF: OPT
	ASSERT	(listopts_s)
old_opt SETA	{OPT}
	OPT	(opt_off)	; disable listing of include files
 ENDIF

	; -----------------------------------------------------------------



	; -----------------------------------------------------------------
	; SETUPMMU
	; -------
	; Setup the memory map world for the target. This macro is called
	; by INITMMU from ANGEL if required; or by uHAL when a standalone
	; program uses the mmu.  It invokes BUILD_PGTABLE to build the
	; page tables from information stored in uHAL_MappingTable and
	; uHAL_AddressTable.
	;
	; Level 1 entries always address 1MB each. The CPU takes the MB
	;	portion of the required address and uses it as an offset
	;	into the table. If the entry has bit 0 == 1, it looks in
	;	the level 2 table.
	; Level 2 entries can address 4KB or 1KB each. If using 64KB
	;	entries, each page table entry must be duplicated 16 times
	;	(in consecutive memory locations) in a Large level 2 table.
	; In this implementation, Fine tables _must_ be 1KB entries and
	; Large tables _only_ support 64KB entries.
	;
	; IN:	$size:	value passed as $tmp2 to BUILD_PGTABLE

	MACRO
$label  SETUPMMU	$tmp1, $size, $tmp2, $tmp3, $tmp4, $tmp5, $offset


 IF :LNOT: :DEF: uHAL_AddressTable
	IMPORT	uHAL_AddressTable
 ENDIF

 IF :LNOT: :DEF: uHAL_MappingTable
	IMPORT	uHAL_MappingTable
 ENDIF

	; Scan for MPU and set up if found
	;CHECK_FOR_MPU	$tmp1
	;beq	%FT1

	; Here lies the MPU memory map for this board. Use it with the
	; offset between physical & virtual TTBs to build a valid page
	; table. To use default memory size, pass in RAM size of zero

	;ldr	$tmp5, =uHAL_MappingTable
	;ldr	$offset, =0
	;SETUP_MPU	$tmp1, $size, $tmp2, $tmp3, $tmp4, $tmp5, $offset

1
	; Scan for MMU and set up if found
	;CHECK_FOR_MMU	$tmp1
	;beq	%FT2

	; Build a page table from the information stored in 
	; uHAL_AddressTable, and memory size specified in $size
	; (0 for default size).
	
	ldr	$tmp5, =uHAL_AddressTable
	ldr	$offset, =0

	BUILD_PGTABLE	$tmp1, $size, $tmp2, $tmp3, $tmp4, $tmp5, $offset

	; If we are running from unmapped ROM at 0, we will need to do 
	; some shuffling in order to map RAM to 0.  If we are already
	; running from RAM, or the MMU is already in use, assume the
	; new page table can be installed without difficulty.

	RDMMU_STATE	$tmp1		;Read the MMU state
	LDR	$tmp2, =EnableMMU
	TST	$tmp1, $tmp2		;Already active?
	BNE	%F91			;Yes, just use the new table

             ; ------------------------------------------------------------------
        ; Not executing from ROM - Setup the domain and TTB for final table
        ; ------------------------------------------------------------------
91
	LDR	$tmp2, =1
	LDR	$tmp1, =Level1tab	;TTB address is 2^14 aligned
	ADD	$tmp1, $tmp1, $offset
        WRMMU_DAControl	$tmp2		;Initialise Domain Access Control
	WRMMU_TTBase	$tmp1		;Initialise Translation Table Base reg.
	RDMMU_STATE	$tmp2
	ORR	$tmp2, $tmp2, #1 + 4	;Turn on MMU and D Cache
	ORR	$tmp2, $tmp2, #0x1000	;Turn on I Cache
      WRMMU_STATE	$tmp2		;Write to MMU control register.
	
	


	; -----------------------------------------------------------------
	; Flush everything and get ready to turn on the MMU

94
	WRMMU_FlushTB		$tmp1	;Flush TB 
	WRCACHE_FlushIDC	$tmp1	;Flush the Caches 

	NOP				;Make sure that the pipe is empty
	NOP
	NOP

2

	MEND


	; -----------------------------------------------------------------
	; ANGEL INITMMU macro, calls the core SETUPMMU macro if
	; the MMU is enabled and then sets ICache, DCache & WBuffer as
	; required. On certain system where the target does not have a MMU,
	; then this macro is almost (but not quite) a NOP.

	MACRO
$label  INITMMU	 $tmp1, $tmp2, $tmp3, $tmp4, $tmp5, $tmp6

	; ANGEL calls this macro too late for us to do anything
	; useful... all the MMU initialisation is done when
	; STARTUPCODE (t_angel.s) calls INIT_RAM (t_memory.s).
	
	MEND


 

	; -----------------------------------------------------------------
	END	; EOF initmmu.s