dispatchunit.h

ppc750 system design simulator using system c

	sc_in<tag_t> inIntegerResultTag[nIntegerUnit];				/* tag of the result */
	sc_in<UInt32> inIntegerResultData[nIntegerUnit];			/* value of the result */
	
	sc_in<bool> inIntegerResultCRValid[nIntegerUnit];			/* true if the integer unit produce a CR field */
	sc_in<tag_t> inIntegerResultCRTag[nIntegerUnit];			/* tag of the CR field */
	sc_in<UInt8> inIntegerResultCRData[nIntegerUnit];			/* value of the CR field */
	
	/* Floating Point Units results (forwarded) */
	sc_in<bool> inFloatingPointResultValid[nFloatingPointUnits];	/* true if the floating point unit produce a result */
	sc_in<tag_t> inFloatingPointResultTag[nFloatingPointUnits];		/* tag of the result */
	sc_in<UInt64> inFloatingPointResultData[nFloatingPointUnits];	/* value of the result */
	
	sc_in<bool> inFloatingPointResultCRValid[nFloatingPointUnits];	/* true if the floating point unit produce a CR field */
	sc_in<tag_t> inFloatingPointResultCRTag[nFloatingPointUnits];	/* tag of the CR field */
	sc_in<UInt8> inFloatingPointResultCRData[nFloatingPointUnits];	/* value of the CR field */
	
	/* Load/Store Unit results (forwarded) */
	sc_in<bool> inLoadStoreResultValid[2];							/* true if the load/store unit produce an integer result */
	sc_in<bool> inLoadStoreFloatingPointResultValid;				/* true if the load/store unit produce a floating point result */
	sc_in<tag_t> inLoadStoreResultTag[2];							/* tag of the result (first is for the value read from memory, second is for the EA) */
	sc_in<UInt32> inLoadStoreResultData[2];							/* value of the result (first is the value read from memory, second is the EA) */
	sc_in<UInt64> inLoadStoreFloatingPointResultData;				/* value of the floating point result (read from memory) */
	
	/* Branch Unit results (forwarded) */
	sc_in<bool> inBranchResultLRValid;								/* true if branch unit produce a LR value */
	sc_in<tag_t> inBranchResultLRTag;								/* tag of the LR value */
	sc_in<UInt32> inBranchResultLRData;								/* the LR value */
	
	sc_in<bool> inBranchResultCTRValid;								/* true if branch unit produce a CTR value */
	sc_in<tag_t> inBranchResultCTRTag;								/* tag of the CTR value */
	sc_in<UInt32> inBranchResultCTRData;							/* the CTR value */
	
	/* System Register Unit results */
	sc_in<bool> inSystemRegisterResultValid;						/* true if system register unit produce a result */
	sc_in<tag_t> inSystemRegisterResultTag;							/* tag of the result */
	sc_in<UInt32> inSystemRegisterResultData;						/* value of the result */
	
	sc_in<bool> inSystemRegisterResultLRValid;						/* true if system register unit produce a LR value */
	sc_in<tag_t> inSystemRegisterResultLRTag;						/* tag of the LR value */
	sc_in<UInt32> inSystemRegisterResultLRData;						/* the LR value */
	
	sc_in<bool> inSystemRegisterResultCTRValid;						/* true if system register unit produce a CTR value */
	sc_in<tag_t> inSystemRegisterResultCTRTag;						/* tag of the CTR value */
	sc_in<UInt32> inSystemRegisterResultCTRData;					/* the CTR value */
	
	sc_in<bool> inSystemRegisterResultCRValid;						/* true if system register unit produce a CR field */
	sc_in<tag_t> inSystemRegisterResultCRTag;						/* tag of the CR field */
	sc_in<UInt8> inSystemRegisterResultCRData;						/* value of the CR field */
	
	/* From Completion Unit */
	sc_in<bool> inIntegerExecute[nIntegerUnit];						/* true if an integer execution serialized instruction is the oldest into the processor */
	sc_in<tag_t> inIntegerExecuteTag[nIntegerUnit];					/* tag of the instruction */
	sc_in<bool> inFloatingPointExecute[nFloatingPointUnits];		/* true if a floating point execution serialized instruction is the oldest into the processor */
	sc_in<tag_t> inFloatingPointExecuteTag[nFloatingPointUnits];	/* tag of the instruction */
	sc_in<bool> inSystemRegisterExecute;							/* true if a system register unit execution serialized instruction is the oldest into the processor */
	sc_in<tag_t> inSystemRegisterExecuteTag;						/* tag of the instruction */
	
	sc_in<bool> inClearInterlock;									/* true if the interlock bit hqs to be cleared */
	
	/* From Data Cache */
	sc_in<bool> inDCacheBusy;										/* true if data cache is not busy */
	
	/* From Load/Store Unit */
	sc_in<bool> inLoadStoreEmpty;									/* true if the load/store unit is empty (no being executing a load/store instruction) */
	
	/* To Completion Unit */
	sc_out<Dummy<bool> > outFinish;									/* To wake up the finish process */
	
	/* From Completion Unit */
	sc_in<Dummy<bool> > inDecode;									/* To wake up the decode process */

	
	
	
	
	
	
	/* Internal variables */

	int nDecodedInstructions;				/* Number of instructions decoded by the decode process */
	int nInstructionsToDispatch;			/* Number of instructions to dispatch */
	bool interlock;							/* Interlock bit. If it set no more instructions are decoded until it is cleared */
	
	/* Reservation stations */
	IntegerRSQueue integerRSQueue[nIntegerUnit];
	LoadStoreRSQueue loadStoreRSQueue;
	BranchRSQueue branchRSQueue;
	SystemRegisterRSQueue systemRegisterRSQueue;
	FloatingPointRSQueue floatingPointRSQueue[nFloatingPointUnits];
	
	/* if a value is being read from register file then it is >= 0 (this is the register or rename buffer number) else it is -1 */
	int integerReadingRegisters[nIQ + nIQBranchs][2];
	int floatingPointReadingFloatingPointRegisters[nIQ + nIQBranchs][3];
	int loadStoreReadingRegisters[nIQ + nIQBranchs][3];
	int loadStoreReadingFloatingPointRegister[nIQ + nIQBranchs];
	int integerReadingRenameBuffers[nIQ + nIQBranchs][2];
	int floatingPointReadingFloatingPointRenameBuffers[nIQ + nIQBranchs][3];
	int branchReadingRenameCR[nIQ + nIQBranchs];
	int branchReadingCR[nIQ + nIQBranchs];
	int loadStoreReadingRenameBuffers[nIQ + nIQBranchs][3];
	int loadStoreReadingFloatingPointRenameBuffer[nIQ + nIQBranchs];
	int branchReadingLR[nIQ + nIQBranchs];
	int branchReadingRenameLR[nIQ + nIQBranchs];
	int branchReadingCTR[nIQ + nIQBranchs];
	int branchReadingRenameCTR[nIQ + nIQBranchs];
	
	/* Reservation stations corresponding to the last decoded instructions */
	union
	{
		IntegerRS *integer;
		LoadStoreRS *loadStore;
		BranchRS *branch;
		SystemRegisterRS *systemRegister;
		FloatingPointRS *floatingPoint;
	} rs[nIQ + nIQBranchs];
	
	DecodedInstruction decodedInstructions[nIQ + nIQBranchs];	/* decoded instructions */
	UnitIdent units[nIQ + nIQBranchs];	/* unit ident of the last decoded instructions */
	int branchCounter;					/* number of branch instructions that the current instruction bein decoded depends on */
	RegistersBinding *registersBinding;	/* Registers binding which defines how registers have been renamed */
	ReorderBuffer *rob;					/* Reorder buffer */
	bool branchFollow;
	
	void Decode();
	void Dispatch();
	
	
	void DecodeInstruction(UInt32 instructionWord, DecodedInstruction& decodedInstruction);
	int GetLessLoadedIntegerRSQueue(int ic);
	int GetLessLoadedFloatingPointRSQueue();
	IntegerRS *AllocateIntegerRS(int ic);
	FloatingPointRS *AllocateFloatingPointRS();
	LoadStoreRS *AllocateLoadStoreRS();
	BranchRS *AllocateBranchRS();
	SystemRegisterRS *AllocateSystemRegisterRS();
	int AllocateRS(int i);
	void UpdateRS();
	void DispatchInstructions();
	int CheckResources(int nInstructions);
	void Flush();
	void DecrementBranchCounter();
	
	DispatchUnit(const sc_module_name& name, ReorderBuffer *rob, RegistersBinding *registersBinding);
	
	void Reset();
	void FlushAll();
};

#endif