dsp28_sci.c

TMS2812实现Ｕ盘ＦＡＴ文件系统Ｃ代码

//
//      TMDX ALPHA RELEASE
//      Intended for product evaluation purposes
//
//###########################################################################
//
// FILE:	DSP28_Sci.c
//
// TITLE:	DSP28 SCI Initialization & Support Functions.
//
//###########################################################################
//
//  Ver | dd mmm yyyy | Who  | Description of changes
// =====|=============|======|===============================================
//  0.55| 06 May 2002 | L.H. | EzDSP Alpha Release
//  0.56| 20 May 2002 | L.H. | No change
//  0.57| 27 May 2002 | L.H. | No change
//###########################################################################

#include "DSP28_Device.h"

//---------------------------------------------------------------------------
// InitSCI: 
//---------------------------------------------------------------------------
// This function initializes the SPI(s) to a known state.
//
void InitSci(void)
{
	// Initialize SCI-A:
	EALLOW;
	GpioMuxRegs.GPFMUX.all = 0x0030;	
	EDIS;

	SciaRegs.SCIFFTX.all =0xa000;
    SciaRegs.SCIFFRX.all =0x2018;
    SciaRegs.SCIFFCT.all =0x00;
	SciaRegs.SCIPRI.bit.FREE = 1;
	SciaRegs.SCIPRI.bit.SOFT = 1;
	
	/* loopback disable  8 bit data */
	SciaRegs.SCICCR.all = 0x07;	// 1 bit stop, disable parity, idle mode, 8 bits data 
	
	SciaRegs.SCICTL1.all = 0x03; // enable TX 
    SciaRegs.SCICTL2.bit.TXINTENA =0;
    SciaRegs.SCICTL2.bit.RXBKINTENA =1;
	
//	SciaRegs.SCICTL2.all = 0x03; //
	
	SciaRegs.SCIHBAUD = 0x00;
	SciaRegs.SCILBAUD = 0xA2;  //f3 a2	
     
	SciaRegs.SCICTL1.all = 0x23;
	
	PieCtrl.PIEIER9.bit.INTx1 = 1;
	PieCtrl.PIEIER9.bit.INTx2 = 1;
	
	//tbd...

	// Initialize SCI-B:

	//tbd...
}

/********************************************************************************
	name:	int SciaTx_Ready(void)
	input:	none
	output:	i	1:	ready
			0:	busy
*********************************************************************************/

int SciaTx_Ready(void)
{
	unsigned int i;
	i = SciaRegs.SCICTL2.bit.TXRDY; 
	return(i);
}

/********************************************************************************
	name:	int SciaRx_Ready(void)
	input:	none
	output:	i	1:	new data
			0:	none
*********************************************************************************/

int SciaRx_Ready(void)
{
	unsigned int i;
	if(SciaRegs.SCIRXST.bit.RXRDY == 1)
	{
		i = 1;
	}
	else
	{
		i = 0;
	}
	return(i);
}


// Test 1,SCIA  DLB, 8-bit word, baud rate 0x000F, default, 1 STOP bit, no parity 
void scia_loopback_init()
{    
    // Note: Clocks were turned on to the SCIA peripheral
    // in the InitSysCtrl() function
    
 	SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback 
                                   // No parity,8 char bits,
                                   // async mode, idle-line protocol
	SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK, 
                                   // Disable RX ERR, SLEEP, TXWAKE
	SciaRegs.SCICTL2.all =0x0003; 
	SciaRegs.SCICTL2.bit.TXINTENA =1;
	SciaRegs.SCICTL2.bit.RXBKINTENA =1;
    SciaRegs.SCIHBAUD    =0x0000;
    SciaRegs.SCILBAUD    =0xA2;
	SciaRegs.SCICCR.bit.LOOPBKENA =0; // Enable loop back  
	SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset 
}
// Initalize the SCI FIFO
void scia_fifo_init()										
{
    SciaRegs.SCIFFTX.all=0xE040;
    SciaRegs.SCIFFRX.all=0x204f;
    SciaRegs.SCIFFCT.all=0x0;
    
}  
	
//===========================================================================
// No more.
//===========================================================================