📄 can_ex1.cod
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00000590 1412 ASR R2,R2,#0x10
00000592 1C10 MOV R0,R2
00000594 3001 ADD R0,#0x1
00000596 1040 ASR R0,R0,#0x1
00000598 4FC9 LDR R7,[R15,#804] ; PoolRef @0x8C0 ; CAN_ext_cnt
0000059A 883F LDRH R7,[R7,#0x0] ; CAN_ext_cnt
0000059C 043F LSL R7,R7,#0x10
0000059E 143F ASR R7,R7,#0x10
000005A0 19C0 ADD R0,R7
000005A2 4FC8 LDR R7,[R15,#800] ; PoolRef @0x8C4
000005A4 42B8 CMP R0,R7
000005A6 DB01 BLT L_26 ; T=0x000005AC
353: return CAN_OBJECTS_FULL_ERROR;
000005A8 2005 MOV R0,#0x5
000005AA E17F B L_27 ; T=0x000008AC
000005AC L_26:
357: ptrcan_af->AFMR = 0x00000001;
000005AC 2701 MOV R7,#0x1
000005AE 9800 LDR R0,[R13,#0x0] ; ptrcan_af
000005B0 6007 STR R7,[R0,#0x0]
360: if (CAN_std_cnt == 0 && CAN_ext_cnt == 0) {
000005B2 1C10 MOV R0,R2
000005B4 2800 CMP R0,#0x0
000005B6 D111 BNE L_28 ; T=0x000005DC
000005B8 48C1 LDR R0,[R15,#772] ; PoolRef @0x8C0 ; CAN_ext_cnt
000005BA 8800 LDRH R0,[R0,#0x0] ; CAN_ext_cnt
000005BC 0400 LSL R0,R0,#0x10
000005BE 1400 ASR R0,R0,#0x10
000005C0 2800 CMP R0,#0x0
000005C2 D10B BNE L_28 ; T=0x000005DC
361: ptrcan_afram->mask[0] = 0xF7FF0000; /* For std identifier pairing */
000005C4 4AC0 LDR R2,[R15,#768] ; PoolRef @0x8C8
000005C6 1C08 MOV R0,R1 ; ptrcan_afram
000005C8 6002 STR R2,[R0,#0x0] ; ptrcan_afram
362: ptrcan_afram->mask[1] = 0xFFFFFFFF; /* For ext identifier sorting */
000005CA 48C0 LDR R0,[R15,#768] ; PoolRef @0x8CC
000005CC 1C0A MOV R2,R1 ; ptrcan_afram
000005CE 6050 STR R0,[R2,#0x4]
363: CAN_std_cnt = 1;
000005D0 2201 MOV R2,#0x1
000005D2 48BA LDR R0,[R15,#744] ; PoolRef @0x8BC ; CAN_std_cnt
000005D4 8002 STRH R2,[R0,#0x0] ; CAN_std_cnt
364: CAN_ext_cnt = 1;
000005D6 2201 MOV R2,#0x1
000005D8 48B9 LDR R0,[R15,#740] ; PoolRef @0x8C0 ; CAN_ext_cnt
000005DA 8002 STRH R2,[R0,#0x0] ; CAN_ext_cnt
365: }
000005DC L_28:
367: if (format == STANDARD_FORMAT) { /* Add mask for standard identifiers */
LARM LINKER/LOCATER V2.32a 03/15/2007 08:58:24 PAGE 18
000005DC 9804 LDR R0,[R13,#0x10] ; format
000005DE 2800 CMP R0,#0x0
000005E0 D000 BNE $+4
000005E2 E0E0 B L_29 ; T=0x000007A6
368: id |= ctrl << 13; /* Add controller number */
000005E4 1C28 MOV R0,R5 ; ctrl
000005E6 0340 LSL R0,R0,#0xD ; ctrl
000005E8 4306 ORR R6,R0
369: id &= 0x0000F7FF; /* Mask out 16-bits of ID */
000005EA 48B9 LDR R0,[R15,#740] ; PoolRef @0x8D0
000005EC 4006 AND R6,R0
371: cnt1 = 0;
000005EE 2400 MOV R4,#0x0
372: bound1 = (CAN_std_cnt + 1) >> 1; /* "x >> 1" = "x / 2" */
000005F0 48B2 LDR R0,[R15,#712] ; PoolRef @0x8BC ; CAN_std_cnt
000005F2 8800 LDRH R0,[R0,#0x0] ; CAN_std_cnt
000005F4 0400 LSL R0,R0,#0x10
000005F6 1400 ASR R0,R0,#0x10
000005F8 3001 ADD R0,#0x1
000005FA 1040 ASR R0,R0,#0x1
000005FC 9003 STR R0,[R13,#0xC] ; bound1
373: while (cnt1 < bound1) { /* Loop through standard existing masks */
000005FE E021 B L_30 ; T=0x00000644
00000600 L_32:
374: if ((ptrcan_afram->mask[cnt1] >> 16) > id) {
00000600 1C20 MOV R0,R4 ; cnt1
00000602 0400 LSL R0,R0,#0x10 ; cnt1
00000604 1400 ASR R0,R0,#0x10
00000606 0087 LSL R7,R0,#0x2
00000608 1C0A MOV R2,R1 ; ptrcan_afram
0000060A 59D7 LDR R7,[R2,R7]
0000060C 0C3F LSR R7,R7,#0x10
0000060E 1C32 MOV R2,R6 ; id
00000610 4297 CMP R7,R2 ; id
00000612 D902 BLS L_34 ; T=0x0000061A
375: cnt2 = cnt1 * 2;
00000614 0040 LSL R0,R0,#0x1
00000616 9002 STR R0,[R13,#0x8] ; cnt2
376: break;
00000618 E01D B L_31 ; T=0x00000656
377: }
0000061A L_34:
378: if ((ptrcan_afram->mask[cnt1] & 0x0000F7FF) > id) {
0000061A 1C20 MOV R0,R4 ; cnt1
0000061C 0402 LSL R2,R0,#0x10 ; cnt1
0000061E 1412 ASR R2,R2,#0x10
00000620 0092 LSL R2,R2,#0x2
00000622 1C08 MOV R0,R1 ; ptrcan_afram
00000624 5880 LDR R0,[R0,R2]
00000626 4AAA LDR R2,[R15,#680] ; PoolRef @0x8D0
00000628 4010 AND R0,R2
0000062A 1C32 MOV R2,R6 ; id
0000062C 4290 CMP R0,R2 ; id
0000062E D906 BLS L_35 ; T=0x0000063E
379: cnt2 = cnt1 * 2 + 1;
00000630 1C20 MOV R0,R4 ; cnt1
00000632 0400 LSL R0,R0,#0x10 ; cnt1
00000634 1400 ASR R0,R0,#0x10
00000636 0040 LSL R0,R0,#0x1
00000638 3001 ADD R0,#0x1
0000063A 9002 STR R0,[R13,#0x8] ; cnt2
380: break;
0000063C E00B B L_31 ; T=0x00000656
381: }
0000063E L_35:
LARM LINKER/LOCATER V2.32a 03/15/2007 08:58:24 PAGE 19
382: cnt1++; /* cnt1 = U32 where to insert new mask */
0000063E 3401 ADD R4,#0x1
00000640 0424 LSL R4,R4,#0x10
00000642 1424 ASR R4,R4,#0x10
383: } /* cnt2 = U16 where to insert new mask */
00000644 L_30:
00000644 9803 LDR R0,[R13,#0xC] ; bound1
00000646 0400 LSL R0,R0,#0x10
00000648 1400 ASR R0,R0,#0x10
0000064A 1C02 MOV R2,R0
0000064C 1C20 MOV R0,R4 ; cnt1
0000064E 0400 LSL R0,R0,#0x10 ; cnt1
00000650 1400 ASR R0,R0,#0x10
00000652 4290 CMP R0,R2
00000654 DBD4 BLT L_32 ; T=0x00000600
00000656 L_31:
385: buf0 = ptrcan_afram->mask[cnt1]; /* Remember current entry */
00000656 1C20 MOV R0,R4 ; cnt1
00000658 0402 LSL R2,R0,#0x10 ; cnt1
0000065A 1412 ASR R2,R2,#0x10
0000065C 0092 LSL R2,R2,#0x2
0000065E 1C08 MOV R0,R1 ; ptrcan_afram
00000660 5883 LDR R3,[R0,R2]
387: if ((cnt2 & 0x0001) == 0) { /* Insert new mask to even address */
00000662 9802 LDR R0,[R13,#0x8] ; cnt2
00000664 0400 LSL R0,R0,#0x10
00000666 1400 ASR R0,R0,#0x10
00000668 2201 MOV R2,#0x1
0000066A 4210 TST R0,R2
0000066C D106 BNE L_36 ; T=0x0000067C
388: buf1 = id << 16 | buf0 >> 16;
0000066E 1C1F MOV R7,R3 ; buf0
00000670 0C3F LSR R7,R7,#0x10 ; buf0
00000672 1C30 MOV R0,R6 ; id
00000674 0400 LSL R0,R0,#0x10 ; id
00000676 4338 ORR R0,R7
00000678 9001 STR R0,[R13,#0x4] ; buf1
389: } else { /* Insert new mask to odd address */
0000067A E005 B L_37 ; T=0x00000688
0000067C L_36:
390: buf1 = buf0 & 0xF7FF0000 | id;
0000067C 1C18 MOV R0,R3 ; buf0
0000067E 4A92 LDR R2,[R15,#584] ; PoolRef @0x8C8
00000680 4010 AND R0,R2
00000682 1C32 MOV R2,R6 ; id
00000684 4310 ORR R0,R2 ; id
00000686 9001 STR R0,[R13,#0x4] ; buf1
391: }
00000688 L_37:
392: ptrcan_afram->mask[cnt1] = buf1; /* Insert mask */
00000688 9801 LDR R0,[R13,#0x4] ; buf1
0000068A 1C22 MOV R2,R4 ; cnt1
0000068C 0417 LSL R7,R2,#0x10 ; cnt1
0000068E 143F ASR R7,R7,#0x10
00000690 00BF LSL R7,R7,#0x2
00000692 1C0A MOV R2,R1 ; ptrcan_afram
00000694 51D0 STR R0,[R2,R7]
394: CAN_std_cnt++;
00000696 4889 LDR R0,[R15,#548] ; PoolRef @0x8BC ; CAN_std_cnt
00000698 8802 LDRH R2,[R0,#0x0] ; CAN_std_cnt
0000069A 0412 LSL R2,R2,#0x10
0000069C 1412 ASR R2,R2,#0x10
0000069E 3201 ADD R2,#0x1
000006A0 8002 STRH R2,[R0,#0x0] ; CAN_std_cnt
397: if ((CAN_std_cnt & 0x0001) == 0) {
LARM LINKER/LOCATER V2.32a 03/15/2007 08:58:24 PAGE 20
000006A2 4886 LDR R0,[R15,#536] ; PoolRef @0x8BC ; CAN_std_cnt
000006A4 8800 LDRH R0,[R0,#0x0] ; CAN_std_cnt
000006A6 0400 LSL R0,R0,#0x10
000006A8 1400 ASR R0,R0,#0x10
000006AA 1C02 MOV R2,R0
000006AC 2701 MOV R7,#0x1
000006AE 423A TST R2,R7
000006B0 D128 BNE L_38 ; T=0x00000704
398: bound1 = CAN_std_cnt - 2;
000006B2 3802 SUB R0,#0x2
000006B4 9003 STR R0,[R13,#0xC] ; bound1
400: while (cnt2 < bound1) {
000006B6 E01B B L_39 ; T=0x000006F0
000006B8 L_41:
401: cnt1++;
000006B8 3401 ADD R4,#0x1
000006BA 0424 LSL R4,R4,#0x10
000006BC 1424 ASR R4,R4,#0x10
402: cnt2++;
000006BE 9802 LDR R0,[R13,#0x8] ; cnt2
000006C0 0400 LSL R0,R0,#0x10
000006C2 1400 ASR R0,R0,#0x10
000006C4 3001 ADD R0,#0x1
000006C6 9002 STR R0,[R13,#0x8] ; cnt2
403: cnt2++;
000006C8 9802 LDR R0,[R13,#0x8] ; cnt2
000006CA 0400 LSL R0,R0,#0x10
000006CC 1400 ASR R0,R0,#0x10
000006CE 3001 ADD R0,#0x1
000006D0 9002 STR R0,[R13,#0x8] ; cnt2
404: buf1 = ptrcan_afram->mask[cnt1];
000006D2 1C20 MOV R0,R4 ; cnt1
000006D4 0402 LSL R2,R0,#0x10 ; cnt1
000006D6 1412 ASR R2,R2,#0x10
000006D8 0097 LSL R7,R2,#0x2
000006DA 1C08 MOV R0,R1 ; ptrcan_afram
000006DC 59C0 LDR R0,[R0,R7]
000006DE 9001 STR R0,[R13,#0x4] ; buf1
405: ptrcan_afram->mask[cnt1] = buf1 >> 16 | buf0 << 16;
000006E0 041B LSL R3,R3,#0x10 ; buf0
000006E2 9801 LDR R0,[R13,#0x4] ; buf1
000006E4 0C00 LSR R0,R0,#0x10
000006E6 4318 ORR R0,R3
000006E8 0093 LSL R3,R2,#0x2
000006EA 1C0A MOV R2,R1 ; ptrcan_afram
000006EC 50D0 STR R0,[R2,R3]
406: buf0 = buf1;
000006EE 9B01 LDR R3,[R13,#0x4] ; buf1
407: }
000006F0 L_39:
000006F0 9803 LDR R0,[R13,#0xC] ; bound1
000006F2 0400 LSL R0,R0,#0x10
000006F4 1400 ASR R0,R0,#0x10
000006F6 1C02 MOV R2,R0
000006F8 9802 LDR R0,[R13,#0x8] ; cnt2
000006FA 0400 LSL R0,R0,#0x10
000006FC 1400 ASR R0,R0,#0x10
000006FE 4290 CMP R0,R2
00000700 DBDA BLT L_41 ; T=0x000006B8
408: } else { /* Odd number of standard masks */
00000702 E0AB B L_52 ; T=0x0000085C
00000704 L_38:
409: bound1 = CAN_std_cnt;
00000704 486D LDR R0,[R15,#436] ; PoolRef @0x8BC ; CAN_std_cnt
00000706 8800 LDRH R0,[R0,#0x0] ; CAN_std_cnt
LARM LINKER/LOCATER V2.32a 03/15/2007 08:58:24 PAGE 21
00000708 0400 LSL R0,R0,#0x10
0000070A 1400 ASR R0,R0,#0x10
0000070C 9003 STR R0,[R13,#0xC] ; bound1
411: while (cnt2 < bound1) {
0000070E E01B B L_44 ; T=0x00000748
00000710 L_46:
412: cnt1++;
00000710 3401 ADD R4,#0x1
00000712 0424 LSL R4,R4,#0x10
00000714 1424 ASR R4,R4,#0x10
413: cnt2++;
00000716 9802 LDR R0,[R13,#0x8] ; cnt2
00000718 0400 LSL R0,R0,#0x10
0000071A 1400 ASR R0,R0,#0x10
0000071C 3001 ADD R0,#0x1
0000071E 9002 STR R0,[R13,#0x8] ; cnt2
414: cnt2++;
00000720 9802 LDR R0,[R13,#0x8] ; cnt2
00000722 0400 LSL R0,R0,#0x10
00000724 1400 ASR R0,R0,#0x10
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