📄 can_hw.lst
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499 * and starts the transmission on controller 1
500 *
501 * Parameter: none
502 *
503 * Return: none
504 *---------------------------------------------------------------------------*/
505
506 static void CAN_TX1_ISR (void) __irq {
507 1 CAN_msg *ptrmsg;
508 1 U32 temp;
509 1
510 1 /* Check if hardware is not beeing written to */
511 1 if (wr_to_CAN_hw[0] == 0) {
512 2
513 2 /* If there is message in mailbox ready for send,
514 2 read the message from mailbox and send it */
515 2 if (isr_mbx_receive (MBX_tx_ctrl[0], &ptrmsg) != OS_R_OK) {
516 3 CAN_hw_wr (1, ptrmsg);
517 3 _free_box(CAN_mpool, ptrmsg);
518 3 }
519 2 }
520 1
ARM COMPILER V2.32a, CAN_hw 15/03/07 08:58:24 PAGE 9
521 1 /* Read from interrupt register to acknowledge interrupt */
522 1 temp = ptrCAN1->CANICR;
523 1 VICVectAddr = 0xFFFFFFFF; /* Acknowledge Interrupt */
524 1 }
525
526
527 /*--------------------------- CAN_RX1_ISR -----------------------------------
528 *
529 * CAN receive interrupt function, for CAN controller 1
530 * Reads message from hardware registers and puts it into receive mailbox
531 * for controller 1
532 *
533 * Parameter: none
534 *
535 * Return: none
536 *---------------------------------------------------------------------------*/
537
538 static void CAN_RX1_ISR (void) __irq {
539 1 CAN_msg *ptrmsg;
540 1
541 1 /* If mailbox isn't full read message from hardware and send it to message queue */
542 1 if (os_mbx_check (MBX_rx_ctrl[0]) > 0) {
543 2 ptrmsg = _alloc_box (CAN_mpool);
544 2 CAN_hw_rd (1, ptrmsg);
545 2 isr_mbx_send (MBX_rx_ctrl[0], ptrmsg);
546 2 }
547 1
548 1 ptrCAN1->CANCMR = 0x04; /* Release receive buffer */
549 1 VICVectAddr = 0xFFFFFFFF; /* Acknowledge interrupt */
550 1 }
551
552 #endif
553
554
555 #if USE_CAN_CTRL2 == 1
556
557 /*--------------------------- CAN_TX2_ISR ----------------------------------
558 *
559 * CAN transmit interrupt function for controller 2
560 * If there are messages in mailbox for transmit it writes it to hardware
561 * and starts the transmission on controller 2
562 *
563 * Parameter: none
564 *
565 * Return: none
566 *---------------------------------------------------------------------------*/
567
568 static void CAN_TX2_ISR (void) __irq {
569 1 CAN_msg *ptrmsg;
570 1 U32 temp;
571 1
572 1 /* Check if hardware is not beeing written to */
573 1 if (wr_to_CAN_hw[1] == 0) {
574 2
575 2 /* If there is message in mailbox ready for send,
576 2 read the message from mailbox and send it */
577 2 if (isr_mbx_receive (MBX_tx_ctrl[1], &ptrmsg) != OS_R_OK) {
578 3 CAN_hw_wr (2, ptrmsg);
579 3 _free_box(CAN_mpool, ptrmsg);
580 3 }
581 2 }
582 1
583 1 /* Read from interrupt register to acknowledge interrupt */
584 1 temp = ptrCAN2->CANICR;
585 1 VICVectAddr = 0xFFFFFFFF; /* Acknowledge Interrupt */
586 1 }
ARM COMPILER V2.32a, CAN_hw 15/03/07 08:58:24 PAGE 10
587
588
589 /*--------------------------- CAN_RX2_ISR -----------------------------------
590 *
591 * CAN receive interrupt function, for CAN controller 2
592 * Reads message from hardware registers and puts it into receive mailbox
593 * for controller 2
594 *
595 * Parameter: none
596 *
597 * Return: none
598 *---------------------------------------------------------------------------*/
599
600 static void CAN_RX2_ISR (void) __irq {
601 1 CAN_msg *ptrmsg;
602 1
603 1 /* If mailbox isn't full read message from hardware and send it to message queue */
604 1 if (os_mbx_check (MBX_rx_ctrl[1]) > 0) {
605 2 ptrmsg = _alloc_box (CAN_mpool);
606 2 CAN_hw_rd (2, ptrmsg);
607 2 isr_mbx_send (MBX_rx_ctrl[1], ptrmsg);
608 2 }
609 1
610 1 ptrCAN2->CANCMR = 0x04; /* Release receive buffer */
611 1 VICVectAddr = 0xFFFFFFFF; /* Acknowledge interrupt */
612 1 }
613
614 #endif
615
616
617 #if USE_CAN_CTRL3 == 1
/*--------------------------- CAN_TX3_ISR ----------------------------------
*
* CAN transmit interrupt function for controller 3
* If there are messages in mailbox for transmit it writes it to hardware
* and starts the transmission on controller 3
*
* Parameter: none
*
* Return: none
*---------------------------------------------------------------------------*/
static void CAN_TX3_ISR (void) __irq {
CAN_msg *ptrmsg;
U32 temp;
/* Check if hardware is not beeing written to */
if (wr_to_CAN_hw[2] == 0) {
/* If there is message in mailbox ready for send,
read the message from mailbox and send it */
if (isr_mbx_receive (MBX_tx_ctrl[2], &ptrmsg) != OS_R_OK) {
CAN_hw_wr (3, ptrmsg);
_free_box(CAN_mpool, ptrmsg);
}
}
/* Read from interrupt register to acknowledge interrupt */
temp = ptrCAN3->CANICR;
VICVectAddr = 0xFFFFFFFF; /* Acknowledge Interrupt */
}
/*--------------------------- CAN_RX3_ISR -----------------------------------
*
ARM COMPILER V2.32a, CAN_hw 15/03/07 08:58:24 PAGE 11
* CAN receive interrupt function, for CAN controller 3
* Reads message from hardware registers and puts it into receive mailbox
* for controller 3
*
* Parameter: none
*
* Return: none
*---------------------------------------------------------------------------*/
static void CAN_RX3_ISR (void) __irq {
CAN_msg *ptrmsg;
/* If mailbox isn't full read message from hardware and send it to message queue */
if (os_mbx_check (MBX_rx_ctrl[2]) > 0) {
ptrmsg = _alloc_box (CAN_mpool);
CAN_hw_rd (3, ptrmsg);
isr_mbx_send (MBX_rx_ctrl[2], ptrmsg);
}
ptrCAN3->CANCMR = 0x04; /* Release receive buffer */
VICVectAddr = 0xFFFFFFFF; /* Acknowledge interrupt */
}
#endif
677
678
679 #if USE_CAN_CTRL4 == 1
/*--------------------------- CAN_TX4_ISR ----------------------------------
*
* CAN transmit interrupt function for controller 4
* If there are messages in mailbox for transmit it writes it to hardware
* and starts the transmission on controller 4
*
* Parameter: none
*
* Return: none
*---------------------------------------------------------------------------*/
static void CAN_TX4_ISR (void) __irq {
CAN_msg *ptrmsg;
U32 temp;
/* Check if hardware is not beeing written to */
if (wr_to_CAN_hw[3] == 0) {
/* If there is message in mailbox ready for send,
read the message from mailbox and send it */
if (isr_mbx_receive (MBX_tx_ctrl[3], &ptrmsg) != OS_R_OK) {
CAN_hw_wr (4, ptrmsg);
_free_box(CAN_mpool, ptrmsg);
}
}
/* Read from interrupt register to acknowledge interrupt */
temp = ptrCAN4->CANICR;
VICVectAddr = 0xFFFFFFFF; /* Acknowledge Interrupt */
}
/*--------------------------- CAN_RX4_ISR -----------------------------------
*
* CAN receive interrupt function, for CAN controller 4
* Reads message from hardware registers and puts it into receive mailbox
* for controller 4
*
ARM COMPILER V2.32a, CAN_hw 15/03/07 08:58:24 PAGE 12
* Parameter: none
*
* Return: none
*---------------------------------------------------------------------------*/
static void CAN_RX4_ISR (void) __irq {
CAN_msg *ptrmsg;
/* If mailbox isn't full read message from hardware and send it to message queue */
if (os_mbx_check (MBX_rx_ctrl[3]) > 0) {
ptrmsg = _alloc_box (CAN_mpool);
CAN_hw_rd (4, ptrmsg);
isr_mbx_send (MBX_rx_ctrl[3], ptrmsg);
}
ptrCAN4->CANCMR = 0x04; /* Release receive buffer */
VICVectAddr = 0xFFFFFFFF; /* Acknowledge interrupt */
}
#endif
739
740
741 /*----------------------------------------------------------------------------
742 * end of file
743 *---------------------------------------------------------------------------*/
744
ARM COMPILER V2.32a, CAN_hw 15/03/07 08:58:24 PAGE 13
ASSEMBLY LISTING OF GENERATED OBJECT CODE
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