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📄 zdhw.c

📁 ZD1211LnxDrv_2_3_1_0無線網卡ZD1211
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}	
#endif

#define SET_IF_SYNTHESIZER(macp, InputValue)       \
{                                                     \
	mFILL_WRITE_REGISTER( ZD_CR244, (U8) ((InputValue & 0xff0000)>>16));               \
	mFILL_WRITE_REGISTER( ZD_CR243, (U8) ((InputValue & 0xff00) >> 8));      \
	mFILL_WRITE_REGISTER( ZD_CR242, (U8) ((InputValue & 0xff)));   \
}             
#define mFILL_WRITE_REGISTER(addr0, value0) \
{                                           \
    WriteAddr[WriteIndex] = addr0;          \
    WriteData[WriteIndex ++] = value0;      \
}


#ifndef HOST_IF_USB
void
HW_Set_IF_Synthesizer(zd_80211Obj_t *pObj, U32 InputValue)
{
	U32	S_bit_cnt;
	U32 tmpvalue;
	void *reg = pObj->reg;
	int i;

	
	S_bit_cnt = pObj->S_bit_cnt;

	InputValue = InputValue << (31 - S_bit_cnt);
	
#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )	
	pObj->SetReg(reg, ZD_LE2, 0);
	pObj->SetReg(reg, ZD_RF_IF_CLK, 0);
	
	while(S_bit_cnt){
		InputValue = InputValue << 1;
		if (InputValue & 0x80000000){
			pObj->SetReg(reg, ZD_RF_IF_DATA, 1);
		}
		else{
			pObj->SetReg(reg, ZD_RF_IF_DATA, 0);
		}
		pObj->SetReg(reg, ZD_RF_IF_CLK, 1);
		//pObj->DelayUs(50);
		pObj->SetReg(reg, ZD_RF_IF_CLK, 0);

		//pObj->DelayUs(50);
		S_bit_cnt --;
	}
	
	pObj->SetReg(reg, ZD_LE2, 1);
	
	if (pObj->S_bit_cnt == 20){			//Is it Intersil's chipset
		pObj->SetReg(reg, ZD_LE2, 0);
	}
	return;
#else
	LockPhyReg(pObj);
	tmpvalue = pObj->GetReg(reg, ZD_CR203);
	tmpvalue &= ~BIT_1;
	pObj->SetReg(reg, ZD_CR203, tmpvalue);

	tmpvalue = pObj->GetReg(reg, ZD_CR240);
	tmpvalue = 0x80;
	if (tmpvalue & BIT_7){		// Configure RF by Software
		tmpvalue = pObj->GetReg(reg, ZD_CR203);
		tmpvalue &= ~BIT_2;
		pObj->SetReg(reg, ZD_CR203, tmpvalue);


		while(S_bit_cnt){
			InputValue = InputValue << 1;
			if (InputValue & 0x80000000){
				tmpvalue = pObj->GetReg(reg, ZD_CR203);
				tmpvalue |= BIT_3;
				pObj->SetReg(reg, ZD_CR203, tmpvalue);
			}
			else{
				tmpvalue = pObj->GetReg(reg, ZD_CR203);
				tmpvalue &= ~BIT_3;
				pObj->SetReg(reg, ZD_CR203, tmpvalue);
			}

			tmpvalue = pObj->GetReg(reg, ZD_CR203);
			tmpvalue |= BIT_2;
			pObj->SetReg(reg, ZD_CR203, tmpvalue);

			tmpvalue = pObj->GetReg(reg, ZD_CR203);

			tmpvalue &= ~BIT_2;
			pObj->SetReg(reg, ZD_CR203, tmpvalue);
			S_bit_cnt --;
		}
	}
	else{		// Configure RF by Hardware
		// Make Bit-reverse to meet hardware requirement.
		tmpvalue = 0;
		for (i=0; i<S_bit_cnt; i++){
			InputValue = InputValue << 1;
			if (InputValue & 0x80000000){
				tmpvalue |= (0x1 << i);
			}
		}
		InputValue = tmpvalue;

		// Setup Command-Length
		// wait until command-queue is available
		tmpvalue = pObj->GetReg(reg, ZD_CR241);
		while(tmpvalue & BIT_0){
			pObj->DelayUs(1);
			FPRINT("Command-Queue busy...");
		}

		// write command (from high-byte to low-byte)
		pObj->SetReg(reg, ZD_CR245, InputValue >> 24);
		pObj->SetReg(reg, ZD_CR244, InputValue >> 16);
		pObj->SetReg(reg, ZD_CR243, InputValue >> 8);
		pObj->SetReg(reg, ZD_CR242, InputValue);
	}
	

	tmpvalue = pObj->GetReg(reg, ZD_CR203);
	tmpvalue |= BIT_1;
	pObj->SetReg(reg, ZD_CR203, tmpvalue);

	if (pObj->S_bit_cnt == 20){			//Is it Intersil's chipset
		tmpvalue = pObj->GetReg(reg, ZD_CR203);
		tmpvalue &= ~BIT_1;
		pObj->SetReg(reg, ZD_CR203, tmpvalue);
	}
	
	UnLockPhyReg(pObj);
	return;	
#endif	
}
#endif


void
LockPhyReg(zd_80211Obj_t *pObj)
{
#ifndef fQuickPhySet

	void *reg = pObj->reg;
	U32	tmpvalue;
	
	tmpvalue = pObj->GetReg(reg, ZD_CtlReg1);
	tmpvalue &= ~0x80;
	pObj->SetReg(reg, ZD_CtlReg1, tmpvalue);
#endif	
}


void
UnLockPhyReg(zd_80211Obj_t *pObj)
{
#ifndef fQuickPhySet	
	void *reg = pObj->reg;
	U32	tmpvalue;

	tmpvalue = pObj->GetReg(reg, ZD_CtlReg1);
	tmpvalue |= 0x80;
	pObj->SetReg(reg, ZD_CtlReg1, tmpvalue);
#endif	
}


void
HW_Set_Maxim_New_Chips(zd_80211Obj_t *pObj, U32 ChannelNo, U8 InitChOnly)
{
	void *reg = pObj->reg;
	U32 tmpvalue;
	
	LockPhyReg(pObj);
	
#ifdef HOST_IF_USB
	pObj->SetReg(reg, ZD_CR23, 0x40);
	pObj->SetReg(reg, ZD_CR15, 0x20);
	pObj->SetReg(reg, ZD_CR28, 0x3e);
	pObj->SetReg(reg, ZD_CR29, 0x00);
	pObj->SetReg(reg, ZD_CR26, 0x11);
	pObj->SetReg(reg, ZD_CR44, 0x33);
	pObj->SetReg(reg, ZD_CR106, 0x2a);
	pObj->SetReg(reg, ZD_CR107, 0x1a);

	pObj->SetReg(reg, ZD_CR109, 0x2b);
	pObj->SetReg(reg, ZD_CR110, 0x2b);
	pObj->SetReg(reg, ZD_CR111, 0x2b);
	pObj->SetReg(reg, ZD_CR112, 0x2b);
	pObj->SetReg(reg, ZD_CR10, 0x89);
	pObj->SetReg(reg, ZD_CR17, 0x20);
	pObj->SetReg(reg, ZD_CR26, 0x93);
	pObj->SetReg(reg, ZD_CR34, 0x30);
	pObj->SetReg(reg, ZD_CR35, 0x40);
	pObj->SetReg(reg, ZD_CR41, 0x24);
	pObj->SetReg(reg, ZD_CR44, 0x32);
	pObj->SetReg(reg, ZD_CR46, 0x90);
	pObj->SetReg(reg, ZD_CR89, 0x18);
	pObj->SetReg(reg, ZD_CR92, 0x0a);

	pObj->SetReg(reg, ZD_CR101, 0x13);
	pObj->SetReg(reg, ZD_CR102, 0x27);
	pObj->SetReg(reg, ZD_CR106, 0x20);
	pObj->SetReg(reg, ZD_CR107, 0x24);
	pObj->SetReg(reg, ZD_CR109, 0x09);
	pObj->SetReg(reg, ZD_CR110, 0x13);
	pObj->SetReg(reg, ZD_CR111, 0x13);
	pObj->SetReg(reg, ZD_CR112, 0x13);
	pObj->SetReg(reg, ZD_CR113, 0x27);
	pObj->SetReg(reg, ZD_CR114, 0x27);
	pObj->SetReg(reg, ZD_CR115, 0x24);
	pObj->SetReg(reg, ZD_CR116, 0x24);
	pObj->SetReg(reg, ZD_CR117, 0xf4);
	pObj->SetReg(reg, ZD_CR118, 0xfa);
	pObj->SetReg(reg, ZD_CR120, 0x4f);
	pObj->SetReg(reg, ZD_CR121, 0x77);
	pObj->SetReg(reg, ZD_CR122, 0xfe);
#else	
	pObj->SetReg(reg, ZD_CR23, 0x40);
	pObj->SetReg(reg, ZD_CR15, 0x20);
	pObj->SetReg(reg, ZD_CR28, 0x3e);
	pObj->SetReg(reg, ZD_CR29, 0x00);
	pObj->SetReg(reg, ZD_CR26, 0x11);
	pObj->SetReg(reg, ZD_CR44, 0x34); //4112
	pObj->SetReg(reg, ZD_CR106, 0x2a);
	pObj->SetReg(reg, ZD_CR107, 0x1a);
	pObj->SetReg(reg, ZD_CR109, 0x2b);
	pObj->SetReg(reg, ZD_CR110, 0x2b);
	pObj->SetReg(reg, ZD_CR111, 0x2b);
	pObj->SetReg(reg, ZD_CR112, 0x2b);
	
#if (defined(GCCK) && defined(OFDM))
	pObj->SetReg(reg, ZD_CR10, 0x89);
	pObj->SetReg(reg, ZD_CR17, 0x20);
	pObj->SetReg(reg, ZD_CR26, 0x93);
	pObj->SetReg(reg, ZD_CR34, 0x30);
	pObj->SetReg(reg, ZD_CR35, 0x40);

	pObj->SetReg(reg, ZD_CR41, 0x24);
	pObj->SetReg(reg, ZD_CR44, 0x32);
	pObj->SetReg(reg, ZD_CR46, 0x90);
	pObj->SetReg(reg, ZD_CR89, 0x18);
	pObj->SetReg(reg, ZD_CR92, 0x0a);
	pObj->SetReg(reg, ZD_CR101, 0x13);
	pObj->SetReg(reg, ZD_CR102, 0x27);
	pObj->SetReg(reg, ZD_CR106, 0x20);
	pObj->SetReg(reg, ZD_CR107, 0x24);
	//pObj->SetReg(reg, ZD_CR109, 0x09);
	//pObj->SetReg(reg, ZD_CR110, 0x13);
	//pObj->SetReg(reg, ZD_CR111, 0x13);




	pObj->SetReg(reg, ZD_CR109, 0x13); //4326	
	pObj->SetReg(reg, ZD_CR110, 0x27); //4326
	pObj->SetReg(reg, ZD_CR111, 0x27); //4326
	pObj->SetReg(reg, ZD_CR112, 0x13);
	pObj->SetReg(reg, ZD_CR113, 0x27);
	pObj->SetReg(reg, ZD_CR114, 0x27);
	pObj->SetReg(reg, ZD_CR115, 0x24);
	pObj->SetReg(reg, ZD_CR116, 0x24);
	pObj->SetReg(reg, ZD_CR117, 0xf4);
	//pObj->SetReg(reg, ZD_CR118, 0xfa);
	pObj->SetReg(reg, ZD_CR118, 0x00); //4326
	pObj->SetReg(reg, ZD_CR120, 0x4f);
	//pObj->SetReg(reg, ZD_CR121, 0x77); //3n12
	//pObj->SetReg(reg, ZD_CR121, 0x13); //3d24
	pObj->SetReg(reg, ZD_CR121, 0x06); //4326
	pObj->SetReg(reg, ZD_CR122, 0xfe);
	pObj->SetReg(reg, ZD_CR150, 0x0d); //4407
	
#elif (defined(ECCK_60_5))	
	pObj->SetReg(reg, ZD_CR26, 0x91);
	pObj->SetReg(reg, ZD_CR47, 0x18);
	pObj->SetReg(reg, ZD_CR106, 0x44);
	pObj->SetReg(reg, ZD_CR107, 0x00);
	pObj->SetReg(reg, ZD_CR14, 0x80);
	pObj->SetReg(reg, ZD_CR10, 0x89);
	pObj->SetReg(reg, ZD_CR11, 0x00);
	pObj->SetReg(reg, ZD_CR24, 0x0e);
	pObj->SetReg(reg, ZD_CR41, 0x24);
	pObj->SetReg(reg, ZD_CR159, 0x93);
	pObj->SetReg(reg, ZD_CR160, 0xfc);
	pObj->SetReg(reg, ZD_CR161, 0x1e);
	pObj->SetReg(reg, ZD_CR162, 0x24);
#endif
#endif
	
	pObj->CR122Flag = 2;
	pObj->CR31Flag = 2;
	
	//UnLockPhyReg(pObj);

#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )
	pObj->SetReg(reg, ZD_PE1_PE2, 0x02);
#else	
	//LockPhyReg(pObj);
	tmpvalue = pObj->GetReg(reg, ZD_CR203);
	tmpvalue &= ~BIT_4;
	pObj->SetReg(reg, ZD_CR203, tmpvalue);
	//UnLockPhyReg(pObj);
#endif

	HW_Set_IF_Synthesizer(pObj, M2827BF[ChannelNo]);
	HW_Set_IF_Synthesizer(pObj, M2827BN[ChannelNo]);
	HW_Set_IF_Synthesizer(pObj, 0x00400);
	HW_Set_IF_Synthesizer(pObj, 0x00ca1);
	HW_Set_IF_Synthesizer(pObj, 0x10072);
	HW_Set_IF_Synthesizer(pObj, 0x18645);
	HW_Set_IF_Synthesizer(pObj, 0x04006);
	HW_Set_IF_Synthesizer(pObj, 0x000a7);
	HW_Set_IF_Synthesizer(pObj, 0x08258);
	HW_Set_IF_Synthesizer(pObj, 0x03fc9);
	HW_Set_IF_Synthesizer(pObj, 0x0040a);
	HW_Set_IF_Synthesizer(pObj, 0x0000b);
	HW_Set_IF_Synthesizer(pObj, 0x0026c);
#if	defined(ECCK_60_5)
	HW_Set_IF_Synthesizer(pObj, 0x04258);
#endif	
	
#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )
	pObj->SetReg(reg, ZD_PE1_PE2, 0x03);
#else	
	//LockPhyReg(pObj);
	tmpvalue = pObj->GetReg(reg, ZD_CR203);
	tmpvalue |= BIT_4;

	pObj->SetReg(reg, ZD_CR203, tmpvalue);;
	//UnLockPhyReg(pObj);
#endif

    UnLockPhyReg(pObj);
}



void
HW_Set_Maxim_New_Chips2(zd_80211Obj_t *pObj, U32 ChannelNo, U8 InitChOnly)
{
	void *reg = pObj->reg;
	U32	tmpvalue;

	// Get Phy-Config permission
	LockPhyReg(pObj);

#ifdef HOST_IF_USB	
	pObj->SetReg(reg, ZD_CR23, 0x40);
	pObj->SetReg(reg, ZD_CR15, 0x20);
	pObj->SetReg(reg, ZD_CR28, 0x3e);
	pObj->SetReg(reg, ZD_CR29, 0x00);
	pObj->SetReg(reg, ZD_CR26, 0x11);
	pObj->SetReg(reg, ZD_CR44, 0x33);
	pObj->SetReg(reg, ZD_CR106, 0x2a);
	pObj->SetReg(reg, ZD_CR107, 0x1a);
	pObj->SetReg(reg, ZD_CR109, 0x2b);
	pObj->SetReg(reg, ZD_CR110, 0x2b);
	pObj->SetReg(reg, ZD_CR111, 0x2b);
	pObj->SetReg(reg, ZD_CR112, 0x2b);
	pObj->SetReg(reg, ZD_CR10, 0x89);
	pObj->SetReg(reg, ZD_CR17, 0x20);
	pObj->SetReg(reg, ZD_CR26, 0x93);
	pObj->SetReg(reg, ZD_CR34, 0x30);
	pObj->SetReg(reg, ZD_CR35, 0x40);
	pObj->SetReg(reg, ZD_CR41, 0x24);
	pObj->SetReg(reg, ZD_CR44, 0x32);
	pObj->SetReg(reg, ZD_CR46, 0x90);
	pObj->SetReg(reg, ZD_CR89, 0x18);
	pObj->SetReg(reg, ZD_CR92, 0x0a);
	pObj->SetReg(reg, ZD_CR101, 0x13);
	pObj->SetReg(reg, ZD_CR102, 0x27);
	pObj->SetReg(reg, ZD_CR106, 0x20);
	pObj->SetReg(reg, ZD_CR107, 0x24);
	pObj->SetReg(reg, ZD_CR109, 0x09);
	pObj->SetReg(reg, ZD_CR110, 0x13);
	pObj->SetReg(reg, ZD_CR111, 0x13);
	pObj->SetReg(reg, ZD_CR112, 0x13);
	pObj->SetReg(reg, ZD_CR113, 0x27);
	pObj->SetReg(reg, ZD_CR114, 0x27);
	pObj->SetReg(reg, ZD_CR115, 0x24);
	pObj->SetReg(reg, ZD_CR116, 0x24);

	pObj->SetReg(reg, ZD_CR117, 0xf4);
	pObj->SetReg(reg, ZD_CR118, 0xfa);
	pObj->SetReg(reg, ZD_CR120, 0x4f);
	
	pObj->SetReg(reg, ZD_CR121, 0x77);
	

	pObj->SetReg(reg, ZD_CR122, 0xfe);
	
#else	
	pObj->SetReg(reg, ZD_CR23, 0x40);
	pObj->SetReg(reg, ZD_CR15, 0x20);
	pObj->SetReg(reg, ZD_CR28, 0x3e);
	pObj->SetReg(reg, ZD_CR29, 0x00);
	pObj->SetReg(reg, ZD_CR26, 0x11);
	pObj->SetReg(reg, ZD_CR44, 0x33);
	pObj->SetReg(reg, ZD_CR106, 0x2a);
	pObj->SetReg(reg, ZD_CR107, 0x1a);
	pObj->SetReg(reg, ZD_CR109, 0x2b);
	pObj->SetReg(reg, ZD_CR110, 0x2b);
	pObj->SetReg(reg, ZD_CR111, 0x2b);
	pObj->SetReg(reg, ZD_CR112, 0x2b);
	
#if (defined(GCCK) && defined(OFDM))
	pObj->SetReg(reg, ZD_CR10, 0x89);
	pObj->SetReg(reg, ZD_CR17, 0x20);
	pObj->SetReg(reg, ZD_CR26, 0x93);
	pObj->SetReg(reg, ZD_CR34, 0x30);
	pObj->SetReg(reg, ZD_CR35, 0x40);
	pObj->SetReg(reg, ZD_CR41, 0x24);
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