📄 28f.c
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#include "config.h"#include "machine.h"#include "mtd/mtd.h"#include "mtd/map.h"#include "io.h"#include "printk.h"#include "time.h"#ifdef CONFIG_MTD_SMC#include "mtd/nand.h"#include "heap.h"#endif#include <types.h>#include <errno.h>
#define FAST_ROM_PROGRAM 1
#define TARGET_ADDR_28F320 0x10000000
//#define readb(addr) *(volatile unsigned char *)(addr)//#define readw(addr) *(volatile unsigned short *)(addr)//#define readl(addr) *(volatile unsigned int *)(addr)//#define writeb(addr,val) *(volatile unsigned char *)(addr) = (val)//#define writew(addr,val) *(volatile unsigned short *)(addr) = (val)//#define writel(addr,val) *(volatile unsigned int *)(addr) = (val)
#define _RESET(addr) writew(addr,0x00ff)
//==========================================================================================
int Intel_CheckID(int addr)
{
_RESET(addr);
writew(addr, 0x0090);
return readw(addr); // Read Identifier Code, including lower, higher 16-bit, 8MB, Intel Strate Flash ROM
// targetAddress must be the beginning location of a Block Address
}
//==========================================================================================
int Intel_CheckDeviceID(int addr)
{
_RESET(addr);
writew(addr, 0x0090);
return readw(addr+0x2); // Read Device Code, including lower, higher 16-bit, 8MB, Intel Strate Flash ROM
// targetAddress must be the beginning location of a Block Address
}
//==========================================================================================
int Intel_CheckBlockLock(int addr)
{
_RESET(addr);
writew(addr, 0x0090);
return readw(addr+0x4);
// Read Block Lock configuration,
// targetAddress must be the beginning location of a Block Address
}
//==========================================================================================
int Intel_BlockUnlock(int addr)
{
unsigned int status;
_RESET(addr);
writew(addr, 0x0060);
writew(addr, 0x00d0);
while(1)
{
status=readw(addr+0x4);
if(status&(1<<7))break;
}
//_RESET(addr);
}
//==========================================================================================
int Intel_EraseSector(int addr)
{
unsigned long status;
int ret=0;
_RESET(addr);
writew(addr, 0x0020); // Block Erase, First Bus Cycle, targetAddress is the address withint the block
writew(addr, 0x00d0); // Block Erase, Second Bus Cycle, targetAddress is the address withint the block
//_RESET();
writew(addr, 0x0070); // Read Status Register, First Bus Cycle, targetAddress is any valid address within the device
status=readw(addr); // Read Status Register, Second Bus Cycle, targetAddress is any valid address within the device
while(status & (1<<7))
{
writew(addr, 0x0070);
status=readw(addr);
// printk("wait !!\n");
}
writew(addr, 0x0070); // When the block erase is complete, status register bit SR.5 should be checked.
// If a block erase error is detected, the status register should be cleared before
// system software attempts correct actions.
status=readw(addr);
if (status & (1<<5))
{
printk("Block @%xh Erase O.K. \n",addr);
}
else
{
//printk("Error in Block Erasure!!\n");
writew(addr, 0x0050); // Clear Status Register
ret=1; // But not major, is it casual ?
}
//_RESET(); // write 0xffh(_RESET()) after the last opoeration to reset the device to read array mode.
return ret;
}
//==========================================================================================
int Intel_BlankCheck(int addr,int size)
{
int i,j;
for (i=0; i<size; i+=2)
{
j=readw(i+addr)&0xffff;
if (j!=0xffff) // In erasure it changes all block data to 0xff
{
printk("E : %x = %x\n", (i+addr), j);
return 0;
}
//else
//{
// printk(".");
//}
}
return 1;
}
//==========================================================================================
int Intel_ProgFlash(unsigned int addr, unsigned int data)
{
unsigned long status;
//_RESET();
writew(addr, 0x0040); // realAddr is any valid adress within the device
// Word/Byte Program(or 0x00100010 can be used)
writew(addr, data);
//_RESET();
writew(addr, 0x0070); // Read Status Register
status=readw(addr); // realAddr is any valid address within the device
while(status & (1<<7))
{
// _RESET();
writew(addr, 0x0070); // Read Status Register
status=readw(addr);
}
writew(addr, 0x0070);
status=readw(addr); // Real Status Register
if (!(status & (1<<4)))
{
//printk("Error Program!!\n");
writew(addr, 0x0050); // Clear Status Register
#if !FAST_ROM_PROGRAM
_RESET();
#endif
return 1; //error_program=1; // But not major, is it casual ?
}
#if !FAST_ROM_PROGRAM
_RESET();
#endif
return 0;
}
void Program28F320J3A(unsigned int start, const unsigned char buff[], unsigned int size)
{
int i;
unsigned int m_id,dve_id;
unsigned int base;
unsigned int temp;
base=TARGET_ADDR_28F320;
if ( (m_id=(Intel_CheckID(base) & 0xffff)) != 0x0089 ) // ID number = 0x0089
{
printk("Identification check error (0x%x)!!\n",m_id);
return ;
}
if ( (dve_id=(Intel_CheckDeviceID(base) & 0xffff)) != 0x0016 ) // Device number=0x0018
{
printk("Device check error (id:0x%x)!!\n", dve_id);
return ;
}
printk("\nErase the sector from 0x%x.\n", base+start);
for(i=0;i<size;i+=0x20000)
{
Intel_BlockUnlock(base+start+i);
if (Intel_EraseSector(base+start+i))
{
printk("Device erase sector (sec:0x%x)!!\n", base+start+i);
return ;
}
}
#if 1
printk("\nBlank check starting...\n");
if(!Intel_BlankCheck(base+start,size))
{
printk("Blank Check Error!!!\n");
return;
}
#else
printk("\nBlank check is skipped.\n");
#endif
printk("\nStart of the data writing...\n");
for (i=0; i<size; i+=2)
{
if (Intel_ProgFlash(i+base+start, *((unsigned short *)(buff+i))))
{
printk("\nprogram flash error!!\n");
return;
}
if((i%0x100)==0xfe)
printk("[%x]",i+2);
}
_RESET(base);
printk("\nEnd of the data writing \n");
#if 1
printk("Verifying Start...\n");
//for (i=0; i<512; i+=2)
for (i=0; i<size; i+=2)
{
if (!(i%16)) printk("\n%06x: ",i+start);
temp=readw(i+base+start) & 0xffff;
if (temp != *((unsigned short *)(buff+i)))
{
printk("Verify error: src %08x = %04x\n", buff+i, *((unsigned short *)(buff+i)));
printk(" dst %08x = %04x\n", i+base+start, temp);
return;
}
else printk("%02x %02x ",temp&255,temp>>8);
}
printk("\n");
printk("Verifying End!!!");
#else
printk("\nverifying is skipped.\n");
#endif
}
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