gio.h

dvr

/*
********************************************************************************
*
* (c) Copyright 2002, Vineyard Technologies, Inc.
*
* Filename : gio.h
* Programmer(s): Steve KyeongHyeon Lee
* Created : 2003/05/07
* Modified :
*
* Description :
********************************************************************************
*/

#ifndef __GIO_H__
#define __GIO_H__

#include "types.h"
#include "8052reg.h"

#define	SEL_GENESIS				P1_0
#define SEL_LAN					P1_2		// Select W3100A and FPGA
#define	SEL_AUDIO               P1_3        // AUDIO Interface
#define INT_2804				P1_4		// connected to TW 2804 interrupt pin
#ifdef DEBUG_GPIO
#define P11_INT1				P1_1
#define P15_INTWZ				P1_5
#define P16_WZREG0				P1_6		// Used as bank swithing variable
#else
#define PORT_LED				P1_5		// LED to notify event or recording state
#endif

#define DV_JN_3      			P1_7
#define SDATA	 				P3_4		// Serial data
#define SCLK	 				P3_3		// Serial clock

#define SETUP_REGISTER   		XBYTE[0x8000]
#define VIDEO_SETUP_REGISTER1	XBYTE[0x8001]
#define CODEC_RegB  			XBYTE[0x8002]
#define VIDEO_SETUP_REGISTER2	XBYTE[0x8003]
#define QLEVEL_REGISTER 		XBYTE[0x8004]
#define FRAME_RATE_REGISTER		XBYTE[0x8005]
#define CODEC_REGISTER			XBYTE[0x8006]
#define FBF_SETUP_REGISTER		XBYTE[0x8007]
#define FBF_TRIGER_REGISTER		XBYTE[0x8008]
#define FRAME_SKIP_REGISTER 	XBYTE[0x8009] // G1P
#define IRQ_STATUS_REGISTER		XBYTE[0x8010]
#define W_POINTER				XBYTE[0x8011]
#define KEYIN_REGISTER  		XBYTE[0x8012]
#define KEYOUT_REGISTER  		XBYTE[0x8013]
#define AC_TRESH_REGISTER 		XBYTE[0x801a]
#define DC_TRESH_REGISTER 		XBYTE[0x801b]
#define ALARM_REGISTER 	  		XBYTE[0x801c]
#define ENC_BUF_CLR_REGISTER 	XBYTE[0x801d]
#define SENSOR_REGISTER      	XBYTE[0x801f]

//0x00(R/W) SETUP_REGISTER Status
#define NMFRAME					0x80
#define SEN_CLR					0x40
#define FRST					0x20
#define CE						0x10
#define BM_HDD					0x08
#define KEY_CLR					0x04
#define E_D						0x02
#define ARST					0x01

#define FRST_EN					0x22
#define FRST_DE					0x20

// FBF_SETUP_REGISTER bit information
#define FBF_ENABLE				0x04
#define FBF_FRAME_CNT			0x03
// FBF_TRIGER_REGISTER bit information
#define FBF_TRIGER				0x01

//0x10(R)  IRQ_STATUS_REGISTER
#define ISKEY					0x80
#define ISSENSOR				0x40
#define XISHDDW					0x08
#define XISHDDR					0x04
#define ISHDDW					0x02
#define ISHDDR					0x01

#define HDD_TOP					0
#define SYSTEM_SETUP_MSB		0x00
#define CHANNEL_X				37

#define	BIT2_CH1_ONLY			0xFF	// Bit2: CH1_ONLY (0xFB->Disable, 0xFF->Enable)
#define BIT2_CH1_ONLY_WORK		0xFF
#define BIT2_CH1_ONLY_NOTWORK	0xFB

#define	FF2_SKIP				30
#define	FF3_SKIP				400		//60
#define	REW_SKIP				300	//300

#define SENSOR_NO_INTR			0x80
#define SENSOR_ALARM			0x01
#define MD_NO_INTR				0x40

void dv03_enable(void);
#ifndef LANIF
void lan_enable(void);
//void lan_int_enable(void);
//void lan_int_disable(void);
#endif
void audio_enable(void);
void delay_time (u16 dt_time_end, u8 cnt);

#endif // #ifndef __GIO_H__